mb/google/guybrush: Add variant_espi_gpio_table
Add separate gpio table for early eSPI bus init. Remove espi GPIO from
early_gpio_table. This allows for initializing eSPI separately from
other GPIOs. Simplify verstage_mainboard_early_init.
BUG=b:200578885
BRANCH=None
TEST=Build and boot guybrush
Change-Id: I0cd439f207df7c27575ae363b207293d40485bf8
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59082
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index 3bfa3e9..f3b4256 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -24,6 +24,7 @@
extern char _bss_start, _bss_end;
void __weak verstage_mainboard_early_init(void) {}
+void __weak verstage_mainboard_espi_init(void) {}
void __weak verstage_mainboard_init(void) {}
uint32_t __weak get_max_workbuf_size(uint32_t *size)
{
@@ -233,8 +234,11 @@
svc_debug_print("verstage_soc_early_init failed! -- rebooting\n");
vboot_reboot();
}
- svc_debug_print("calling verstage_mainboard_early_init\n");
+ printk(BIOS_DEBUG, "calling verstage_mainboard_espi_init\n");
+ verstage_mainboard_espi_init();
+
+ printk(BIOS_DEBUG, "calling verstage_mainboard_early_init\n");
verstage_mainboard_early_init();
svc_write_postcode(POSTCODE_LATE_INIT);