soc/amd/psp_verstage: Split up verstage_soc_init
Make psp verstage initialization more granular be splitting
verstage_soc_init into separate functions. Specifically, create
soc init functions for espi, i2c spi, and aoac.
BUG=b:200578885
BRANCH=None
TEST=Build and boot guybrush
Change-Id: I489889a0dfd4016aa4f2b53a2c6a7a1ea4459e60
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index f3b4256..8fc2732 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -243,7 +243,19 @@
svc_write_postcode(POSTCODE_LATE_INIT);
fch_io_enable_legacy_io();
- verstage_soc_init();
+
+ printk(BIOS_DEBUG, "calling verstage_soc_espi_init\n");
+ verstage_soc_espi_init();
+
+ printk(BIOS_DEBUG, "calling verstage_soc_aoac_init\n");
+ verstage_soc_aoac_init();
+
+ printk(BIOS_DEBUG, "calling verstage_soc_i2c_init\n");
+ verstage_soc_i2c_init();
+
+ printk(BIOS_DEBUG, "calling verstage_soc_spi_init\n");
+ verstage_soc_spi_init();
+
verstage_mainboard_init();
post_code(POSTCODE_VERSTAGE_MAIN);