blob: d071aa66244a9dd0611db47491d7433fd3067217 [file] [log] [blame]
Martin Rothc7acf162020-05-28 00:44:50 -06001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include "psp_verstage.h"
4
5#include <bl_uapp/bl_syscall_public.h>
6#include <boot_device.h>
Martin Rothe21698b2020-06-26 08:55:15 -06007#include <cbfs.h>
Martin Rothc7acf162020-05-28 00:44:50 -06008#include <console/console.h>
Martin Rothe21698b2020-06-26 08:55:15 -06009#include <fmap.h>
Martin Roth50cca762020-08-13 11:06:18 -060010#include <pc80/mc146818rtc.h>
Martin Roth0c12abe2020-06-26 08:40:56 -060011#include <soc/psp_transfer.h>
Martin Roth50cca762020-08-13 11:06:18 -060012#include <security/vboot/vbnv.h>
Martin Rothc7acf162020-05-28 00:44:50 -060013#include <security/vboot/misc.h>
14#include <security/vboot/symbols.h>
15#include <security/vboot/vboot_common.h>
16#include <arch/stages.h>
17#include <stdarg.h>
18#include <stdio.h>
19
Martin Rothc7acf162020-05-28 00:44:50 -060020extern char _bss_start, _bss_end;
21static struct mem_region_device boot_dev =
22 MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE);
23
24void __weak verstage_mainboard_early_init(void) {}
25void __weak verstage_mainboard_init(void) {}
26
27static void reboot_into_recovery(struct vb2_context *ctx, uint32_t subcode)
28{
29 subcode += PSP_VBOOT_ERROR_SUBCODE;
30 svc_write_postcode(subcode);
31
Martin Rothc9689e02020-08-20 17:25:37 -060032 /*
33 * If there's an error but the PSP_verstage is already booting to RO,
34 * don't reset the system. It may be that the error is fatal, but if
35 * the system is stuck, don't intentionally force it into a reboot loop.
36 */
37 if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
38 printk(BIOS_ERR, "Already in recovery mode. Staying in RO.\n");
39 return;
40 }
41
Martin Rothc7acf162020-05-28 00:44:50 -060042 vb2api_fail(ctx, VB2_RECOVERY_RO_UNSPECIFIED, (int)subcode);
43 vboot_save_data(ctx);
44
45 svc_debug_print("Rebooting into recovery\n");
46 vboot_reboot();
47}
48
Martin Roth50cca762020-08-13 11:06:18 -060049static uint32_t check_cmos_recovery(void)
50{
51 /* Only reset if cmos is valid */
52 if (vbnv_cmos_failed())
53 return 0;
54
55 /* If the byte is set, clear it, then return error to reboot */
56 if (cmos_read(CMOS_RECOVERY_BYTE) == CMOS_RECOVERY_MAGIC_VAL) {
57 cmos_write(0x00, CMOS_RECOVERY_BYTE);
58 printk(BIOS_DEBUG, "Reboot into recovery requested by coreboot\n");
59 return POSTCODE_CMOS_RECOVERY;
60 }
61
62 return 0;
63}
64
Martin Rothe21698b2020-06-26 08:55:15 -060065static uintptr_t locate_amdfw(const char *name, struct region_device *rdev)
66{
67 struct cbfsf fh;
68 uint32_t type = CBFS_TYPE_RAW;
69
70 if (cbfs_locate(&fh, rdev, name, &type))
71 return 0;
72
73 cbfs_file_data(rdev, &fh);
74
75 return (uintptr_t)rdev_mmap_full(rdev);
76}
77
Martin Rothc7acf162020-05-28 00:44:50 -060078/*
79 * Tell the PSP where to load the rest of the firmware from
80 */
81static uint32_t update_boot_region(struct vb2_context *ctx)
82{
83 struct psp_ef_table *ef_table;
84 uint32_t psp_dir_addr, bios_dir_addr;
85 uint32_t *psp_dir_in_spi, *bios_dir_in_spi;
Martin Rothe21698b2020-06-26 08:55:15 -060086 const char *rname, *fname;
87 struct region_device rdev;
88 uintptr_t amdfw_location;
Martin Rothc7acf162020-05-28 00:44:50 -060089
90 /* Continue booting from RO */
91 if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
92 printk(BIOS_ERR, "In recovery mode. Staying in RO.\n");
93 return 0;
94 }
95
96 if (vboot_is_firmware_slot_a(ctx)) {
Martin Rothe21698b2020-06-26 08:55:15 -060097 rname = "FW_MAIN_A";
98 fname = "apu/amdfw_a";
Martin Rothc7acf162020-05-28 00:44:50 -060099 } else {
Martin Rothe21698b2020-06-26 08:55:15 -0600100 rname = "FW_MAIN_B";
101 fname = "apu/amdfw_b";
Martin Rothc7acf162020-05-28 00:44:50 -0600102 }
103
Martin Rothe21698b2020-06-26 08:55:15 -0600104 if (fmap_locate_area_as_rdev(rname, &rdev)) {
105 printk(BIOS_ERR, "Error: Could not locate fmap region %s.\n", rname);
106 return POSTCODE_FMAP_REGION_MISSING;
107 }
108
109 amdfw_location = locate_amdfw(fname, &rdev);
110 if (!amdfw_location) {
111 printk(BIOS_ERR, "Error: AMD Firmware table not found.\n");
112 return POSTCODE_AMD_FW_MISSING;
113 }
114 ef_table = (struct psp_ef_table *)amdfw_location;
Martin Rothc7acf162020-05-28 00:44:50 -0600115 if (ef_table->signature != EMBEDDED_FW_SIGNATURE) {
116 printk(BIOS_ERR, "Error: ROMSIG address is not correct.\n");
117 return POSTCODE_ROMSIG_MISMATCH_ERROR;
118 }
119
120 psp_dir_addr = ef_table->psp_table;
121 bios_dir_addr = ef_table->bios1_entry;
122 psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) +
123 (uint32_t)boot_dev.base);
124 bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) +
125 (uint32_t)boot_dev.base);
126 if (*psp_dir_in_spi != PSP_COOKIE) {
127 printk(BIOS_ERR, "Error: PSP Directory address is not correct.\n");
128 return POSTCODE_PSP_COOKIE_MISMATCH_ERROR;
129 }
130 if (*bios_dir_in_spi != BDT1_COOKIE) {
131 printk(BIOS_ERR, "Error: BIOS Directory address is not correct.\n");
132 return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR;
133 }
134
135 if (svc_update_psp_bios_dir((void *)&psp_dir_addr,
136 (void *)&bios_dir_addr, DIR_OFFSET_SET)) {
137 printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n");
138 return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR;
139 }
140
141 return 0;
142}
143
144/*
145 * Save workbuf (and soon memory console and timestamps) to the bootloader to pass
146 * back to coreboot.
147 */
148static uint32_t save_buffers(struct vb2_context **ctx)
149{
150 uint32_t retval;
Martin Roth0c12abe2020-06-26 08:40:56 -0600151 uint32_t buffer_size = MIN_TRANSFER_BUFFER_SIZE;
Martin Rothc7acf162020-05-28 00:44:50 -0600152 uint32_t max_buffer_size;
Martin Roth0c12abe2020-06-26 08:40:56 -0600153 struct transfer_info_struct buffer_info = {0};
Martin Rothc7acf162020-05-28 00:44:50 -0600154
155 /*
156 * This should never fail, but if it does, we should still try to
157 * save the buffer. If that fails, then we should go to recovery mode.
158 */
159 if (svc_get_max_workbuf_size(&max_buffer_size)) {
160 post_code(POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE);
161 printk(BIOS_NOTICE, "Notice: using default transfer buffer size.\n");
Martin Roth0c12abe2020-06-26 08:40:56 -0600162 max_buffer_size = MIN_TRANSFER_BUFFER_SIZE;
Martin Rothc7acf162020-05-28 00:44:50 -0600163 }
164 printk(BIOS_DEBUG, "\nMaximum buffer size: %d bytes\n", max_buffer_size);
165
Martin Roth0c12abe2020-06-26 08:40:56 -0600166 /* Shrink workbuf if MP2 is in use and cannot be used to save buffer */
167 if (max_buffer_size < VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) {
168 retval = vb2api_relocate(_vboot2_work, _vboot2_work, MIN_WORKBUF_TRANSFER_SIZE,
169 ctx);
170 if (retval != VB2_SUCCESS) {
171 printk(BIOS_ERR, "Error shrinking workbuf. Error code %#x\n", retval);
172 buffer_size = VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE;
173 post_code(POSTCODE_WORKBUF_RESIZE_WARNING);
174 }
175 } else {
176 buffer_size =
177 (uint32_t)((uintptr_t)_etransfer_buffer - (uintptr_t)_transfer_buffer);
178
179 buffer_info.console_offset = (uint32_t)((uintptr_t)_preram_cbmem_console -
180 (uintptr_t)_transfer_buffer);
181 buffer_info.timestamp_offset = (uint32_t)((uintptr_t)_timestamp -
182 (uintptr_t)_transfer_buffer);
183 buffer_info.fmap_offset = (uint32_t)((uintptr_t)_fmap_cache -
184 (uintptr_t)_transfer_buffer);
Martin Rothc7acf162020-05-28 00:44:50 -0600185 }
186
187 if (buffer_size > max_buffer_size) {
Martin Roth0c12abe2020-06-26 08:40:56 -0600188 printk(BIOS_ERR, "Error: Buffer is larger than max buffer size.\n");
Martin Rothc7acf162020-05-28 00:44:50 -0600189 post_code(POSTCODE_WORKBUF_BUFFER_SIZE_ERROR);
190 return POSTCODE_WORKBUF_BUFFER_SIZE_ERROR;
191 }
192
Martin Roth0c12abe2020-06-26 08:40:56 -0600193 buffer_info.magic_val = TRANSFER_MAGIC_VAL;
194 buffer_info.struct_bytes = sizeof(buffer_info);
195 buffer_info.buffer_size = buffer_size;
196 buffer_info.workbuf_offset = (uint32_t)((uintptr_t)_fmap_cache -
197 (uintptr_t)_vboot2_work);
198
199 retval = svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, (void *)_transfer_buffer,
200 buffer_size);
Martin Rothc7acf162020-05-28 00:44:50 -0600201 if (retval) {
Martin Roth0c12abe2020-06-26 08:40:56 -0600202 printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n", retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600203 return POSTCODE_WORKBUF_SAVE_ERROR;
204 }
205
206 return 0;
207}
208
209void Main(void)
210{
211 uint32_t retval;
212 struct vb2_context *ctx = NULL;
213
214 /*
215 * Do not use printk() before console_init()
216 * Do not use post_code() before verstage_mainboard_init()
217 */
218 svc_write_postcode(POSTCODE_ENTERED_PSP_VERSTAGE);
219 svc_debug_print("Entering verstage on PSP\n");
220 memset(&_bss_start, '\0', &_bss_end - &_bss_start);
221
222 svc_write_postcode(POSTCODE_CONSOLE_INIT);
223 console_init();
224
225 svc_write_postcode(POSTCODE_EARLY_INIT);
226 retval = verstage_soc_early_init();
227 if (retval) {
228 svc_debug_print("verstage_soc_early_init failed\n");
229 reboot_into_recovery(NULL, retval);
230 }
231 svc_debug_print("calling verstage_mainboard_early_init\n");
232
233 verstage_mainboard_early_init();
234
235 svc_write_postcode(POSTCODE_LATE_INIT);
236 sb_enable_legacy_io();
237 verstage_soc_init();
238 verstage_mainboard_init();
239
240 post_code(POSTCODE_VERSTAGE_MAIN);
241
242 verstage_main();
243
Martin Rothc9689e02020-08-20 17:25:37 -0600244 ctx = vboot_get_context();
Martin Roth50cca762020-08-13 11:06:18 -0600245 retval = check_cmos_recovery();
246 if (retval)
Martin Rothc9689e02020-08-20 17:25:37 -0600247 reboot_into_recovery(ctx, retval);
Martin Roth0c12abe2020-06-26 08:40:56 -0600248
Martin Rothc7acf162020-05-28 00:44:50 -0600249 post_code(POSTCODE_SAVE_BUFFERS);
250 retval = save_buffers(&ctx);
251 if (retval)
Martin Rothc9689e02020-08-20 17:25:37 -0600252 reboot_into_recovery(ctx, retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600253
254 post_code(POSTCODE_UPDATE_BOOT_REGION);
255 retval = update_boot_region(ctx);
256 if (retval)
Martin Rothc9689e02020-08-20 17:25:37 -0600257 reboot_into_recovery(ctx, retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600258
259 post_code(POSTCODE_UNMAP_SPI_ROM);
260 if (boot_dev.base) {
261 if (svc_unmap_spi_rom((void *)boot_dev.base))
262 printk(BIOS_ERR, "Error unmapping SPI rom\n");
263 }
264
265 post_code(POSTCODE_UNMAP_FCH_DEVICES);
266 unmap_fch_devices();
267
268 post_code(POSTCODE_LEAVING_VERSTAGE);
269
270 printk(BIOS_DEBUG, "Leaving verstage on PSP\n");
271 svc_exit(retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600272}
273
274const struct region_device *boot_device_ro(void)
275{
276 uintptr_t *addr;
277
278 addr = map_spi_rom();
279 mem_region_device_ro_init(&boot_dev, (void *)addr, CONFIG_ROM_SIZE);
280
281 return &boot_dev.rdev;
282}
283
284/*
285 * The stage_entry function is not used directly, but stage_entry() is marked as an entry
286 * point in arm/arch/header.h, so if stage_entry() isn't present and calling Main(), all
287 * the verstage code gets dropped by the linker. Slightly hacky, but mostly harmless.
288 */
289void stage_entry(uintptr_t stage_arg)
290{
291 Main();
292}