blob: c4a77e0fcde7beb2ef220df8e035cfd28f6f132c [file] [log] [blame]
jinkun.hongac490b82014-06-22 20:40:39 -07001##
2## This file is part of the coreboot project.
3##
4## Copyright 2014 Rockchip Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
huang lin817e4552014-08-26 17:31:28 +080020IDBTOOL = util/rockchip/make_idb.py
21
jinkun.hongac490b82014-06-22 20:40:39 -070022#bootblock-y += bootblock.c
23bootblock-y += cbmem.c
jinkun.hongac490b82014-06-22 20:40:39 -070024ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
25bootblock-$(CONFIG_DRIVERS_UART) += uart.c
26endif
huang lin739df1b2014-08-27 17:07:42 +080027bootblock-y += timer.c
jinkun.hong503d1212014-07-31 14:50:49 +080028bootblock-y += clock.c
huang lin630c86d2014-08-26 17:28:46 +080029bootblock-y += spi.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070030bootblock-y += gpio.c
huang linbbcffd92014-09-27 12:02:27 +080031bootblock-y += i2c.c
huang lin08884e32014-10-10 20:28:47 -070032bootblock-y += rk808.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070033
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070034verstage-y += spi.c
35verstage-y += timer.c
Patrick Georgi94e4d812015-04-07 13:49:32 +020036verstage-$(CONFIG_DRIVERS_UART) += uart.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070037verstage-y += gpio.c
38verstage-y += clock.c
Julius Werner33df4952014-12-16 22:48:26 -080039verstage-y += crypto.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070040verstage-y += i2c.c
jinkun.hongac490b82014-06-22 20:40:39 -070041
42romstage-y += cbmem.c
43romstage-y += timer.c
jinkun.hongac490b82014-06-22 20:40:39 -070044romstage-$(CONFIG_DRIVERS_UART) += uart.c
huang lin441a5782014-07-30 20:34:40 -070045romstage-y += i2c.c
jinkun.hong503d1212014-07-31 14:50:49 +080046romstage-y += clock.c
huang lind5fb66e2014-08-26 18:22:08 +080047romstage-y += gpio.c
huang lin630c86d2014-08-26 17:28:46 +080048romstage-y += spi.c
Jinkun Hongc33ce352014-08-28 09:37:22 -070049romstage-y += sdram.c
Julius Wernerdbfa9d52014-12-05 17:29:42 -080050romstage-y += rk808.c
huang linbfdd7322014-09-25 16:33:38 +080051romstage-y += pwm.c
huang lina97bd5a2014-10-14 10:04:16 -070052romstage-y += tsadc.c
huang lind5fb66e2014-08-26 18:22:08 +080053
huang lin82ba4d02014-08-16 10:49:32 +080054ramstage-y += soc.c
jinkun.hongac490b82014-06-22 20:40:39 -070055ramstage-y += cbmem.c
56ramstage-y += timer.c
huang lin441a5782014-07-30 20:34:40 -070057ramstage-y += i2c.c
jinkun.hong503d1212014-07-31 14:50:49 +080058ramstage-y += clock.c
huang lin630c86d2014-08-26 17:28:46 +080059ramstage-y += spi.c
huang linee28c862015-01-26 21:04:55 +080060ramstage-y += sdram.c
huang lind5fb66e2014-08-26 18:22:08 +080061ramstage-y += gpio.c
Julius Werner7a757c92014-09-10 19:37:15 -070062ramstage-y += rk808.c
huang linbfdd7322014-09-25 16:33:38 +080063ramstage-y += pwm.c
huang lin40f558e2014-09-19 14:51:52 +080064ramstage-y += vop.c
65ramstage-y += edp.c
66ramstage-y += display.c
jinkun.hongac490b82014-06-22 20:40:39 -070067ramstage-$(CONFIG_DRIVERS_UART) += uart.c
huang lin817e4552014-08-26 17:31:28 +080068
Julius Werner7a453eb2014-10-20 13:14:55 -070069CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include/
70
huang lin817e4552014-08-26 17:31:28 +080071$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
72 cp $< $@
73
74$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
75 @printf "Generating: $(subst $(obj)/,,$(@))\n"
76 @mkdir -p $(dir $@)
77 @$(IDBTOOL) --from=$< --to=$@ --enable-align