blob: 95d72c9782818a98f8db2a301f643f120a3e2e1c [file] [log] [blame]
jinkun.hongac490b82014-06-22 20:40:39 -07001##
2## This file is part of the coreboot project.
3##
4## Copyright 2014 Rockchip Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
huang lin817e4552014-08-26 17:31:28 +080020IDBTOOL = util/rockchip/make_idb.py
21
jinkun.hongac490b82014-06-22 20:40:39 -070022#bootblock-y += bootblock.c
23bootblock-y += cbmem.c
jinkun.hongac490b82014-06-22 20:40:39 -070024ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
25bootblock-$(CONFIG_DRIVERS_UART) += uart.c
26endif
huang lin739df1b2014-08-27 17:07:42 +080027bootblock-y += timer.c
28bootblock-y += monotonic_timer.c
jinkun.hong503d1212014-07-31 14:50:49 +080029bootblock-y += clock.c
huang lin630c86d2014-08-26 17:28:46 +080030bootblock-y += spi.c
huang lin739df1b2014-08-27 17:07:42 +080031bootblock-y += media.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070032bootblock-y += gpio.c
huang linbbcffd92014-09-27 12:02:27 +080033bootblock-y += i2c.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070034
35verstage-y += monotonic_timer.c
36verstage-y += spi.c
37verstage-y += timer.c
38verstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
39verstage-y += gpio.c
40verstage-y += clock.c
41verstage-y += i2c.c
42verstage-y += media.c
jinkun.hongac490b82014-06-22 20:40:39 -070043
44romstage-y += cbmem.c
45romstage-y += timer.c
46romstage-y += monotonic_timer.c
jinkun.hongac490b82014-06-22 20:40:39 -070047romstage-$(CONFIG_DRIVERS_UART) += uart.c
huang lin441a5782014-07-30 20:34:40 -070048romstage-y += i2c.c
jinkun.hong503d1212014-07-31 14:50:49 +080049romstage-y += clock.c
huang lind5fb66e2014-08-26 18:22:08 +080050romstage-y += gpio.c
huang lin630c86d2014-08-26 17:28:46 +080051romstage-y += spi.c
huang lin7333e1f2014-07-30 10:58:37 -070052romstage-y += media.c
Jinkun Hongc33ce352014-08-28 09:37:22 -070053romstage-y += sdram.c
huang linbfdd7322014-09-25 16:33:38 +080054romstage-y += pwm.c
huang lind5fb66e2014-08-26 18:22:08 +080055
huang lin82ba4d02014-08-16 10:49:32 +080056ramstage-y += soc.c
jinkun.hongac490b82014-06-22 20:40:39 -070057ramstage-y += cbmem.c
58ramstage-y += timer.c
59ramstage-y += monotonic_timer.c
huang lin441a5782014-07-30 20:34:40 -070060ramstage-y += i2c.c
jinkun.hong503d1212014-07-31 14:50:49 +080061ramstage-y += clock.c
huang lin630c86d2014-08-26 17:28:46 +080062ramstage-y += spi.c
huang lind5fb66e2014-08-26 18:22:08 +080063ramstage-y += gpio.c
jinkun.hongac490b82014-06-22 20:40:39 -070064ramstage-y += media.c
Julius Werner7a757c92014-09-10 19:37:15 -070065ramstage-y += rk808.c
huang linbfdd7322014-09-25 16:33:38 +080066ramstage-y += pwm.c
jinkun.hongac490b82014-06-22 20:40:39 -070067ramstage-$(CONFIG_DRIVERS_UART) += uart.c
huang lin817e4552014-08-26 17:31:28 +080068
69$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
70 cp $< $@
71
72$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
73 @printf "Generating: $(subst $(obj)/,,$(@))\n"
74 @mkdir -p $(dir $@)
75 @$(IDBTOOL) --from=$< --to=$@ --enable-align