jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Rockchip Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
huang lin | 817e455 | 2014-08-26 17:31:28 +0800 | [diff] [blame] | 20 | IDBTOOL = util/rockchip/make_idb.py |
| 21 | |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 22 | #bootblock-y += bootblock.c |
| 23 | bootblock-y += cbmem.c |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 24 | ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) |
| 25 | bootblock-$(CONFIG_DRIVERS_UART) += uart.c |
| 26 | endif |
huang lin | 739df1b | 2014-08-27 17:07:42 +0800 | [diff] [blame^] | 27 | bootblock-y += timer.c |
| 28 | bootblock-y += monotonic_timer.c |
jinkun.hong | 503d121 | 2014-07-31 14:50:49 +0800 | [diff] [blame] | 29 | bootblock-y += clock.c |
huang lin | 630c86d | 2014-08-26 17:28:46 +0800 | [diff] [blame] | 30 | bootblock-y += spi.c |
huang lin | 739df1b | 2014-08-27 17:07:42 +0800 | [diff] [blame^] | 31 | bootblock-y += media.c |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 32 | |
| 33 | romstage-y += cbmem.c |
| 34 | romstage-y += timer.c |
| 35 | romstage-y += monotonic_timer.c |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 36 | romstage-$(CONFIG_DRIVERS_UART) += uart.c |
huang lin | 441a578 | 2014-07-30 20:34:40 -0700 | [diff] [blame] | 37 | romstage-y += i2c.c |
jinkun.hong | 503d121 | 2014-07-31 14:50:49 +0800 | [diff] [blame] | 38 | romstage-y += clock.c |
huang lin | d5fb66e | 2014-08-26 18:22:08 +0800 | [diff] [blame] | 39 | romstage-y += gpio.c |
huang lin | 630c86d | 2014-08-26 17:28:46 +0800 | [diff] [blame] | 40 | romstage-y += spi.c |
huang lin | 7333e1f | 2014-07-30 10:58:37 -0700 | [diff] [blame] | 41 | romstage-y += media.c |
Jinkun Hong | c33ce35 | 2014-08-28 09:37:22 -0700 | [diff] [blame] | 42 | romstage-y += sdram.c |
huang lin | d5fb66e | 2014-08-26 18:22:08 +0800 | [diff] [blame] | 43 | |
huang lin | 82ba4d0 | 2014-08-16 10:49:32 +0800 | [diff] [blame] | 44 | ramstage-y += soc.c |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 45 | ramstage-y += cbmem.c |
| 46 | ramstage-y += timer.c |
| 47 | ramstage-y += monotonic_timer.c |
huang lin | 441a578 | 2014-07-30 20:34:40 -0700 | [diff] [blame] | 48 | ramstage-y += i2c.c |
jinkun.hong | 503d121 | 2014-07-31 14:50:49 +0800 | [diff] [blame] | 49 | ramstage-y += clock.c |
huang lin | 630c86d | 2014-08-26 17:28:46 +0800 | [diff] [blame] | 50 | ramstage-y += spi.c |
huang lin | d5fb66e | 2014-08-26 18:22:08 +0800 | [diff] [blame] | 51 | ramstage-y += gpio.c |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 52 | ramstage-y += media.c |
| 53 | ramstage-$(CONFIG_DRIVERS_UART) += uart.c |
huang lin | 817e455 | 2014-08-26 17:31:28 +0800 | [diff] [blame] | 54 | |
| 55 | $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf |
| 56 | cp $< $@ |
| 57 | |
| 58 | $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin |
| 59 | @printf "Generating: $(subst $(obj)/,,$(@))\n" |
| 60 | @mkdir -p $(dir $@) |
| 61 | @$(IDBTOOL) --from=$< --to=$@ --enable-align |