Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 1 | chip soc/intel/skylake |
| 2 | |
Matt DeVillier | 8f42472 | 2019-11-27 22:55:43 -0600 | [diff] [blame] | 3 | # IGD Displays |
| 4 | register "gfx" = "GMA_STATIC_DISPLAYS(0)" |
| 5 | |
Michael Niewöhner | 97e21d3 | 2020-12-28 00:49:33 +0100 | [diff] [blame] | 6 | register "panel_cfg" = "{ |
| 7 | .up_delay_ms = 200, |
| 8 | .down_delay_ms = 500, |
| 9 | .cycle_delay_ms = 600, |
| 10 | .backlight_on_delay_ms = 1, |
| 11 | .backlight_off_delay_ms = 200, |
| 12 | .backlight_pwm_hz = 1000, |
| 13 | }" |
Matt DeVillier | d7e92e8 | 2019-11-28 00:50:47 -0600 | [diff] [blame] | 14 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 15 | # Deep Sx states |
| 16 | register "deep_s3_enable_ac" = "0" |
| 17 | register "deep_s3_enable_dc" = "0" |
| 18 | register "deep_s5_enable_ac" = "1" |
| 19 | register "deep_s5_enable_dc" = "1" |
| 20 | register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" |
| 21 | |
| 22 | # GPE configuration |
| 23 | # Note that GPE events called out in ASL code rely on this |
| 24 | # route. i.e. If this route changes then the affected GPE |
| 25 | # offset bits also need to be changed. |
| 26 | register "gpe0_dw0" = "GPP_B" |
| 27 | register "gpe0_dw1" = "GPP_D" |
| 28 | register "gpe0_dw2" = "GPP_E" |
| 29 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 30 | # Enable DPTF |
| 31 | register "dptf_enable" = "1" |
| 32 | |
| 33 | # Enable S0ix |
Felix Singer | 743242b | 2023-06-16 01:33:25 +0200 | [diff] [blame] | 34 | register "s0ix_enable" = true |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 35 | |
marxwang | 5b56565 | 2018-09-11 12:08:23 +0800 | [diff] [blame] | 36 | # Disable Command TriState |
| 37 | register "CmdTriStateDis" = "1" |
| 38 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 39 | # FSP Configuration |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 40 | register "DspEnable" = "1" |
| 41 | register "IoBufferOwnership" = "3" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 42 | register "ScsEmmcHs400Enabled" = "1" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 43 | register "SkipExtGfxScan" = "1" |
Angel Pons | 6fadde0 | 2021-04-04 16:11:53 +0200 | [diff] [blame] | 44 | register "SaGv" = "SaGv_Enabled" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 45 | register "PmConfigSlpS3MinAssert" = "2" # 50ms |
| 46 | register "PmConfigSlpS4MinAssert" = "1" # 1s |
| 47 | register "PmConfigSlpSusMinAssert" = "1" # 500ms |
| 48 | register "PmConfigSlpAMinAssert" = "3" # 2s |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 49 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 50 | # VR Settings Configuration for 4 Domains |
| 51 | #+----------------+-------+-------+-------+-------+ |
| 52 | #| Domain/Setting | SA | IA | GTUS | GTS | |
| 53 | #+----------------+-------+-------+-------+-------+ |
| 54 | #| Psi1Threshold | 20A | 20A | 20A | 20A | |
| 55 | #| Psi2Threshold | 2A | 2A | 2A | 2A | |
| 56 | #| Psi3Threshold | 1A | 1A | 1A | 1A | |
| 57 | #| Psi3Enable | 1 | 1 | 1 | 1 | |
| 58 | #| Psi4Enable | 1 | 1 | 1 | 1 | |
| 59 | #| ImonSlope | 0 | 0 | 0 | 0 | |
| 60 | #| ImonOffset | 0 | 0 | 0 | 0 | |
| 61 | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | |
statham_chu | 200262c | 2018-09-20 16:02:04 +0800 | [diff] [blame] | 62 | #| AcLoadline | 14.4 | 4.2 | 5.7 | 4.47 | |
| 63 | #| DcLoadline | 14.0 | 4.17 | 4.2 | 4.3 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 64 | #+----------------+-------+-------+-------+-------+ |
| 65 | register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ |
| 66 | .vr_config_enable = 1, |
| 67 | .psi1threshold = VR_CFG_AMP(20), |
| 68 | .psi2threshold = VR_CFG_AMP(2), |
| 69 | .psi3threshold = VR_CFG_AMP(1), |
| 70 | .psi3enable = 1, |
| 71 | .psi4enable = 1, |
| 72 | .imon_slope = 0x0, |
| 73 | .imon_offset = 0x0, |
| 74 | .voltage_limit = 1520, |
statham_chu | 200262c | 2018-09-20 16:02:04 +0800 | [diff] [blame] | 75 | .ac_loadline = 1440, |
| 76 | .dc_loadline = 1400, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 77 | }" |
| 78 | |
| 79 | register "domain_vr_config[VR_IA_CORE]" = "{ |
| 80 | .vr_config_enable = 1, |
| 81 | .psi1threshold = VR_CFG_AMP(20), |
| 82 | .psi2threshold = VR_CFG_AMP(2), |
| 83 | .psi3threshold = VR_CFG_AMP(1), |
| 84 | .psi3enable = 1, |
| 85 | .psi4enable = 1, |
| 86 | .imon_slope = 0x0, |
| 87 | .imon_offset = 0x0, |
| 88 | .voltage_limit = 1520, |
statham_chu | 200262c | 2018-09-20 16:02:04 +0800 | [diff] [blame] | 89 | .ac_loadline = 420, |
| 90 | .dc_loadline = 417, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 91 | }" |
| 92 | |
| 93 | register "domain_vr_config[VR_GT_UNSLICED]" = "{ |
| 94 | .vr_config_enable = 1, |
| 95 | .psi1threshold = VR_CFG_AMP(20), |
| 96 | .psi2threshold = VR_CFG_AMP(2), |
| 97 | .psi3threshold = VR_CFG_AMP(1), |
| 98 | .psi3enable = 1, |
| 99 | .psi4enable = 1, |
| 100 | .imon_slope = 0x0, |
| 101 | .imon_offset = 0x0, |
| 102 | .voltage_limit = 1520, |
statham_chu | 200262c | 2018-09-20 16:02:04 +0800 | [diff] [blame] | 103 | .ac_loadline = 570, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 104 | .dc_loadline = 420, |
| 105 | }" |
| 106 | |
| 107 | register "domain_vr_config[VR_GT_SLICED]" = "{ |
| 108 | .vr_config_enable = 1, |
| 109 | .psi1threshold = VR_CFG_AMP(20), |
| 110 | .psi2threshold = VR_CFG_AMP(2), |
| 111 | .psi3threshold = VR_CFG_AMP(1), |
| 112 | .psi3enable = 1, |
| 113 | .psi4enable = 1, |
| 114 | .imon_slope = 0x0, |
| 115 | .imon_offset = 0x0, |
| 116 | .voltage_limit = 1520, |
statham_chu | 200262c | 2018-09-20 16:02:04 +0800 | [diff] [blame] | 117 | .ac_loadline = 447, |
| 118 | .dc_loadline = 430, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 119 | }" |
| 120 | |
| 121 | # Enable Root port 1. |
| 122 | register "PcieRpEnable[0]" = "1" |
| 123 | # Enable CLKREQ# |
| 124 | register "PcieRpClkReqSupport[0]" = "1" |
| 125 | # RP 1 uses SRCCLKREQ1# |
| 126 | register "PcieRpClkReqNumber[0]" = "1" |
Alexander Goncharov | 893c3ae8 | 2023-02-04 15:20:37 +0400 | [diff] [blame] | 127 | # RP 1 uses CLK SRC 1 |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 128 | register "PcieRpClkSrcNumber[0]" = "1" |
| 129 | # RP 1, Enable Advanced Error Reporting |
| 130 | register "PcieRpAdvancedErrorReporting[0]" = "1" |
| 131 | # RP 1, Enable Latency Tolerance Reporting Mechanism |
| 132 | register "PcieRpLtrEnable[0]" = "1" |
| 133 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 134 | # Intel Common SoC Config |
| 135 | #+-------------------+---------------------------+ |
| 136 | #| Field | Value | |
| 137 | #+-------------------+---------------------------+ |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 138 | #| I2C0 | Touchscreen | |
| 139 | #| I2C1 | Trackpad | |
| 140 | #| I2C5 | Audio | |
Subrata Banik | c077b22 | 2019-08-01 10:50:35 +0530 | [diff] [blame] | 141 | #| pch_thermal_trip | PCH Trip Temperature | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 142 | #+-------------------+---------------------------+ |
| 143 | register "common_soc_config" = "{ |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 144 | .i2c[0] = { |
| 145 | .speed = I2C_SPEED_FAST, |
| 146 | .speed_config[0] = { |
| 147 | .speed = I2C_SPEED_FAST, |
| 148 | .scl_lcnt = 190, |
| 149 | .scl_hcnt = 100, |
| 150 | .sda_hold = 36, |
| 151 | }, |
| 152 | }, |
| 153 | .i2c[1] = { |
| 154 | .speed = I2C_SPEED_FAST, |
| 155 | .speed_config[0] = { |
| 156 | .speed = I2C_SPEED_FAST, |
kane_chen | 8440bf7 | 2018-11-29 17:22:57 +0800 | [diff] [blame] | 157 | .scl_lcnt = 170, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 158 | .scl_hcnt = 100, |
| 159 | .sda_hold = 36, |
| 160 | }, |
| 161 | .early_init = 1, |
| 162 | }, |
| 163 | .i2c[5] = { |
| 164 | .speed = I2C_SPEED_FAST, |
| 165 | .speed_config[0] = { |
| 166 | .speed = I2C_SPEED_FAST, |
| 167 | .scl_lcnt = 190, |
| 168 | .scl_hcnt = 100, |
| 169 | .sda_hold = 36, |
| 170 | }, |
| 171 | }, |
kane_chen | e781856 | 2018-08-31 17:38:07 +0800 | [diff] [blame] | 172 | .gspi[0] = { |
| 173 | .speed_mhz = 1, |
| 174 | .early_init = 1, |
| 175 | }, |
Subrata Banik | c077b22 | 2019-08-01 10:50:35 +0530 | [diff] [blame] | 176 | .pch_thermal_trip = 75, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 177 | }" |
| 178 | |
| 179 | # Touchscreen |
| 180 | register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" |
| 181 | |
| 182 | # Trackpad |
| 183 | register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" |
| 184 | |
| 185 | # Audio |
| 186 | register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" |
| 187 | |
| 188 | # Must leave UART0 enabled or SD/eMMC will not work as PCI |
| 189 | register "SerialIoDevMode" = "{ |
| 190 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 191 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 192 | [PchSerialIoIndexI2C2] = PchSerialIoDisabled, |
| 193 | [PchSerialIoIndexI2C3] = PchSerialIoDisabled, |
| 194 | [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| 195 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 196 | [PchSerialIoIndexSpi0] = PchSerialIoPci, |
| 197 | [PchSerialIoIndexSpi1] = PchSerialIoDisabled, |
Angel Pons | 0856494 | 2021-06-04 18:55:03 +0200 | [diff] [blame] | 198 | [PchSerialIoIndexUart0] = PchSerialIoSkipInit, |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 199 | [PchSerialIoIndexUart1] = PchSerialIoDisabled, |
| 200 | [PchSerialIoIndexUart2] = PchSerialIoSkipInit, |
| 201 | }" |
| 202 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 203 | # PL2 override 18W for AML-Y |
Sumeet R Pawnikar | 97c5464 | 2020-05-10 01:24:11 +0530 | [diff] [blame] | 204 | register "power_limits_config" = "{ |
| 205 | .tdp_pl2_override = 18, |
| 206 | .psys_pmax = 45, |
| 207 | }" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 208 | register "tcc_offset" = "10" # TCC of 90C |
| 209 | |
| 210 | # Use default SD card detect GPIO configuration |
Angel Pons | 6bd99f9 | 2021-02-20 00:16:47 +0100 | [diff] [blame] | 211 | register "sdcard_cd_gpio" = "GPP_E15" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 212 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 213 | device domain 0 on |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 214 | device ref system_agent on end |
| 215 | device ref igpu on end |
| 216 | device ref sa_thermal on end |
| 217 | device ref imgu off end |
| 218 | device ref south_xhci on |
Felix Singer | 6c83a71 | 2024-06-23 00:25:18 +0200 | [diff] [blame] | 219 | register "usb2_ports" = "{ |
| 220 | [0] = USB2_PORT_SHORT(OC0), // Type-C Port 1 |
| 221 | [1] = USB2_PORT_LONG(OC3), // Type-A Port |
| 222 | [2] = USB2_PORT_SHORT(OC_SKIP), // Bluetooth |
| 223 | [4] = USB2_PORT_LONG(OC1), // Type-C Port 2 |
| 224 | [6] = USB2_PORT_SHORT(OC_SKIP), // H1 |
| 225 | [8] = USB2_PORT_SHORT(OC_SKIP), // Camera |
| 226 | }" |
| 227 | |
| 228 | register "usb3_ports" = "{ |
| 229 | [0] = USB3_PORT_DEFAULT(OC0), // Type-C Port 1 |
| 230 | [1] = USB3_PORT_DEFAULT(OC1), // Type-C Port 2 |
| 231 | [2] = USB3_PORT_DEFAULT(OC3), // Type-A Port |
| 232 | }" |
marxwang | a3a2ffb | 2019-01-02 20:34:53 +0800 | [diff] [blame] | 233 | chip drivers/usb/acpi |
| 234 | register "desc" = ""Root Hub"" |
| 235 | register "type" = "UPC_TYPE_HUB" |
| 236 | device usb 0.0 on |
| 237 | chip drivers/usb/acpi |
| 238 | register "desc" = ""USB Type C Port 1"" |
| 239 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 240 | device usb 2.0 on end |
| 241 | end |
| 242 | chip drivers/usb/acpi |
| 243 | register "desc" = ""USB Type A Port 1"" |
| 244 | register "type" = "UPC_TYPE_A" |
| 245 | device usb 2.1 on end |
| 246 | end |
| 247 | chip drivers/usb/acpi |
| 248 | register "desc" = ""Bluetooth"" |
| 249 | register "type" = "UPC_TYPE_INTERNAL" |
| 250 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C8)" |
| 251 | device usb 2.2 on end |
| 252 | end |
| 253 | chip drivers/usb/acpi |
| 254 | register "desc" = ""USB Type C Port 2"" |
| 255 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 256 | device usb 2.4 on end |
| 257 | end |
| 258 | chip drivers/usb/acpi |
| 259 | register "desc" = ""Camera"" |
| 260 | register "type" = "UPC_TYPE_INTERNAL" |
| 261 | device usb 2.8 on end |
| 262 | end |
| 263 | end |
| 264 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 265 | end |
| 266 | device ref south_xdci off end |
| 267 | device ref thermal on end |
| 268 | device ref cio off end |
| 269 | device ref i2c0 on |
kane_chen | 888af33 | 2018-09-14 10:02:18 +0800 | [diff] [blame] | 270 | chip drivers/i2c/hid |
| 271 | register "generic.hid" = ""PNP0C50"" |
| 272 | register "generic.desc" = ""SISC Touchscreen"" |
| 273 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" |
Matt DeVillier | 86425c8 | 2022-03-28 23:45:14 -0500 | [diff] [blame] | 274 | register "generic.detect" = "1" |
kane_chen | 888af33 | 2018-09-14 10:02:18 +0800 | [diff] [blame] | 275 | register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)" |
Kane Chenffd | b3591f3 | 2018-12-12 15:57:04 +0800 | [diff] [blame] | 276 | register "generic.enable_delay_ms" = "105" |
| 277 | register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)" |
| 278 | register "generic.stop_off_delay_ms" = "1" |
kane_chen | 888af33 | 2018-09-14 10:02:18 +0800 | [diff] [blame] | 279 | register "generic.has_power_resource" = "1" |
kane_chen | 888af33 | 2018-09-14 10:02:18 +0800 | [diff] [blame] | 280 | register "hid_desc_reg_offset" = "0x0" |
| 281 | device i2c 5c on end |
| 282 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 283 | end |
| 284 | device ref i2c1 on |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 285 | chip drivers/i2c/generic |
| 286 | register "hid" = ""ELAN0000"" |
| 287 | register "desc" = ""ELAN Touchpad"" |
Matt DeVillier | 1c2f5ce | 2019-11-28 01:45:11 -0600 | [diff] [blame] | 288 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 289 | register "wake" = "GPE0_DW0_05" # GPP_B5 |
Matt DeVillier | 86425c8 | 2022-03-28 23:45:14 -0500 | [diff] [blame] | 290 | register "detect" = "1" |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 291 | device i2c 15 on end |
| 292 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 293 | end |
| 294 | device ref i2c2 off end |
| 295 | device ref i2c3 off end |
| 296 | device ref heci1 on end |
| 297 | device ref heci2 off end |
| 298 | device ref csme_ider off end |
| 299 | device ref csme_ktr off end |
| 300 | device ref heci3 off end |
| 301 | device ref sata off end |
| 302 | device ref uart2 on end |
| 303 | device ref i2c5 on |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 304 | chip drivers/i2c/max98927 |
| 305 | register "interleave_mode" = "1" |
| 306 | register "vmon_slot_no" = "4" |
| 307 | register "imon_slot_no" = "5" |
| 308 | register "uid" = "0" |
| 309 | register "desc" = ""SSM4567 Right Speaker Amp"" |
| 310 | register "name" = ""MAXR"" |
| 311 | device i2c 39 on end |
| 312 | end |
| 313 | chip drivers/i2c/max98927 |
| 314 | register "interleave_mode" = "1" |
| 315 | register "vmon_slot_no" = "6" |
| 316 | register "imon_slot_no" = "7" |
| 317 | register "uid" = "1" |
| 318 | register "desc" = ""SSM4567 Left Speaker Amp"" |
| 319 | register "name" = ""MAXL"" |
| 320 | device i2c 3A on end |
| 321 | end |
marxwang | 3b8ef2b | 2018-09-07 13:42:00 +0800 | [diff] [blame] | 322 | chip drivers/i2c/da7219 |
| 323 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)" |
| 324 | register "btn_cfg" = "50" |
Terry Cheong | 053c901 | 2023-12-12 11:04:33 +0800 | [diff] [blame] | 325 | register "mic_det_thr" = "200" |
marxwang | 3b8ef2b | 2018-09-07 13:42:00 +0800 | [diff] [blame] | 326 | register "jack_ins_deb" = "20" |
| 327 | register "jack_det_rate" = ""32ms_64ms"" |
| 328 | register "jack_rem_deb" = "1" |
| 329 | register "a_d_btn_thr" = "0xa" |
| 330 | register "d_b_btn_thr" = "0x16" |
| 331 | register "b_c_btn_thr" = "0x21" |
| 332 | register "c_mic_btn_thr" = "0x3e" |
| 333 | register "btn_avg" = "4" |
| 334 | register "adc_1bit_rpt" = "1" |
| 335 | register "micbias_lvl" = "2600" |
| 336 | register "mic_amp_in_sel" = ""diff"" |
| 337 | device i2c 1A on end |
| 338 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 339 | end |
| 340 | device ref i2c4 off end |
| 341 | device ref pcie_rp1 on |
Furquan Shaikh | a266d1e | 2020-10-04 12:52:54 -0700 | [diff] [blame] | 342 | chip drivers/wifi/generic |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 343 | register "wake" = "GPE0_DW0_00" # GPP_B0 |
| 344 | device pci 00.0 on end |
| 345 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 346 | end |
| 347 | device ref pcie_rp2 off end |
| 348 | device ref pcie_rp3 off end |
| 349 | device ref pcie_rp4 off end |
| 350 | device ref pcie_rp5 off end |
| 351 | device ref pcie_rp6 off end |
| 352 | device ref pcie_rp7 off end |
| 353 | device ref pcie_rp8 off end |
| 354 | device ref pcie_rp9 off end |
| 355 | device ref pcie_rp10 off end |
| 356 | device ref pcie_rp11 off end |
| 357 | device ref pcie_rp12 off end |
| 358 | device ref uart0 on end |
| 359 | device ref uart1 off end |
| 360 | device ref gspi0 on |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 361 | chip drivers/spi/acpi |
| 362 | register "hid" = "ACPI_DT_NAMESPACE_HID" |
| 363 | register "compat_string" = ""google,cr50"" |
| 364 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" |
| 365 | device spi 0 on end |
| 366 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 367 | end |
| 368 | device ref gspi1 off end |
| 369 | device ref emmc on end |
| 370 | device ref sdio off end |
| 371 | device ref sdxc on end |
| 372 | device ref lpc_espi on |
Felix Singer | dcddc53f | 2024-06-23 03:39:24 +0200 | [diff] [blame^] | 373 | # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| 374 | register "gen1_dec" = "0x00fc0801" |
| 375 | register "gen2_dec" = "0x000c0201" |
| 376 | # EC memory map range is 0x900-0x9ff |
| 377 | register "gen3_dec" = "0x00fc0901" |
| 378 | |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 379 | chip ec/google/chromeec |
| 380 | device pnp 0c09.0 on end |
| 381 | end |
Marvin Evers | 059476d | 2023-12-04 02:28:25 +0100 | [diff] [blame] | 382 | end |
| 383 | device ref p2sb on end |
| 384 | device ref pmc on end |
| 385 | device ref hda on end |
| 386 | device ref smbus on end |
| 387 | device ref fast_spi on end |
| 388 | device ref gbe off end |
Zhuohao Lee | 11f0160 | 2018-08-02 23:59:16 +0800 | [diff] [blame] | 389 | end |
| 390 | end |