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Furquan Shaikhda01d942014-03-19 14:31:23 -07001/*
2 * This file is part of the coreboot project.
3 *
Deepa Dinamani1c2748d2015-01-12 11:57:09 -08004 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
Deepa Dinamani2c041172014-05-15 17:14:12 -07005 * Copyright 2014 Google Inc.
Furquan Shaikhda01d942014-03-19 14:31:23 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Furquan Shaikhda01d942014-03-19 14:31:23 -070015 */
16
Vadim Bendebury1de971d2014-08-07 15:20:21 -070017#include <boardid.h>
Furquan Shaikhda01d942014-03-19 14:31:23 -070018#include <boot/coreboot_tables.h>
Vadim Bendeburyc6d30402014-08-01 17:36:45 -070019#include <delay.h>
Vadim Bendebury1de971d2014-08-07 15:20:21 -070020#include <device/device.h>
Julius Wernereaa9c452014-09-24 15:40:49 -070021#include <gpio.h>
Julius Werner73d1ed62014-10-20 13:20:49 -070022#include <soc/clock.h>
Vikas Das08f249e2014-09-22 17:49:56 -070023#include <soc/soc_services.h>
Julius Werner73d1ed62014-10-20 13:20:49 -070024#include <soc/usb.h>
Julius Wernerec5e5e02014-08-20 15:29:56 -070025#include <symbols.h>
Vadim Bendeburyc6d30402014-08-01 17:36:45 -070026
Vadim Bendebury103a07f2014-10-23 16:03:29 -070027#include <vendorcode/google/chromeos/chromeos.h>
Deepa Dinamani1c2748d2015-01-12 11:57:09 -080028#include "mmu.h"
Julius Werner028cba92014-05-30 18:01:44 -070029
Vadim Bendeburyf6ad8322014-06-24 07:26:03 -070030#define USB_ENABLE_GPIO 51
31
Julius Werner028cba92014-05-30 18:01:44 -070032static void setup_usb(void)
33{
Vadim Bendeburyf752d012014-07-10 15:24:18 -070034#if !CONFIG_BOARD_VARIANT_AP148
Vadim Bendeburyf6ad8322014-06-24 07:26:03 -070035 gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO,
36 GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE);
Julius Wernereaa9c452014-09-24 15:40:49 -070037 gpio_set(USB_ENABLE_GPIO, 1);
Vadim Bendeburyf752d012014-07-10 15:24:18 -070038#endif
Julius Werner028cba92014-05-30 18:01:44 -070039 usb_clock_config();
40
41 setup_usb_host1();
Julius Werner028cba92014-05-30 18:01:44 -070042}
Deepa Dinamani2c041172014-05-15 17:14:12 -070043
Vadim Bendebury1de971d2014-08-07 15:20:21 -070044#define TPM_RESET_GPIO 22
45static void setup_tpm(void)
46{
Dan Ehrenberg644afa72014-10-24 13:22:05 -070047 if (board_id() != BOARD_ID_PROTO_0)
Vadim Bendebury1de971d2014-08-07 15:20:21 -070048 return; /* Only proto0 have TPM reset connected to GPIO22 */
49
50 gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP,
51 GPIO_4MA, GPIO_ENABLE);
52 /*
53 * Generate a reset pulse. The spec calls for 80 us minimum, let's
54 * make it twice as long. If the output was driven low originally, the
55 * reset pulse will be even longer.
56 */
Julius Wernereaa9c452014-09-24 15:40:49 -070057 gpio_set(TPM_RESET_GPIO, 0);
Vadim Bendebury1de971d2014-08-07 15:20:21 -070058 udelay(160);
Julius Wernereaa9c452014-09-24 15:40:49 -070059 gpio_set(TPM_RESET_GPIO, 1);
Vadim Bendebury1de971d2014-08-07 15:20:21 -070060}
61
Vadim Bendeburyc7bbc042014-09-08 14:34:09 -070062#define SW_RESET_GPIO 26
Vadim Bendeburya45d5d32014-10-22 12:14:29 -070063static void assert_sw_reset(void)
Vadim Bendeburyc7bbc042014-09-08 14:34:09 -070064{
Dan Ehrenberg644afa72014-10-24 13:22:05 -070065 if (board_id() == BOARD_ID_PROTO_0)
Vadim Bendeburyc7bbc042014-09-08 14:34:09 -070066 return;
67
Vadim Bendeburyf32ef132014-09-09 20:41:33 -070068 /*
Vadim Bendeburya45d5d32014-10-22 12:14:29 -070069 * only proto0.2 and later care about this. We want to keep the
70 * ethernet switch in reset, otherwise it comes up in default
71 * (bridging) mode.
Vadim Bendeburyf32ef132014-09-09 20:41:33 -070072 */
Vadim Bendeburyc7bbc042014-09-08 14:34:09 -070073 gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO,
74 GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
75
Vadim Bendeburya45d5d32014-10-22 12:14:29 -070076 gpio_set(SW_RESET_GPIO, 1);
Vadim Bendeburyc7bbc042014-09-08 14:34:09 -070077}
78
Furquan Shaikhda01d942014-03-19 14:31:23 -070079static void mainboard_init(device_t dev)
80{
Deepa Dinamani1c2748d2015-01-12 11:57:09 -080081 /* disable mmu and d-cache before setting up secure world.*/
82 dcache_mmu_disable();
Vikas Das08f249e2014-09-22 17:49:56 -070083 start_tzbsp();
Deepa Dinamani1c2748d2015-01-12 11:57:09 -080084 /* Setup mmu and d-cache again as non secure entries. */
85 setup_mmu(DRAM_INITIALIZED);
Vadim Bendebury6114c992014-12-16 14:34:28 -080086 start_rpm();
Julius Werner028cba92014-05-30 18:01:44 -070087 setup_usb();
Vadim Bendeburya45d5d32014-10-22 12:14:29 -070088 assert_sw_reset();
Vadim Bendebury1de971d2014-08-07 15:20:21 -070089 setup_tpm();
Dan Ehrenbergcb3b0c5a2014-10-23 17:46:39 -070090 /* Functionally a 0-cost no-op if NAND is not present */
91 board_nand_init();
Vadim Bendebury103a07f2014-10-23 16:03:29 -070092
93#if IS_ENABLED(CONFIG_CHROMEOS)
94 /* Copy WIFI calibration data into CBMEM. */
95 cbmem_add_vpd_calibration_data();
96#endif
Vadim Bendebury3cfb6a02015-02-11 15:13:04 -080097
98 /*
99 * Make sure bootloader can issue sounds The frequency is calculated
100 * as "<frame_rate> * <bit_width> * <channels> * 4", i.e.
101 *
102 * 48000 * 2 * 16 * 4 = 6144000
103 */
104 audio_clock_config(6144000);
Furquan Shaikhda01d942014-03-19 14:31:23 -0700105}
106
107static void mainboard_enable(device_t dev)
108{
109 dev->ops->init = &mainboard_init;
110}
111
112struct chip_operations mainboard_ops = {
113 .name = "storm",
114 .enable_dev = mainboard_enable,
115};
Julius Werner028cba92014-05-30 18:01:44 -0700116
117void lb_board(struct lb_header *header)
118{
119 struct lb_range *dma;
120
121 dma = (struct lb_range *)lb_new_record(header);
122 dma->tag = LB_TAB_DMA;
123 dma->size = sizeof(*dma);
Julius Wernerec5e5e02014-08-20 15:29:56 -0700124 dma->range_start = (uintptr_t)_dma_coherent;
125 dma->range_size = _dma_coherent_size;
Vadim Bendeburye9e0eec2014-10-16 13:26:59 -0700126
127#if IS_ENABLED(CONFIG_CHROMEOS)
128 /* Retrieve the switch interface MAC addressses. */
129 lb_table_add_macs_from_vpd(header);
130#endif
Julius Werner028cba92014-05-30 18:01:44 -0700131}