Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 4 | * Copyright 2014 Google Inc. |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 20 | #include <arch/cache.h> |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame^] | 21 | #include <boardid.h> |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 22 | #include <boot/coreboot_tables.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 23 | #include <console/console.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 24 | #include <delay.h> |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame^] | 25 | #include <device/device.h> |
| 26 | #include <gpiolib.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 27 | #include <string.h> |
| 28 | |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 29 | #include <soc/qualcomm/ipq806x/include/clock.h> |
Vadim Bendebury | f6ad832 | 2014-06-24 07:26:03 -0700 | [diff] [blame] | 30 | #include <soc/qualcomm/ipq806x/include/gpio.h> |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 31 | #include <soc/qualcomm/ipq806x/include/usb.h> |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 32 | |
| 33 | /* convenient shorthand (in MB) */ |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 34 | #define DRAM_START (CONFIG_SYS_SDRAM_BASE / MiB) |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 35 | #define DRAM_SIZE (CONFIG_DRAM_SIZE_MB) |
| 36 | #define DRAM_END (DRAM_START + DRAM_SIZE) |
| 37 | |
| 38 | /* DMA memory for drivers */ |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 39 | #define DMA_START (CONFIG_DRAM_DMA_START / MiB) |
| 40 | #define DMA_SIZE (CONFIG_DRAM_DMA_SIZE / MiB) |
| 41 | |
Vadim Bendebury | f6ad832 | 2014-06-24 07:26:03 -0700 | [diff] [blame] | 42 | #define USB_ENABLE_GPIO 51 |
| 43 | |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 44 | static void setup_usb(void) |
| 45 | { |
Vadim Bendebury | f752d01 | 2014-07-10 15:24:18 -0700 | [diff] [blame] | 46 | #if !CONFIG_BOARD_VARIANT_AP148 |
Vadim Bendebury | f6ad832 | 2014-06-24 07:26:03 -0700 | [diff] [blame] | 47 | gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO, |
| 48 | GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE); |
Vadim Bendebury | d36ef6a | 2014-07-25 17:34:42 -0700 | [diff] [blame] | 49 | gpio_set_out_value(USB_ENABLE_GPIO, 1); |
Vadim Bendebury | f752d01 | 2014-07-10 15:24:18 -0700 | [diff] [blame] | 50 | #endif |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 51 | usb_clock_config(); |
| 52 | |
| 53 | setup_usb_host1(); |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 54 | } |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 55 | |
| 56 | static void setup_mmu(void) |
| 57 | { |
| 58 | dcache_mmu_disable(); |
| 59 | |
| 60 | /* Map Device memory. */ |
| 61 | mmu_config_range(0, DRAM_START, DCACHE_OFF); |
| 62 | /* Disable Page 0 for trapping NULL pointer references. */ |
| 63 | mmu_disable_range(0, 1); |
| 64 | /* Map DRAM memory */ |
| 65 | mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); |
| 66 | /* Map DMA memory */ |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 67 | mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 68 | |
| 69 | mmu_disable_range(DRAM_END, 4096 - DRAM_END); |
| 70 | |
| 71 | mmu_init(); |
| 72 | |
| 73 | dcache_mmu_enable(); |
| 74 | } |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 75 | |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame^] | 76 | #define TPM_RESET_GPIO 22 |
| 77 | static void setup_tpm(void) |
| 78 | { |
| 79 | if (board_id() != 0) |
| 80 | return; /* Only proto0 have TPM reset connected to GPIO22 */ |
| 81 | |
| 82 | gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP, |
| 83 | GPIO_4MA, GPIO_ENABLE); |
| 84 | /* |
| 85 | * Generate a reset pulse. The spec calls for 80 us minimum, let's |
| 86 | * make it twice as long. If the output was driven low originally, the |
| 87 | * reset pulse will be even longer. |
| 88 | */ |
| 89 | gpio_set_out_value(TPM_RESET_GPIO, 0); |
| 90 | udelay(160); |
| 91 | gpio_set_out_value(TPM_RESET_GPIO, 1); |
| 92 | } |
| 93 | |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 94 | static void mainboard_init(device_t dev) |
| 95 | { |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 96 | setup_mmu(); |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 97 | setup_usb(); |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame^] | 98 | setup_tpm(); |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | static void mainboard_enable(device_t dev) |
| 102 | { |
| 103 | dev->ops->init = &mainboard_init; |
| 104 | } |
| 105 | |
| 106 | struct chip_operations mainboard_ops = { |
| 107 | .name = "storm", |
| 108 | .enable_dev = mainboard_enable, |
| 109 | }; |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 110 | |
| 111 | void lb_board(struct lb_header *header) |
| 112 | { |
| 113 | struct lb_range *dma; |
| 114 | |
| 115 | dma = (struct lb_range *)lb_new_record(header); |
| 116 | dma->tag = LB_TAB_DMA; |
| 117 | dma->size = sizeof(*dma); |
| 118 | dma->range_start = CONFIG_DRAM_DMA_START; |
| 119 | dma->range_size = CONFIG_DRAM_DMA_SIZE; |
| 120 | } |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 121 | |
| 122 | static int read_gpio(gpio_t gpio_num) |
| 123 | { |
| 124 | gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE, |
| 125 | GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE); |
| 126 | udelay(10); /* Should be enough to settle. */ |
| 127 | return gpio_get_in_value(gpio_num); |
| 128 | } |
| 129 | |
| 130 | void fill_lb_gpios(struct lb_gpios *gpios) |
| 131 | { |
| 132 | struct lb_gpio *gpio; |
| 133 | const int GPIO_COUNT = 5; |
| 134 | |
| 135 | gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio)); |
| 136 | gpios->count = GPIO_COUNT; |
| 137 | |
| 138 | gpio = gpios->gpios; |
| 139 | fill_lb_gpio(gpio++, 15, ACTIVE_LOW, "developer", read_gpio(15)); |
| 140 | fill_lb_gpio(gpio++, 16, ACTIVE_LOW, "recovery", read_gpio(16)); |
| 141 | fill_lb_gpio(gpio++, 17, ACTIVE_LOW, "write protect", read_gpio(17)); |
| 142 | fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "power", 1); |
| 143 | fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "lid", 0); |
| 144 | } |