storm: do not enable the ethernet switch by default

The ethernet switch, as soon as it is taken out of reset comes up in
default (bridging) mode, which allows traffic to flow freely across
the ports.

Let's keep it in reset such that there is no cross port traffic
happening while the device boots up.

BRANCH=storm
BUG=chrome-os-partner:32646
TEST=verified that the switch is held in reset during boot.

Change-Id: Ia1dbb47d892d564145da17425a596bf9bad40d29
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 50551d8c9a44d1b63e0948070f6573adf7729d37
Original-Change-Id: I6bf698beddc98ce18fee6b3b39622e356c8cfbad
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224989
Original-Reviewed-by: Toshi Kikuchi <toshik@chromium.org>
Reviewed-on: http://review.coreboot.org/9465
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index f1c36a8..69aecb1 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -93,28 +93,27 @@
 }
 
 #define SW_RESET_GPIO 26
-static void deassert_sw_reset(void)
+static void assert_sw_reset(void)
 {
 	if (board_id() == BOARD_ID_PROTO_0)
 		return;
 
 	/*
-	 * only proto0.2 and later care about this. This signal is eventually
-	 * driving the ehernet switch reset input, which is active low. But
-	 * since this signal gets inverted along the way, the GPIO needs to be
-	 * driven low to take the switch out of reset.
+	 * only proto0.2 and later care about this. We want to keep the
+	 * ethernet switch in reset, otherwise it comes up in default
+	 * (bridging) mode.
 	 */
 	gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO,
 			     GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
 
-	gpio_set(SW_RESET_GPIO, 0);
+	gpio_set(SW_RESET_GPIO, 1);
 }
 
 static void mainboard_init(device_t dev)
 {
 	 setup_mmu();
 	 setup_usb();
-	 deassert_sw_reset();
+	 assert_sw_reset();
 	 setup_tpm();
 	 /* Functionally a 0-cost no-op if NAND is not present */
 	 board_nand_init();