Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 4 | * Copyright 2014 Google Inc. |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 20 | #include <arch/cache.h> |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame] | 21 | #include <boardid.h> |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 22 | #include <boot/coreboot_tables.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 23 | #include <console/console.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 24 | #include <delay.h> |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame] | 25 | #include <device/device.h> |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 26 | #include <gpio.h> |
Julius Werner | 73d1ed6 | 2014-10-20 13:20:49 -0700 | [diff] [blame] | 27 | #include <soc/clock.h> |
Julius Werner | 73d1ed6 | 2014-10-20 13:20:49 -0700 | [diff] [blame] | 28 | #include <soc/usb.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 29 | #include <string.h> |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 30 | #include <symbols.h> |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 31 | |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 32 | /* convenient shorthand (in MB) */ |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 33 | #define DRAM_START ((uintptr_t)_dram / MiB) |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 34 | #define DRAM_SIZE (CONFIG_DRAM_SIZE_MB) |
| 35 | #define DRAM_END (DRAM_START + DRAM_SIZE) |
| 36 | |
| 37 | /* DMA memory for drivers */ |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 38 | #define DMA_START ((uintptr_t)_dma_coherent / MiB) |
| 39 | #define DMA_SIZE (_dma_coherent_size / MiB) |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 40 | |
Vadim Bendebury | f6ad832 | 2014-06-24 07:26:03 -0700 | [diff] [blame] | 41 | #define USB_ENABLE_GPIO 51 |
| 42 | |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 43 | static void setup_usb(void) |
| 44 | { |
Vadim Bendebury | f752d01 | 2014-07-10 15:24:18 -0700 | [diff] [blame] | 45 | #if !CONFIG_BOARD_VARIANT_AP148 |
Vadim Bendebury | f6ad832 | 2014-06-24 07:26:03 -0700 | [diff] [blame] | 46 | gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO, |
| 47 | GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE); |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 48 | gpio_set(USB_ENABLE_GPIO, 1); |
Vadim Bendebury | f752d01 | 2014-07-10 15:24:18 -0700 | [diff] [blame] | 49 | #endif |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 50 | usb_clock_config(); |
| 51 | |
| 52 | setup_usb_host1(); |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 53 | } |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 54 | |
| 55 | static void setup_mmu(void) |
| 56 | { |
| 57 | dcache_mmu_disable(); |
| 58 | |
| 59 | /* Map Device memory. */ |
| 60 | mmu_config_range(0, DRAM_START, DCACHE_OFF); |
| 61 | /* Disable Page 0 for trapping NULL pointer references. */ |
| 62 | mmu_disable_range(0, 1); |
| 63 | /* Map DRAM memory */ |
| 64 | mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); |
| 65 | /* Map DMA memory */ |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 66 | mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 67 | |
| 68 | mmu_disable_range(DRAM_END, 4096 - DRAM_END); |
| 69 | |
| 70 | mmu_init(); |
| 71 | |
| 72 | dcache_mmu_enable(); |
| 73 | } |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 74 | |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame] | 75 | #define TPM_RESET_GPIO 22 |
| 76 | static void setup_tpm(void) |
| 77 | { |
| 78 | if (board_id() != 0) |
| 79 | return; /* Only proto0 have TPM reset connected to GPIO22 */ |
| 80 | |
| 81 | gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP, |
| 82 | GPIO_4MA, GPIO_ENABLE); |
| 83 | /* |
| 84 | * Generate a reset pulse. The spec calls for 80 us minimum, let's |
| 85 | * make it twice as long. If the output was driven low originally, the |
| 86 | * reset pulse will be even longer. |
| 87 | */ |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 88 | gpio_set(TPM_RESET_GPIO, 0); |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame] | 89 | udelay(160); |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 90 | gpio_set(TPM_RESET_GPIO, 1); |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame] | 91 | } |
| 92 | |
Vadim Bendebury | c7bbc04 | 2014-09-08 14:34:09 -0700 | [diff] [blame] | 93 | #define SW_RESET_GPIO 26 |
| 94 | static void deassert_sw_reset(void) |
| 95 | { |
| 96 | if (board_id() == 0) |
| 97 | return; |
| 98 | |
Vadim Bendebury | f32ef13 | 2014-09-09 20:41:33 -0700 | [diff] [blame] | 99 | /* |
| 100 | * only proto0.2 and later care about this. This signal is eventually |
| 101 | * driving the ehernet switch reset input, which is active low. But |
| 102 | * since this signal gets inverted along the way, the GPIO needs to be |
| 103 | * driven low to take the switch out of reset. |
| 104 | */ |
Vadim Bendebury | c7bbc04 | 2014-09-08 14:34:09 -0700 | [diff] [blame] | 105 | gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO, |
| 106 | GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE); |
| 107 | |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 108 | gpio_set(SW_RESET_GPIO, 0); |
Vadim Bendebury | c7bbc04 | 2014-09-08 14:34:09 -0700 | [diff] [blame] | 109 | } |
| 110 | |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 111 | static void mainboard_init(device_t dev) |
| 112 | { |
Deepa Dinamani | 2c04117 | 2014-05-15 17:14:12 -0700 | [diff] [blame] | 113 | setup_mmu(); |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 114 | setup_usb(); |
Vadim Bendebury | c7bbc04 | 2014-09-08 14:34:09 -0700 | [diff] [blame] | 115 | deassert_sw_reset(); |
Vadim Bendebury | 1de971d | 2014-08-07 15:20:21 -0700 | [diff] [blame] | 116 | setup_tpm(); |
Dan Ehrenberg | cb3b0c5a | 2014-10-23 17:46:39 -0700 | [diff] [blame^] | 117 | /* Functionally a 0-cost no-op if NAND is not present */ |
| 118 | board_nand_init(); |
Furquan Shaikh | da01d94 | 2014-03-19 14:31:23 -0700 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static void mainboard_enable(device_t dev) |
| 122 | { |
| 123 | dev->ops->init = &mainboard_init; |
| 124 | } |
| 125 | |
| 126 | struct chip_operations mainboard_ops = { |
| 127 | .name = "storm", |
| 128 | .enable_dev = mainboard_enable, |
| 129 | }; |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 130 | |
| 131 | void lb_board(struct lb_header *header) |
| 132 | { |
| 133 | struct lb_range *dma; |
| 134 | |
| 135 | dma = (struct lb_range *)lb_new_record(header); |
| 136 | dma->tag = LB_TAB_DMA; |
| 137 | dma->size = sizeof(*dma); |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 138 | dma->range_start = (uintptr_t)_dma_coherent; |
| 139 | dma->range_size = _dma_coherent_size; |
Vadim Bendebury | e9e0eec | 2014-10-16 13:26:59 -0700 | [diff] [blame] | 140 | |
| 141 | #if IS_ENABLED(CONFIG_CHROMEOS) |
| 142 | /* Retrieve the switch interface MAC addressses. */ |
| 143 | lb_table_add_macs_from_vpd(header); |
| 144 | #endif |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 145 | } |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 146 | |
| 147 | static int read_gpio(gpio_t gpio_num) |
| 148 | { |
| 149 | gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE, |
| 150 | GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE); |
| 151 | udelay(10); /* Should be enough to settle. */ |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 152 | return gpio_get(gpio_num); |
Vadim Bendebury | c6d3040 | 2014-08-01 17:36:45 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | void fill_lb_gpios(struct lb_gpios *gpios) |
| 156 | { |
| 157 | struct lb_gpio *gpio; |
| 158 | const int GPIO_COUNT = 5; |
| 159 | |
| 160 | gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio)); |
| 161 | gpios->count = GPIO_COUNT; |
| 162 | |
| 163 | gpio = gpios->gpios; |
| 164 | fill_lb_gpio(gpio++, 15, ACTIVE_LOW, "developer", read_gpio(15)); |
| 165 | fill_lb_gpio(gpio++, 16, ACTIVE_LOW, "recovery", read_gpio(16)); |
| 166 | fill_lb_gpio(gpio++, 17, ACTIVE_LOW, "write protect", read_gpio(17)); |
| 167 | fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "power", 1); |
| 168 | fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "lid", 0); |
| 169 | } |