Patrick Georgi | c49d7a3 | 2020-05-08 22:50:46 +0200 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 2 | |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 3 | menu "Devices" |
Ronald G. Minnich | 69efaa0 | 2013-02-26 10:07:40 -0800 | [diff] [blame] | 4 | |
Nico Huber | ce642f0 | 2017-05-19 15:08:21 +0200 | [diff] [blame] | 5 | config HAVE_VGA_TEXT_FRAMEBUFFER |
Vladimir Serbinenko | 160e9a0 | 2014-02-22 10:34:47 +0100 | [diff] [blame] | 6 | bool |
Michael Niewöhner | 1513d72 | 2019-10-29 20:38:10 +0100 | [diff] [blame] | 7 | depends on !NO_GFX_INIT |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 8 | help |
| 9 | Selected by graphics drivers that support legacy VGA text mode. |
| 10 | |
| 11 | config HAVE_VBE_LINEAR_FRAMEBUFFER |
| 12 | bool |
Michael Niewöhner | 1513d72 | 2019-10-29 20:38:10 +0100 | [diff] [blame] | 13 | depends on !NO_GFX_INIT |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 14 | help |
| 15 | Selected by graphics drivers that can set up a VBE linear-framebuffer |
| 16 | mode. |
| 17 | |
| 18 | config HAVE_LINEAR_FRAMEBUFFER |
| 19 | bool |
Michael Niewöhner | 1513d72 | 2019-10-29 20:38:10 +0100 | [diff] [blame] | 20 | depends on !NO_GFX_INIT |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 21 | help |
| 22 | Selected by graphics drivers that can set up a generic linear |
| 23 | framebuffer. |
Vladimir Serbinenko | 160e9a0 | 2014-02-22 10:34:47 +0100 | [diff] [blame] | 24 | |
Nico Huber | 2e7f6cc | 2017-05-22 15:58:03 +0200 | [diff] [blame] | 25 | config HAVE_FSP_GOP |
| 26 | bool |
| 27 | help |
| 28 | Selected by drivers that support to run a blob that implements |
| 29 | the Graphics Output Protocol (GOP). |
| 30 | |
Michael Niewöhner | d61a40e | 2019-10-26 10:37:42 +0200 | [diff] [blame] | 31 | config MAINBOARD_NO_FSP_GOP |
| 32 | bool |
| 33 | help |
| 34 | Selected by mainboards that do not have any graphics ports connected to the SoC. |
| 35 | |
Nico Huber | 26ce9af | 2017-05-22 13:22:09 +0200 | [diff] [blame] | 36 | config MAINBOARD_HAS_NATIVE_VGA_INIT |
| 37 | def_bool n |
| 38 | help |
| 39 | Selected by mainboards / drivers that provide native graphics |
| 40 | init within coreboot. |
| 41 | |
| 42 | config MAINBOARD_FORCE_NATIVE_VGA_INIT |
| 43 | def_bool n |
| 44 | depends on MAINBOARD_HAS_NATIVE_VGA_INIT || MAINBOARD_HAS_LIBGFXINIT |
Nico Huber | 26ce9af | 2017-05-22 13:22:09 +0200 | [diff] [blame] | 45 | help |
| 46 | Selected by mainboards / chipsets whose graphics driver can't or |
| 47 | shouldn't be disabled. |
| 48 | |
Subrata Banik | af03936 | 2020-12-30 16:09:56 +0530 | [diff] [blame] | 49 | config VGA_ROM_RUN_DEFAULT |
| 50 | def_bool n |
| 51 | help |
| 52 | Selected by mainboards whose graphics initialization depends on VGA OpROM. |
| 53 | coreboot needs to load/execute legacy VGA OpROM in order to initialize GFX. |
| 54 | |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 55 | config MAINBOARD_HAS_LIBGFXINIT |
| 56 | def_bool n |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 57 | help |
| 58 | Selected by mainboards that implement support for `libgfxinit`. |
| 59 | Usually this requires a list of ports to be probed for displays. |
| 60 | |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 61 | choice |
| 62 | prompt "Graphics initialization" |
Subrata Banik | af03936 | 2020-12-30 16:09:56 +0530 | [diff] [blame] | 63 | default NO_GFX_INIT if VGA_ROM_RUN_DEFAULT && PAYLOAD_SEABIOS |
| 64 | default VGA_ROM_RUN if VGA_ROM_RUN_DEFAULT |
Matt DeVillier | 8107c81 | 2020-03-27 03:09:21 -0500 | [diff] [blame] | 65 | default MAINBOARD_DO_NATIVE_VGA_INIT |
| 66 | default MAINBOARD_USE_LIBGFXINIT |
Matt DeVillier | 175ffd8 | 2020-03-29 18:20:23 -0500 | [diff] [blame] | 67 | default RUN_FSP_GOP if INTEL_GMA_HAVE_VBT |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 68 | |
| 69 | config MAINBOARD_DO_NATIVE_VGA_INIT |
| 70 | bool "Use native graphics init" |
| 71 | depends on MAINBOARD_HAS_NATIVE_VGA_INIT |
| 72 | help |
| 73 | Some mainboards, such as the Google Link, allow initializing the |
| 74 | display without the need of a binary only VGA OPROM. Enabling this |
| 75 | option may be faster, but also lacks flexibility in setting modes. |
| 76 | |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 77 | config MAINBOARD_USE_LIBGFXINIT |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 78 | bool "Use libgfxinit" |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 79 | depends on MAINBOARD_HAS_LIBGFXINIT |
Nico Huber | ce642f0 | 2017-05-19 15:08:21 +0200 | [diff] [blame] | 80 | select HAVE_VGA_TEXT_FRAMEBUFFER |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 81 | select HAVE_LINEAR_FRAMEBUFFER |
Nico Huber | 6d8266b | 2017-05-20 16:46:01 +0200 | [diff] [blame] | 82 | select VGA if VGA_TEXT_FRAMEBUFFER |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 83 | help |
| 84 | Use the SPARK library `libgfxinit` for the native graphics |
| 85 | initialization. This requires an Ada toolchain. |
| 86 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 87 | # TODO: Explain differences (if any) for onboard cards. |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 88 | config VGA_ROM_RUN |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 89 | bool "Run VGA Option ROMs" |
Jonathan Neuschäfer | c22ad58 | 2018-11-30 00:06:50 +0100 | [diff] [blame] | 90 | depends on PCI && (ARCH_X86 || ARCH_PPC64) && !MAINBOARD_FORCE_NATIVE_VGA_INIT |
Nico Huber | ce642f0 | 2017-05-19 15:08:21 +0200 | [diff] [blame] | 91 | select HAVE_VGA_TEXT_FRAMEBUFFER |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 92 | help |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 93 | Execute VGA Option ROMs in coreboot if found. This can be used |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 94 | to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS |
| 95 | payload. |
| 96 | |
| 97 | When using a SeaBIOS payload it runs all option ROMs with much |
| 98 | more complete BIOS interrupt services available than coreboot, |
| 99 | which some option ROMs require in order to function correctly. |
| 100 | |
Arthur Heymans | 4ad1f7d | 2018-01-16 17:22:20 +0100 | [diff] [blame] | 101 | config RUN_FSP_GOP |
| 102 | bool "Run a GOP driver" |
Michael Niewöhner | d61a40e | 2019-10-26 10:37:42 +0200 | [diff] [blame] | 103 | depends on HAVE_FSP_GOP && !MAINBOARD_NO_FSP_GOP |
Arthur Heymans | 4ad1f7d | 2018-01-16 17:22:20 +0100 | [diff] [blame] | 104 | select HAVE_LINEAR_FRAMEBUFFER |
| 105 | help |
| 106 | Some platforms (e.g. Intel Braswell and Skylake/Kaby Lake) support |
| 107 | to run a GOP blob. This option enables graphics initialization with |
| 108 | such a blob. |
| 109 | |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 110 | config NO_GFX_INIT |
| 111 | bool "None" |
| 112 | depends on !MAINBOARD_FORCE_NATIVE_VGA_INIT |
| 113 | help |
| 114 | Select this to not perform any graphics initialization in |
| 115 | coreboot. This is useful if the payload (e.g. SeaBIOS) can |
| 116 | initialize graphics or if pre-boot graphics are not required. |
| 117 | |
| 118 | endchoice |
Myles Watson | e680495 | 2009-08-28 14:36:12 +0000 | [diff] [blame] | 119 | |
Paul Menzel | c4062c7 | 2021-02-11 10:43:14 +0100 | [diff] [blame] | 120 | config PRE_GRAPHICS_DELAY_MS |
Kyösti Mälkki | 0f30063 | 2020-12-19 23:43:56 +0200 | [diff] [blame] | 121 | int "Graphics initialization delay in ms" |
| 122 | default 0 |
| 123 | depends on VGA_ROM_RUN |
| 124 | help |
| 125 | On some systems, coreboot boots so fast that connected monitors |
| 126 | (mostly TVs) won't be able to wake up fast enough to talk to the |
| 127 | VBIOS. On those systems we need to wait for a bit before executing |
| 128 | the VBIOS. |
| 129 | |
Arthur Heymans | b43ec47 | 2019-03-24 20:39:45 +0100 | [diff] [blame] | 130 | config ONBOARD_VGA_IS_PRIMARY |
| 131 | bool "Use onboard VGA as primary video device" |
| 132 | default n |
| 133 | depends on PCI |
| 134 | help |
| 135 | This option lets you select which VGA device will be used |
| 136 | to decode legacy VGA cycles. Not all chipsets implement this |
| 137 | however. If not selected, the last adapter found will be used, |
| 138 | else the onboard adapter is used. |
| 139 | |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 140 | config S3_VGA_ROM_RUN |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 141 | bool "Re-run VGA Option ROMs on S3 resume" |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 142 | default y |
| 143 | depends on VGA_ROM_RUN && HAVE_ACPI_RESUME |
| 144 | help |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 145 | Execute VGA Option ROMs in coreboot when resuming from S3 suspend. |
| 146 | |
| 147 | When using a SeaBIOS payload it runs all option ROMs with much |
| 148 | more complete BIOS interrupt services available than coreboot, |
| 149 | which some option ROMs require in order to function correctly. |
| 150 | |
| 151 | If unsure, say N when using SeaBIOS as payload, Y otherwise. |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 152 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 153 | config ALWAYS_LOAD_OPROM |
| 154 | def_bool n |
| 155 | depends on VGA_ROM_RUN |
| 156 | help |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 157 | Always load option ROMs if any are found. The decision to run |
| 158 | the ROM is still determined at runtime, but the distinction |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 159 | between loading and not running comes into play for CHROMEOS. |
| 160 | |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 161 | An example where this is required is that VBT (Video BIOS Tables) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 162 | are needed for the kernel's display driver to know how a piece of |
| 163 | hardware is configured to be used. |
| 164 | |
Aaron Durbin | 1051025 | 2018-01-30 10:04:02 -0700 | [diff] [blame] | 165 | config ALWAYS_RUN_OPROM |
| 166 | def_bool n |
| 167 | depends on VGA_ROM_RUN && ALWAYS_LOAD_OPROM |
| 168 | help |
Martin Roth | 0949e73 | 2021-10-01 14:28:22 -0600 | [diff] [blame] | 169 | Always unconditionally run the option regardless of other |
Aaron Durbin | 1051025 | 2018-01-30 10:04:02 -0700 | [diff] [blame] | 170 | policies. |
| 171 | |
Patrick Rudolph | 647e34d | 2016-02-11 08:36:50 +0100 | [diff] [blame] | 172 | config ON_DEVICE_ROM_LOAD |
| 173 | bool "Load Option ROMs on PCI devices" |
Peter Stuge | be0ede4 | 2012-10-27 14:17:04 +0200 | [diff] [blame] | 174 | default n if PAYLOAD_SEABIOS |
| 175 | default y if !PAYLOAD_SEABIOS |
Nico Huber | 49d99fc | 2017-05-20 17:56:02 +0200 | [diff] [blame] | 176 | depends on VGA_ROM_RUN |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 177 | help |
Nico Huber | 49d99fc | 2017-05-20 17:56:02 +0200 | [diff] [blame] | 178 | Load Option ROMs stored on PCI/PCIe/AGP VGA devices in coreboot. |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 179 | |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 180 | If disabled, only Option ROMs stored in CBFS will be executed by |
| 181 | coreboot. If you are concerned about security, you might want to |
| 182 | disable this option, but it might leave your system in a state of |
| 183 | degraded functionality. |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 184 | |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 185 | When using a SeaBIOS payload it runs all option ROMs with much |
| 186 | more complete BIOS interrupt services available than coreboot, |
| 187 | which some option ROMs require in order to function correctly. |
| 188 | |
| 189 | If unsure, say N when using SeaBIOS as payload, Y otherwise. |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 190 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 191 | choice |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 192 | prompt "Option ROM execution type" |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 193 | default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 |
| 194 | default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 |
Arthur Heymans | 57f70a1 | 2018-12-20 10:27:19 +0100 | [diff] [blame] | 195 | depends on VGA_ROM_RUN |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 196 | |
| 197 | config PCI_OPTION_ROM_RUN_REALMODE |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 198 | prompt "Native mode" |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 199 | bool |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 200 | depends on ARCH_X86 |
Myles Watson | 28412f5 | 2009-09-17 16:54:46 +0000 | [diff] [blame] | 201 | help |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 202 | If you select this option, PCI Option ROMs will be executed |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 203 | natively on the CPU in real mode. No CPU emulation is involved, |
| 204 | so this is the fastest, but also the least secure option. |
| 205 | (only works on x86/x64 systems) |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 206 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 207 | config PCI_OPTION_ROM_RUN_YABEL |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 208 | prompt "Secure mode" |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 209 | bool |
| 210 | help |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 211 | If you select this option, the x86emu CPU emulator will be used to |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 212 | execute PCI Option ROMs. |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 213 | |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 214 | This option prevents Option ROMs from doing dirty tricks with the |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 215 | system (such as installing SMM modules or hypervisors), but it is |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 216 | also significantly slower than the native Option ROM initialization |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 217 | method. |
| 218 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 219 | This is the default choice for non-x86 systems. |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 220 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 221 | endchoice |
Uwe Hermann | 5ec2c2b | 2009-08-25 00:53:22 +0000 | [diff] [blame] | 222 | |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 223 | config YABEL_PCI_ACCESS_OTHER_DEVICES |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 224 | prompt "Allow Option ROMs to access other devices" |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 225 | bool |
| 226 | depends on PCI_OPTION_ROM_RUN_YABEL |
| 227 | help |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 228 | Per default, YABEL only allows Option ROMs to access the PCI device |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 229 | that they are associated with. However, this causes trouble for some |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 230 | onboard graphics chips whose Option ROM needs to reconfigure the |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 231 | north bridge. |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 232 | |
Patrick Georgi | c4b2a1b | 2012-07-20 13:44:50 +0200 | [diff] [blame] | 233 | config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG |
| 234 | prompt "Fake success on writing other device's config space" |
| 235 | bool |
| 236 | depends on YABEL_PCI_ACCESS_OTHER_DEVICES |
| 237 | help |
| 238 | By default, YABEL aborts when the Option ROM tries to write to other |
| 239 | devices' config spaces. With this option enabled, the write doesn't |
| 240 | follow through, but the Option ROM is allowed to go on. |
| 241 | This can create issues such as hanging Option ROMs (if it depends on |
| 242 | that other register changing to the written value), so test for |
| 243 | impact before using this option. |
| 244 | |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 245 | config YABEL_VIRTMEM_LOCATION |
| 246 | prompt "Location of YABEL's virtual memory" |
| 247 | hex |
Alexandru Gagniuc | fdbc1af | 2015-08-26 10:11:02 -0400 | [diff] [blame] | 248 | depends on PCI_OPTION_ROM_RUN_YABEL |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 249 | default 0x1000000 |
| 250 | help |
| 251 | YABEL requires 1MB memory for its CPU emulation. This memory is |
| 252 | normally located at 16MB. |
| 253 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 254 | config YABEL_DIRECTHW |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 255 | prompt "Direct hardware access" |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 256 | bool |
Stefan Reinauer | 91f1423 | 2012-12-07 16:55:12 -0800 | [diff] [blame] | 257 | depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 |
Myles Watson | e680495 | 2009-08-28 14:36:12 +0000 | [diff] [blame] | 258 | help |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 259 | YABEL consists of two parts: It uses x86emu for the CPU emulation and |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 260 | additionally provides a PC system emulation that filters bad device |
| 261 | and memory access (such as PCI config space access to other devices |
| 262 | than the initialized one). |
| 263 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 264 | When choosing this option, x86emu will pass through all hardware |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 265 | accesses to memory and I/O devices to the underlying memory and I/O |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 266 | addresses. While this option prevents Option ROMs from doing dirty |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 267 | tricks with the CPU (such as installing SMM modules or hypervisors), |
| 268 | they can still access all devices in the system. |
| 269 | Enable this option for a good compromise between security and speed. |
| 270 | |
Stefan Reinauer | abc0c85 | 2010-11-22 08:09:50 +0000 | [diff] [blame] | 271 | config MULTIPLE_VGA_ADAPTERS |
Myles Watson | 28412f5 | 2009-09-17 16:54:46 +0000 | [diff] [blame] | 272 | bool |
| 273 | default n |
| 274 | |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 275 | menu "Display" |
| 276 | depends on HAVE_VGA_TEXT_FRAMEBUFFER || HAVE_LINEAR_FRAMEBUFFER |
| 277 | |
| 278 | config FRAMEBUFFER_SET_VESA_MODE |
| 279 | prompt "Set framebuffer graphics resolution" |
| 280 | bool |
Nico Huber | 7ebb018 | 2019-07-22 18:17:40 +0200 | [diff] [blame] | 281 | default y if CHROMEOS |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 282 | depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE |
| 283 | select HAVE_VBE_LINEAR_FRAMEBUFFER |
| 284 | help |
| 285 | Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console) |
| 286 | |
| 287 | if FRAMEBUFFER_SET_VESA_MODE |
| 288 | |
| 289 | choice |
| 290 | prompt "framebuffer graphics resolution" |
Mike Banon | 749fe1e | 2019-02-23 21:43:05 +0300 | [diff] [blame] | 291 | default FRAMEBUFFER_VESA_MODE_118 |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 292 | help |
| 293 | This option sets the resolution used for the coreboot framebuffer (and |
| 294 | bootsplash screen). |
| 295 | |
| 296 | config FRAMEBUFFER_VESA_MODE_100 |
| 297 | bool "640x400 256-color" |
| 298 | |
| 299 | config FRAMEBUFFER_VESA_MODE_101 |
| 300 | bool "640x480 256-color" |
| 301 | |
| 302 | config FRAMEBUFFER_VESA_MODE_102 |
| 303 | bool "800x600 16-color" |
| 304 | |
| 305 | config FRAMEBUFFER_VESA_MODE_103 |
| 306 | bool "800x600 256-color" |
| 307 | |
| 308 | config FRAMEBUFFER_VESA_MODE_104 |
| 309 | bool "1024x768 16-color" |
| 310 | |
| 311 | config FRAMEBUFFER_VESA_MODE_105 |
| 312 | bool "1024x768 256-color" |
| 313 | |
| 314 | config FRAMEBUFFER_VESA_MODE_106 |
| 315 | bool "1280x1024 16-color" |
| 316 | |
| 317 | config FRAMEBUFFER_VESA_MODE_107 |
| 318 | bool "1280x1024 256-color" |
| 319 | |
| 320 | config FRAMEBUFFER_VESA_MODE_108 |
| 321 | bool "80x60 text" |
| 322 | |
| 323 | config FRAMEBUFFER_VESA_MODE_109 |
| 324 | bool "132x25 text" |
| 325 | |
| 326 | config FRAMEBUFFER_VESA_MODE_10A |
| 327 | bool "132x43 text" |
| 328 | |
| 329 | config FRAMEBUFFER_VESA_MODE_10B |
| 330 | bool "132x50 text" |
| 331 | |
| 332 | config FRAMEBUFFER_VESA_MODE_10C |
| 333 | bool "132x60 text" |
| 334 | |
| 335 | config FRAMEBUFFER_VESA_MODE_10D |
| 336 | bool "320x200 32k-color (1:5:5:5)" |
| 337 | |
| 338 | config FRAMEBUFFER_VESA_MODE_10E |
| 339 | bool "320x200 64k-color (5:6:5)" |
| 340 | |
| 341 | config FRAMEBUFFER_VESA_MODE_10F |
| 342 | bool "320x200 16.8M-color (8:8:8)" |
| 343 | |
| 344 | config FRAMEBUFFER_VESA_MODE_110 |
| 345 | bool "640x480 32k-color (1:5:5:5)" |
| 346 | |
| 347 | config FRAMEBUFFER_VESA_MODE_111 |
| 348 | bool "640x480 64k-color (5:6:5)" |
| 349 | |
| 350 | config FRAMEBUFFER_VESA_MODE_112 |
| 351 | bool "640x480 16.8M-color (8:8:8)" |
| 352 | |
| 353 | config FRAMEBUFFER_VESA_MODE_113 |
| 354 | bool "800x600 32k-color (1:5:5:5)" |
| 355 | |
| 356 | config FRAMEBUFFER_VESA_MODE_114 |
| 357 | bool "800x600 64k-color (5:6:5)" |
| 358 | |
| 359 | config FRAMEBUFFER_VESA_MODE_115 |
| 360 | bool "800x600 16.8M-color (8:8:8)" |
| 361 | |
| 362 | config FRAMEBUFFER_VESA_MODE_116 |
| 363 | bool "1024x768 32k-color (1:5:5:5)" |
| 364 | |
| 365 | config FRAMEBUFFER_VESA_MODE_117 |
| 366 | bool "1024x768 64k-color (5:6:5)" |
| 367 | |
| 368 | config FRAMEBUFFER_VESA_MODE_118 |
| 369 | bool "1024x768 16.8M-color (8:8:8)" |
| 370 | |
| 371 | config FRAMEBUFFER_VESA_MODE_119 |
| 372 | bool "1280x1024 32k-color (1:5:5:5)" |
| 373 | |
| 374 | config FRAMEBUFFER_VESA_MODE_11A |
| 375 | bool "1280x1024 64k-color (5:6:5)" |
| 376 | |
| 377 | config FRAMEBUFFER_VESA_MODE_11B |
| 378 | bool "1280x1024 16.8M-color (8:8:8)" |
| 379 | |
| 380 | config FRAMEBUFFER_VESA_MODE_USER |
| 381 | bool "Manually select VESA mode" |
| 382 | |
| 383 | endchoice |
| 384 | |
| 385 | # Map the config names to an integer (KB). |
| 386 | config FRAMEBUFFER_VESA_MODE |
| 387 | prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER |
| 388 | hex |
| 389 | default 0x100 if FRAMEBUFFER_VESA_MODE_100 |
| 390 | default 0x101 if FRAMEBUFFER_VESA_MODE_101 |
| 391 | default 0x102 if FRAMEBUFFER_VESA_MODE_102 |
| 392 | default 0x103 if FRAMEBUFFER_VESA_MODE_103 |
| 393 | default 0x104 if FRAMEBUFFER_VESA_MODE_104 |
| 394 | default 0x105 if FRAMEBUFFER_VESA_MODE_105 |
| 395 | default 0x106 if FRAMEBUFFER_VESA_MODE_106 |
| 396 | default 0x107 if FRAMEBUFFER_VESA_MODE_107 |
| 397 | default 0x108 if FRAMEBUFFER_VESA_MODE_108 |
| 398 | default 0x109 if FRAMEBUFFER_VESA_MODE_109 |
| 399 | default 0x10A if FRAMEBUFFER_VESA_MODE_10A |
| 400 | default 0x10B if FRAMEBUFFER_VESA_MODE_10B |
| 401 | default 0x10C if FRAMEBUFFER_VESA_MODE_10C |
| 402 | default 0x10D if FRAMEBUFFER_VESA_MODE_10D |
| 403 | default 0x10E if FRAMEBUFFER_VESA_MODE_10E |
| 404 | default 0x10F if FRAMEBUFFER_VESA_MODE_10F |
| 405 | default 0x110 if FRAMEBUFFER_VESA_MODE_110 |
| 406 | default 0x111 if FRAMEBUFFER_VESA_MODE_111 |
| 407 | default 0x112 if FRAMEBUFFER_VESA_MODE_112 |
| 408 | default 0x113 if FRAMEBUFFER_VESA_MODE_113 |
| 409 | default 0x114 if FRAMEBUFFER_VESA_MODE_114 |
| 410 | default 0x115 if FRAMEBUFFER_VESA_MODE_115 |
| 411 | default 0x116 if FRAMEBUFFER_VESA_MODE_116 |
| 412 | default 0x117 if FRAMEBUFFER_VESA_MODE_117 |
| 413 | default 0x118 if FRAMEBUFFER_VESA_MODE_118 |
| 414 | default 0x119 if FRAMEBUFFER_VESA_MODE_119 |
| 415 | default 0x11A if FRAMEBUFFER_VESA_MODE_11A |
| 416 | default 0x11B if FRAMEBUFFER_VESA_MODE_11B |
Mike Banon | 749fe1e | 2019-02-23 21:43:05 +0300 | [diff] [blame] | 417 | default 0x118 if FRAMEBUFFER_VESA_MODE_USER |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 418 | endif # FRAMEBUFFER_SET_VESA_MODE |
| 419 | |
Angel Pons | 4cb2f76 | 2020-06-16 19:49:53 +0200 | [diff] [blame] | 420 | config WANT_LINEAR_FRAMEBUFFER |
| 421 | bool |
| 422 | default y if CHROMEOS |
| 423 | default y if PAYLOAD_TIANOCORE |
Nicholas Chin | 8d88557 | 2021-08-28 09:40:41 -0600 | [diff] [blame] | 424 | default y if COREDOOM_SECONDARY_PAYLOAD |
Angel Pons | 4cb2f76 | 2020-06-16 19:49:53 +0200 | [diff] [blame] | 425 | |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 426 | choice |
| 427 | prompt "Framebuffer mode" |
Angel Pons | 4cb2f76 | 2020-06-16 19:49:53 +0200 | [diff] [blame] | 428 | default VBE_LINEAR_FRAMEBUFFER if HAVE_VBE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER |
| 429 | default GENERIC_LINEAR_FRAMEBUFFER if HAVE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 430 | default VGA_TEXT_FRAMEBUFFER |
| 431 | |
| 432 | config VGA_TEXT_FRAMEBUFFER |
| 433 | bool "Legacy VGA text mode" |
| 434 | depends on HAVE_VGA_TEXT_FRAMEBUFFER |
| 435 | help |
| 436 | If this option is enabled, coreboot will initialize graphics in |
| 437 | legacy VGA text mode or, if a VGA BIOS is used and a VESA mode set, |
| 438 | switch to text mode before handing control to a payload. |
| 439 | |
| 440 | config VBE_LINEAR_FRAMEBUFFER |
| 441 | bool "VESA framebuffer" |
| 442 | depends on HAVE_VBE_LINEAR_FRAMEBUFFER |
| 443 | help |
| 444 | This option keeps the framebuffer mode set after coreboot finishes |
| 445 | execution. If this option is enabled, coreboot will pass a |
| 446 | framebuffer entry in its coreboot table and the payload will need a |
| 447 | compatible driver. |
| 448 | |
| 449 | config GENERIC_LINEAR_FRAMEBUFFER |
| 450 | bool "Linear \"high-resolution\" framebuffer" |
| 451 | depends on HAVE_LINEAR_FRAMEBUFFER |
| 452 | help |
| 453 | This option enables a high-resolution, linear framebuffer. If this |
| 454 | option is enabled, coreboot will pass a framebuffer entry in its |
| 455 | coreboot table and the payload will need a compatible driver. |
| 456 | |
| 457 | endchoice |
| 458 | |
| 459 | # Workaround to have LINEAR_FRAMEBUFFER set in both cases |
| 460 | # VBE_LINEAR_FRAMEBUFFER and GENERIC_LINEAR_FRAMEBUFFER. |
| 461 | # `kconfig_lint` doesn't let us use the same name with |
| 462 | # different texts in the choice above. |
| 463 | config LINEAR_FRAMEBUFFER |
| 464 | def_bool y |
| 465 | depends on VBE_LINEAR_FRAMEBUFFER || GENERIC_LINEAR_FRAMEBUFFER |
| 466 | |
Johanna Schander | c544a85 | 2019-07-28 09:28:33 +0200 | [diff] [blame] | 467 | config BOOTSPLASH |
| 468 | prompt "Show graphical bootsplash" |
| 469 | bool |
| 470 | depends on LINEAR_FRAMEBUFFER |
| 471 | help |
| 472 | This option shows a graphical bootsplash screen. The graphics are |
| 473 | loaded from the CBFS file bootsplash.jpg. |
| 474 | |
| 475 | You can either specify the location and file name of the |
| 476 | image in the 'General' section or add it manually to CBFS, using, |
| 477 | for example, cbfstool. |
| 478 | |
Nico Huber | 2bc892c | 2019-01-01 22:28:47 +0100 | [diff] [blame] | 479 | config LINEAR_FRAMEBUFFER_MAX_WIDTH |
| 480 | int "Maximum width in pixels" |
| 481 | depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT |
| 482 | default 2560 |
| 483 | help |
| 484 | Set the maximum width of the framebuffer. This may help with |
| 485 | default fonts too tiny for high-resolution displays. |
| 486 | |
| 487 | config LINEAR_FRAMEBUFFER_MAX_HEIGHT |
| 488 | int "Maximum height in pixels" |
| 489 | depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT |
| 490 | default 1600 |
| 491 | help |
| 492 | Set the maximum height of the framebuffer. This may help with |
| 493 | default fonts too tiny for high-resolution displays. |
| 494 | |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 495 | endmenu # "Display" |
| 496 | |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 497 | config PCI |
| 498 | bool |
| 499 | default n |
| 500 | |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 501 | if PCI |
| 502 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 503 | config NO_ECAM_MMCONF_SUPPORT |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 504 | bool |
Kyösti Mälkki | 3d15e10 | 2016-11-29 16:46:56 +0200 | [diff] [blame] | 505 | default n |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 506 | help |
| 507 | Disable the use of the Enhanced Configuration |
| 508 | Access mechanism (ECAM) method for accessing PCI config |
| 509 | address space. |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 510 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 511 | config ECAM_MMCONF_SUPPORT |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 512 | bool |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 513 | default !NO_ECAM_MMCONF_SUPPORT |
| 514 | help |
| 515 | Enable the use of the Enhanced Configuration |
| 516 | Access mechanism (ECAM) method for accessing PCI config |
| 517 | address space. |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 518 | |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 519 | config PCIX_PLUGIN_SUPPORT |
| 520 | bool |
Myles Watson | ed03556 | 2009-09-22 21:29:32 +0000 | [diff] [blame] | 521 | default y |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 522 | |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 523 | config CARDBUS_PLUGIN_SUPPORT |
| 524 | bool |
Myles Watson | ed03556 | 2009-09-22 21:29:32 +0000 | [diff] [blame] | 525 | default y |
Duncan Laurie | 90dcdd4 | 2011-10-25 14:15:11 -0700 | [diff] [blame] | 526 | |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 527 | config AZALIA_PLUGIN_SUPPORT |
| 528 | bool |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 529 | default n |
| 530 | |
Angel Pons | b922cbb | 2021-03-22 14:21:28 +0100 | [diff] [blame] | 531 | config AZALIA_LOCK_DOWN_R_WO_GCAP |
| 532 | def_bool n |
| 533 | depends on AZALIA_PLUGIN_SUPPORT |
| 534 | help |
| 535 | The GCAP register is implemented as R/WO (Read / Write Once) on some |
| 536 | HD Audio controllers, such as Intel 6-series PCHs. Select this option |
| 537 | to lock down the GCAP register after deasserting the controller reset |
| 538 | bit. Locking is done by reading GCAP and writing back the read value. |
| 539 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 540 | config PCIEXP_PLUGIN_SUPPORT |
| 541 | bool |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 542 | default y |
| 543 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 544 | config ECAM_MMCONF_BASE_ADDRESS |
Angel Pons | 7d63878 | 2021-01-28 12:51:11 +0100 | [diff] [blame] | 545 | hex |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 546 | depends on ECAM_MMCONF_SUPPORT |
Angel Pons | 7d63878 | 2021-01-28 12:51:11 +0100 | [diff] [blame] | 547 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 548 | config ECAM_MMCONF_BUS_NUMBER |
Angel Pons | 7d63878 | 2021-01-28 12:51:11 +0100 | [diff] [blame] | 549 | int |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 550 | depends on ECAM_MMCONF_SUPPORT |
Angel Pons | 7d63878 | 2021-01-28 12:51:11 +0100 | [diff] [blame] | 551 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 552 | config ECAM_MMCONF_LENGTH |
Angel Pons | 5063287 | 2021-01-28 13:04:06 +0100 | [diff] [blame] | 553 | hex |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 554 | depends on ECAM_MMCONF_SUPPORT |
| 555 | default 0x04000000 if ECAM_MMCONF_BUS_NUMBER = 64 |
| 556 | default 0x08000000 if ECAM_MMCONF_BUS_NUMBER = 128 |
| 557 | default 0x10000000 if ECAM_MMCONF_BUS_NUMBER = 256 |
Angel Pons | 5063287 | 2021-01-28 13:04:06 +0100 | [diff] [blame] | 558 | default 0x0 |
| 559 | |
Felix Singer | e4a7d9f | 2020-06-15 15:00:56 +0200 | [diff] [blame] | 560 | config PCI_ALLOW_BUS_MASTER |
Felix Singer | 05b883e | 2020-10-13 15:12:01 +0200 | [diff] [blame] | 561 | bool "Allow coreboot to set optional PCI bus master bits" |
Felix Singer | e4a7d9f | 2020-06-15 15:00:56 +0200 | [diff] [blame] | 562 | default y |
| 563 | help |
| 564 | For security reasons, bus mastering should be enabled as late as |
| 565 | possible. In coreboot, it's usually not necessary and payloads |
| 566 | should only enable it for devices they use. Since not all payloads |
| 567 | enable bus mastering properly yet, this option gives some sort of |
| 568 | "backwards compatibility" and is enabled by default to keep the |
| 569 | traditional behaviour for now. This is currently necessary, for |
| 570 | instance, for libpayload based payloads as the drivers don't enable |
| 571 | bus mastering for PCI bridges. |
| 572 | |
Felix Singer | 3d9fa08 | 2020-09-07 13:57:49 +0200 | [diff] [blame] | 573 | if PCI_ALLOW_BUS_MASTER |
| 574 | |
Felix Singer | 205b53e | 2020-09-07 15:21:21 +0200 | [diff] [blame] | 575 | config PCI_SET_BUS_MASTER_PCI_BRIDGES |
| 576 | bool "PCI bridges" |
| 577 | default y |
| 578 | help |
| 579 | Let coreboot configure bus mastering for PCI bridges. Enabling bus |
| 580 | mastering for a PCI bridge also allows it to forward requests from |
| 581 | downstream devices. Currently, payloads ignore this and only enable |
| 582 | bus mastering for the downstream device. Hence, this option is needed |
| 583 | for compatibility until payloads are fixed. |
| 584 | |
Felix Singer | 3d9fa08 | 2020-09-07 13:57:49 +0200 | [diff] [blame] | 585 | config PCI_ALLOW_BUS_MASTER_ANY_DEVICE |
| 586 | bool "Any devices" |
| 587 | default y |
Felix Singer | 205b53e | 2020-09-07 15:21:21 +0200 | [diff] [blame] | 588 | select PCI_SET_BUS_MASTER_PCI_BRIDGES |
Felix Singer | 3d9fa08 | 2020-09-07 13:57:49 +0200 | [diff] [blame] | 589 | help |
| 590 | Allow coreboot to enable PCI bus mastering for any device. The actual |
| 591 | selection of devices depends on the various PCI drivers in coreboot. |
| 592 | |
| 593 | endif # PCI_ALLOW_BUS_MASTER |
| 594 | |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 595 | endif # PCI |
| 596 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 597 | if PCIEXP_PLUGIN_SUPPORT |
| 598 | |
Duncan Laurie | 90dcdd4 | 2011-10-25 14:15:11 -0700 | [diff] [blame] | 599 | config PCIEXP_COMMON_CLOCK |
| 600 | prompt "Enable PCIe Common Clock" |
| 601 | bool |
| 602 | default n |
| 603 | help |
| 604 | Detect and enable Common Clock on PCIe links. |
| 605 | |
| 606 | config PCIEXP_ASPM |
| 607 | prompt "Enable PCIe ASPM" |
| 608 | bool |
| 609 | default n |
| 610 | help |
Jonathan Neuschäfer | 8c50e68 | 2016-12-27 16:31:28 +0100 | [diff] [blame] | 611 | Detect and enable ASPM (Active State Power Management) on PCIe links. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 612 | |
Kane Chen | 18cb134 | 2014-10-01 11:13:54 +0800 | [diff] [blame] | 613 | config PCIEXP_CLK_PM |
| 614 | prompt "Enable PCIe Clock Power Management" |
| 615 | bool |
Kane Chen | 18cb134 | 2014-10-01 11:13:54 +0800 | [diff] [blame] | 616 | default n |
| 617 | help |
| 618 | Detect and enable Clock Power Management on PCIe. |
| 619 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 620 | config PCIEXP_L1_SUB_STATE |
| 621 | prompt "Enable PCIe ASPM L1 SubState" |
| 622 | bool |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 623 | depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT) |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 624 | default n |
| 625 | help |
| 626 | Detect and enable ASPM on PCIe links. |
| 627 | |
Tim Wawrzynczak | 8c93fed | 2022-01-13 16:45:07 -0700 | [diff] [blame] | 628 | config PCIEXP_SUPPORT_RESIZABLE_BARS |
| 629 | prompt "Support PCIe Resizable BARs" |
| 630 | bool |
| 631 | depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT) |
| 632 | default n |
| 633 | help |
| 634 | When enabled, this will check PCIe devices for Resizable BAR support, |
| 635 | and if found, will use this to discover the preferred BAR sizes of |
| 636 | the device in preference over the traditional moving bits method. The |
| 637 | amount of address space given out to devices in this manner (since |
| 638 | it can range up to 8 EB) can be limited with the |
| 639 | PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS Kconfig setting below. |
| 640 | |
| 641 | if PCIEXP_SUPPORT_RESIZABLE_BARS |
| 642 | |
| 643 | config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS |
| 644 | int "Bits of address space to give to Resizable BARs" |
| 645 | range 20 63 # 1 MiB - 8 EiB |
| 646 | default 29 # 512 MiB |
| 647 | help |
| 648 | This is the maximum number of bits of address space to allocate for |
| 649 | PCIe devices with resizable BARs. For instance, if a device requests |
| 650 | 30 bits of address space (1 GiB), but this field is set to 29, then |
| 651 | the device will only be allocated 29 bits worth of address space (512 |
| 652 | MiB). Valid values range from 20 (1 MiB) to 63 (8 EiB); these come |
| 653 | from the Resizable BAR portion of the PCIe spec (7.8.6). |
| 654 | |
| 655 | endif # PCIEXP_SUPPORT_RESIZABLE_BARS |
| 656 | |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 657 | config PCIEXP_HOTPLUG |
| 658 | prompt "Enable PCIe Hotplug Support" |
| 659 | bool |
| 660 | default n |
| 661 | help |
| 662 | Allocate resources for PCIe hotplug bridges |
| 663 | |
| 664 | if PCIEXP_HOTPLUG |
| 665 | |
| 666 | config PCIEXP_HOTPLUG_BUSES |
| 667 | int "PCI Express Hotplug Buses" |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 668 | default 8 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <= 64 |
| 669 | default 16 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <= 128 |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 670 | default 32 |
| 671 | help |
| 672 | This is the number of buses allocated for hotplug PCI express |
| 673 | bridges, for use by hotplugged child devices. The default is 32 |
| 674 | buses. |
| 675 | |
| 676 | config PCIEXP_HOTPLUG_MEM |
| 677 | hex "PCI Express Hotplug Memory" |
| 678 | default 0x800000 |
| 679 | help |
| 680 | This is the amount of memory space, in bytes, to allocate to |
| 681 | hotplug PCI express bridges, for use by hotplugged child devices. |
| 682 | This size should be page-aligned. The default is 8 MiB. |
| 683 | |
| 684 | config PCIEXP_HOTPLUG_PREFETCH_MEM |
| 685 | hex "PCI Express Hotplug Prefetch Memory" |
| 686 | default 0x10000000 |
| 687 | help |
| 688 | This is the amount of pre-fetchable memory space, in bytes, to |
| 689 | allocate to hot-plug PCI express bridges, for use by hotplugged |
| 690 | child devices. This size should be page-aligned. The default is |
| 691 | 256 MiB. |
| 692 | |
Furquan Shaikh | 32f385e | 2020-05-15 23:35:00 -0700 | [diff] [blame] | 693 | config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G |
| 694 | bool |
| 695 | depends on RESOURCE_ALLOCATOR_V4 |
| 696 | default y if !PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G |
| 697 | default n |
| 698 | help |
| 699 | This enables prefetch memory allocation above 4G boundary for the |
| 700 | hotplug resources. |
| 701 | |
| 702 | config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G |
| 703 | bool "PCI Express Hotplug Prefetch Memory Allocation below 4G boundary" |
| 704 | default n |
| 705 | help |
| 706 | This enables prefetch memory allocation below 4G boundary for the |
| 707 | hotplug resources. |
| 708 | |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 709 | config PCIEXP_HOTPLUG_IO |
| 710 | hex "PCI Express Hotplug I/O Space" |
| 711 | default 0x2000 |
| 712 | help |
| 713 | This is the amount of I/O space to allocate to hot-plug PCI |
| 714 | express bridges, for use by hotplugged child devices. The default |
| 715 | is 8 KiB. |
| 716 | |
| 717 | endif # PCIEXP_HOTPLUG |
| 718 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 719 | endif # PCIEXP_PLUGIN_SUPPORT |
| 720 | |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 721 | config EARLY_PCI_BRIDGE |
| 722 | bool "Early PCI bridge" |
| 723 | depends on PCI |
| 724 | default n |
| 725 | help |
| 726 | While coreboot is executing code from ROM, the coreboot resource |
| 727 | allocator has not been running yet. Hence PCI devices living behind |
| 728 | a bridge are not yet visible to the system. |
| 729 | |
| 730 | This option enables static configuration for a single pre-defined |
| 731 | PCI bridge function on bus 0. |
| 732 | |
| 733 | if EARLY_PCI_BRIDGE |
| 734 | |
| 735 | config EARLY_PCI_BRIDGE_DEVICE |
| 736 | hex "bridge device" |
| 737 | default 0x0 |
| 738 | |
| 739 | config EARLY_PCI_BRIDGE_FUNCTION |
| 740 | hex "bridge function" |
| 741 | default 0x0 |
| 742 | |
| 743 | config EARLY_PCI_MMIO_BASE |
| 744 | hex "MMIO window base" |
| 745 | default 0x0 |
| 746 | |
| 747 | endif # EARLY_PCI_BRIDGE |
| 748 | |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 749 | config SUBSYSTEM_VENDOR_ID |
| 750 | hex "Override PCI Subsystem Vendor ID" |
| 751 | depends on PCI |
Martin Roth | 3b87812 | 2016-09-30 14:43:01 -0600 | [diff] [blame] | 752 | default 0x0000 |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 753 | help |
| 754 | This config option will override the devicetree settings for |
| 755 | PCI Subsystem Vendor ID. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 756 | |
Michael Niewöhner | e0d749c | 2020-09-18 03:12:00 +0200 | [diff] [blame] | 757 | Note: This option is not meant for a board's Kconfig; use the |
| 758 | devicetree setting `subsystemid` instead. |
| 759 | |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 760 | config SUBSYSTEM_DEVICE_ID |
| 761 | hex "Override PCI Subsystem Device ID" |
| 762 | depends on PCI |
Martin Roth | 3b87812 | 2016-09-30 14:43:01 -0600 | [diff] [blame] | 763 | default 0x0000 |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 764 | help |
| 765 | This config option will override the devicetree settings for |
| 766 | PCI Subsystem Device ID. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 767 | |
Michael Niewöhner | e0d749c | 2020-09-18 03:12:00 +0200 | [diff] [blame] | 768 | Note: This option is not meant for a board's Kconfig; use the |
| 769 | devicetree setting `subsystemid` instead. |
| 770 | |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 771 | config VGA_BIOS |
| 772 | bool "Add a VGA BIOS image" |
Vladimir Serbinenko | d51a089 | 2016-03-04 09:20:20 +0100 | [diff] [blame] | 773 | depends on ARCH_X86 |
Subrata Banik | af03936 | 2020-12-30 16:09:56 +0530 | [diff] [blame] | 774 | select VGA_ROM_RUN_DEFAULT |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 775 | help |
| 776 | Select this option if you have a VGA BIOS image that you would |
| 777 | like to add to your ROM. |
| 778 | |
| 779 | You will be able to specify the location and file name of the |
| 780 | image later. |
| 781 | |
| 782 | config VGA_BIOS_FILE |
| 783 | string "VGA BIOS path and filename" |
| 784 | depends on VGA_BIOS |
| 785 | default "vgabios.bin" |
| 786 | help |
| 787 | The path and filename of the file to use as VGA BIOS. |
| 788 | |
| 789 | config VGA_BIOS_ID |
| 790 | string "VGA device PCI IDs" |
| 791 | depends on VGA_BIOS |
| 792 | default "1106,3230" |
| 793 | help |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 794 | The comma-separated PCI vendor and device ID with optional revision if that |
| 795 | feature is enabled that would associate your vBIOS to your video card. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 796 | |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 797 | Example: 1106,3230 or 1106,3230,a3 |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 798 | |
| 799 | In the above example 1106 is the PCI vendor ID (in hex, but without |
| 800 | the "0x" prefix) and 3230 specifies the PCI device ID of the |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 801 | video card (also in hex, without "0x" prefix). a3 specifies the revision. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 802 | |
Daniele Forsi | f2fb7d9 | 2014-07-17 11:59:41 +0200 | [diff] [blame] | 803 | Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| 804 | |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 805 | config VGA_BIOS_SECOND |
| 806 | bool "Add a 2nd video BIOS image" |
| 807 | depends on ARCH_X86 && VGA_BIOS |
| 808 | help |
| 809 | Select this option if you have a 2nd video BIOS image that you would |
| 810 | like to add to your ROM. |
| 811 | |
| 812 | config VGA_BIOS_SECOND_FILE |
| 813 | string "2nd video BIOS path and filename" |
| 814 | depends on VGA_BIOS_SECOND |
| 815 | default "vbios2.bin" |
| 816 | help |
| 817 | The path and filename of the file to use as video BIOS. |
| 818 | |
| 819 | config VGA_BIOS_SECOND_ID |
| 820 | string "Graphics device PCI IDs" |
| 821 | depends on VGA_BIOS_SECOND |
| 822 | help |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 823 | The comma-separated PCI vendor and device ID with optional revision if that |
| 824 | feature is enabled that would associate your vBIOS to your video card. |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 825 | |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 826 | Example: 1106,3230 or 1106,3230,a3 |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 827 | |
| 828 | In the above example 1106 is the PCI vendor ID (in hex, but without |
| 829 | the "0x" prefix) and 3230 specifies the PCI device ID of the |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 830 | video card (also in hex, without "0x" prefix). a3 specifies the revision. |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 831 | |
| 832 | Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| 833 | |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 834 | config CHECK_REV_IN_OPROM_NAME |
| 835 | def_bool n |
| 836 | help |
| 837 | Select this in the platform BIOS or chipset if the option rom has a revision |
| 838 | that needs to be checked when searching CBFS. |
| 839 | |
Mike Banon | 0f8547e | 2019-02-17 19:51:53 +0300 | [diff] [blame] | 840 | config VGA_BIOS_DGPU |
| 841 | bool "Add a discrete VGA BIOS image" |
| 842 | depends on VGA_BIOS |
| 843 | help |
| 844 | Select this option if you have a VGA BIOS image for discrete GPU |
| 845 | that you would like to add to your ROM. |
| 846 | |
| 847 | You will be able to specify the location and file name of the |
| 848 | image later. |
| 849 | |
| 850 | config VGA_BIOS_DGPU_FILE |
| 851 | string "Discrete VGA BIOS path and filename" |
| 852 | depends on VGA_BIOS_DGPU |
| 853 | default "vgabios_dgpu.bin" |
| 854 | help |
| 855 | The path and filename of the file to use as VGA BIOS for discrete GPU. |
| 856 | |
| 857 | config VGA_BIOS_DGPU_ID |
| 858 | string "Discrete VGA device PCI IDs" |
| 859 | depends on VGA_BIOS_DGPU |
| 860 | default "1002,6663" |
| 861 | help |
| 862 | The comma-separated PCI vendor and device ID that would associate |
| 863 | your VGA BIOS to your discrete video card. |
| 864 | |
| 865 | Examples: |
| 866 | 1002,6663 for HD 8570M |
| 867 | 1002,6665 for R5 M230 |
| 868 | |
| 869 | In the above examples 1002 is the PCI vendor ID (in hex, but without |
| 870 | the "0x" prefix) and 6663 / 6665 specifies the PCI device ID of the |
| 871 | discrete video card (also in hex, without "0x" prefix). |
| 872 | |
| 873 | Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| 874 | |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 875 | config INTEL_GMA_HAVE_VBT |
Arthur Heymans | 7225a36 | 2018-05-28 21:09:21 +0200 | [diff] [blame] | 876 | bool |
| 877 | help |
| 878 | Select this in the mainboard Kconfig to indicate the board has |
| 879 | a data.vbt file. |
| 880 | |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 881 | config INTEL_GMA_ADD_VBT |
Patrick Rudolph | 4c17098 | 2017-07-17 19:53:56 +0200 | [diff] [blame] | 882 | depends on SOC_INTEL_COMMON || CPU_INTEL_COMMON |
Elyes HAOUAS | 6dc9d03 | 2020-02-16 16:22:52 +0100 | [diff] [blame] | 883 | bool "Add a Video BIOS Table (VBT) binary to CBFS" |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 884 | default y if INTEL_GMA_HAVE_VBT |
Patrick Rudolph | 4c17098 | 2017-07-17 19:53:56 +0200 | [diff] [blame] | 885 | help |
| 886 | Add a VBT data file to CBFS. The VBT describes the integrated |
| 887 | GPU and connections, and is needed by the GOP driver integrated into |
| 888 | FSP and the OS driver in order to initialize the display. |
| 889 | |
| 890 | config INTEL_GMA_VBT_FILE |
| 891 | string "VBT binary path and filename" |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 892 | depends on INTEL_GMA_ADD_VBT |
Patrick Georgi | b8fba86 | 2020-06-17 21:06:53 +0200 | [diff] [blame] | 893 | default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(VARIANT_DIR)/data.vbt" \ |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 894 | if INTEL_GMA_HAVE_VBT && VARIANT_DIR != "" |
Patrick Georgi | b8fba86 | 2020-06-17 21:06:53 +0200 | [diff] [blame] | 895 | default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if INTEL_GMA_HAVE_VBT |
| 896 | default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/vbt.bin" |
Patrick Rudolph | 4c17098 | 2017-07-17 19:53:56 +0200 | [diff] [blame] | 897 | help |
| 898 | The path and filename of the VBT binary. |
| 899 | |
Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 900 | config SOFTWARE_I2C |
| 901 | bool "Enable I2C controller emulation in software" |
| 902 | default n |
| 903 | help |
| 904 | This config option will enable code to override the i2c_transfer |
| 905 | routine with a (simple) software emulation of the protocol. This may |
| 906 | be useful for debugging or on platforms where a driver for the real |
| 907 | I2C controller is not (yet) available. The platform code needs to |
| 908 | provide bindings to manually toggle I2C lines. |
Kyösti Mälkki | a91e1e6 | 2014-12-31 10:36:08 +0200 | [diff] [blame] | 909 | |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 910 | config I2C_TRANSFER_TIMEOUT_US |
| 911 | int "I2C transfer timeout in microseconds" |
| 912 | default 500000 |
| 913 | help |
| 914 | Timeout for a read/write transfers on the I2C bus, that is, the |
| 915 | maximum time a device could stretch clock bits before the transfer |
| 916 | is aborted and an error returned. |
| 917 | |
Furquan Shaikh | 6939574 | 2020-05-15 15:43:15 -0700 | [diff] [blame] | 918 | config RESOURCE_ALLOCATOR_V3 |
| 919 | bool |
Furquan Shaikh | 23b874a | 2020-05-15 16:25:47 -0700 | [diff] [blame] | 920 | default n |
Furquan Shaikh | 6939574 | 2020-05-15 15:43:15 -0700 | [diff] [blame] | 921 | help |
| 922 | This config option enables resource allocator v3 which performs |
Furquan Shaikh | 23b874a | 2020-05-15 16:25:47 -0700 | [diff] [blame] | 923 | top down allocation of resources in a single MMIO window. This is the |
| 924 | old resource allocator meant to be used only until the broken AMD |
| 925 | chipsets are fixed. DO NOT USE THIS FOR ANY NEW CHIPSETS! |
Furquan Shaikh | 6939574 | 2020-05-15 15:43:15 -0700 | [diff] [blame] | 926 | |
Furquan Shaikh | f4bc9eb | 2020-05-15 16:04:28 -0700 | [diff] [blame] | 927 | config RESOURCE_ALLOCATOR_V4 |
| 928 | bool |
| 929 | default n if RESOURCE_ALLOCATOR_V3 |
| 930 | default y if !RESOURCE_ALLOCATOR_V3 |
| 931 | help |
| 932 | This config option enables resource allocator v4 which uses multiple |
| 933 | ranges for allocating resources. This allows allocation of resources |
| 934 | above 4G boundary as well. |
| 935 | |
Raul E Rangel | a5b7ddf | 2020-05-29 17:16:20 -0600 | [diff] [blame] | 936 | config XHCI_UTILS |
| 937 | def_bool n |
| 938 | help |
| 939 | Provides xHCI utility functions. |
| 940 | |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 941 | endmenu |