Patrick Georgi | c49d7a3 | 2020-05-08 22:50:46 +0200 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 2 | |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 3 | menu "Devices" |
Ronald G. Minnich | 69efaa0 | 2013-02-26 10:07:40 -0800 | [diff] [blame] | 4 | |
Nico Huber | ce642f0 | 2017-05-19 15:08:21 +0200 | [diff] [blame] | 5 | config HAVE_VGA_TEXT_FRAMEBUFFER |
Vladimir Serbinenko | 160e9a0 | 2014-02-22 10:34:47 +0100 | [diff] [blame] | 6 | bool |
Michael Niewöhner | 1513d72 | 2019-10-29 20:38:10 +0100 | [diff] [blame] | 7 | depends on !NO_GFX_INIT |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 8 | help |
| 9 | Selected by graphics drivers that support legacy VGA text mode. |
| 10 | |
| 11 | config HAVE_VBE_LINEAR_FRAMEBUFFER |
| 12 | bool |
Michael Niewöhner | 1513d72 | 2019-10-29 20:38:10 +0100 | [diff] [blame] | 13 | depends on !NO_GFX_INIT |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 14 | help |
| 15 | Selected by graphics drivers that can set up a VBE linear-framebuffer |
| 16 | mode. |
| 17 | |
| 18 | config HAVE_LINEAR_FRAMEBUFFER |
| 19 | bool |
Michael Niewöhner | 1513d72 | 2019-10-29 20:38:10 +0100 | [diff] [blame] | 20 | depends on !NO_GFX_INIT |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 21 | help |
| 22 | Selected by graphics drivers that can set up a generic linear |
| 23 | framebuffer. |
Vladimir Serbinenko | 160e9a0 | 2014-02-22 10:34:47 +0100 | [diff] [blame] | 24 | |
Nico Huber | 2e7f6cc | 2017-05-22 15:58:03 +0200 | [diff] [blame] | 25 | config HAVE_FSP_GOP |
| 26 | bool |
| 27 | help |
| 28 | Selected by drivers that support to run a blob that implements |
| 29 | the Graphics Output Protocol (GOP). |
| 30 | |
Michael Niewöhner | d61a40e | 2019-10-26 10:37:42 +0200 | [diff] [blame] | 31 | config MAINBOARD_NO_FSP_GOP |
| 32 | bool |
| 33 | help |
| 34 | Selected by mainboards that do not have any graphics ports connected to the SoC. |
| 35 | |
Nico Huber | 26ce9af | 2017-05-22 13:22:09 +0200 | [diff] [blame] | 36 | config MAINBOARD_HAS_NATIVE_VGA_INIT |
| 37 | def_bool n |
| 38 | help |
| 39 | Selected by mainboards / drivers that provide native graphics |
| 40 | init within coreboot. |
| 41 | |
| 42 | config MAINBOARD_FORCE_NATIVE_VGA_INIT |
| 43 | def_bool n |
| 44 | depends on MAINBOARD_HAS_NATIVE_VGA_INIT || MAINBOARD_HAS_LIBGFXINIT |
Nico Huber | 26ce9af | 2017-05-22 13:22:09 +0200 | [diff] [blame] | 45 | help |
| 46 | Selected by mainboards / chipsets whose graphics driver can't or |
| 47 | shouldn't be disabled. |
| 48 | |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 49 | config MAINBOARD_HAS_LIBGFXINIT |
| 50 | def_bool n |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 51 | help |
| 52 | Selected by mainboards that implement support for `libgfxinit`. |
| 53 | Usually this requires a list of ports to be probed for displays. |
| 54 | |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 55 | choice |
| 56 | prompt "Graphics initialization" |
| 57 | default NO_GFX_INIT if VGA_BIOS && PAYLOAD_SEABIOS |
| 58 | default VGA_ROM_RUN if VGA_BIOS |
Matt DeVillier | 8107c81 | 2020-03-27 03:09:21 -0500 | [diff] [blame] | 59 | default MAINBOARD_DO_NATIVE_VGA_INIT |
| 60 | default MAINBOARD_USE_LIBGFXINIT |
Matt DeVillier | 175ffd8 | 2020-03-29 18:20:23 -0500 | [diff] [blame] | 61 | default RUN_FSP_GOP if INTEL_GMA_HAVE_VBT |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 62 | |
| 63 | config MAINBOARD_DO_NATIVE_VGA_INIT |
| 64 | bool "Use native graphics init" |
| 65 | depends on MAINBOARD_HAS_NATIVE_VGA_INIT |
| 66 | help |
| 67 | Some mainboards, such as the Google Link, allow initializing the |
| 68 | display without the need of a binary only VGA OPROM. Enabling this |
| 69 | option may be faster, but also lacks flexibility in setting modes. |
| 70 | |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 71 | config MAINBOARD_USE_LIBGFXINIT |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 72 | bool "Use libgfxinit" |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 73 | depends on MAINBOARD_HAS_LIBGFXINIT |
Nico Huber | ce642f0 | 2017-05-19 15:08:21 +0200 | [diff] [blame] | 74 | select HAVE_VGA_TEXT_FRAMEBUFFER |
Nico Huber | 7971582e | 2017-05-20 01:07:48 +0200 | [diff] [blame] | 75 | select HAVE_LINEAR_FRAMEBUFFER |
Nico Huber | 6d8266b | 2017-05-20 16:46:01 +0200 | [diff] [blame] | 76 | select VGA if VGA_TEXT_FRAMEBUFFER |
Nico Huber | 542e948 | 2016-10-05 17:47:32 +0200 | [diff] [blame] | 77 | help |
| 78 | Use the SPARK library `libgfxinit` for the native graphics |
| 79 | initialization. This requires an Ada toolchain. |
| 80 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 81 | # TODO: Explain differences (if any) for onboard cards. |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 82 | config VGA_ROM_RUN |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 83 | bool "Run VGA Option ROMs" |
Jonathan Neuschäfer | c22ad58 | 2018-11-30 00:06:50 +0100 | [diff] [blame] | 84 | depends on PCI && (ARCH_X86 || ARCH_PPC64) && !MAINBOARD_FORCE_NATIVE_VGA_INIT |
Nico Huber | ce642f0 | 2017-05-19 15:08:21 +0200 | [diff] [blame] | 85 | select HAVE_VGA_TEXT_FRAMEBUFFER |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 86 | help |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 87 | Execute VGA Option ROMs in coreboot if found. This can be used |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 88 | to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS |
| 89 | payload. |
| 90 | |
| 91 | When using a SeaBIOS payload it runs all option ROMs with much |
| 92 | more complete BIOS interrupt services available than coreboot, |
| 93 | which some option ROMs require in order to function correctly. |
| 94 | |
Arthur Heymans | 4ad1f7d | 2018-01-16 17:22:20 +0100 | [diff] [blame] | 95 | config RUN_FSP_GOP |
| 96 | bool "Run a GOP driver" |
Michael Niewöhner | d61a40e | 2019-10-26 10:37:42 +0200 | [diff] [blame] | 97 | depends on HAVE_FSP_GOP && !MAINBOARD_NO_FSP_GOP |
Arthur Heymans | 4ad1f7d | 2018-01-16 17:22:20 +0100 | [diff] [blame] | 98 | select HAVE_LINEAR_FRAMEBUFFER |
| 99 | help |
| 100 | Some platforms (e.g. Intel Braswell and Skylake/Kaby Lake) support |
| 101 | to run a GOP blob. This option enables graphics initialization with |
| 102 | such a blob. |
| 103 | |
Nico Huber | d4ebeaf | 2017-05-22 13:49:22 +0200 | [diff] [blame] | 104 | config NO_GFX_INIT |
| 105 | bool "None" |
| 106 | depends on !MAINBOARD_FORCE_NATIVE_VGA_INIT |
| 107 | help |
| 108 | Select this to not perform any graphics initialization in |
| 109 | coreboot. This is useful if the payload (e.g. SeaBIOS) can |
| 110 | initialize graphics or if pre-boot graphics are not required. |
| 111 | |
| 112 | endchoice |
Myles Watson | e680495 | 2009-08-28 14:36:12 +0000 | [diff] [blame] | 113 | |
Arthur Heymans | b43ec47 | 2019-03-24 20:39:45 +0100 | [diff] [blame] | 114 | config ONBOARD_VGA_IS_PRIMARY |
| 115 | bool "Use onboard VGA as primary video device" |
| 116 | default n |
| 117 | depends on PCI |
| 118 | help |
| 119 | This option lets you select which VGA device will be used |
| 120 | to decode legacy VGA cycles. Not all chipsets implement this |
| 121 | however. If not selected, the last adapter found will be used, |
| 122 | else the onboard adapter is used. |
| 123 | |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 124 | config S3_VGA_ROM_RUN |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 125 | bool "Re-run VGA Option ROMs on S3 resume" |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 126 | default y |
| 127 | depends on VGA_ROM_RUN && HAVE_ACPI_RESUME |
| 128 | help |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 129 | Execute VGA Option ROMs in coreboot when resuming from S3 suspend. |
| 130 | |
| 131 | When using a SeaBIOS payload it runs all option ROMs with much |
| 132 | more complete BIOS interrupt services available than coreboot, |
| 133 | which some option ROMs require in order to function correctly. |
| 134 | |
| 135 | If unsure, say N when using SeaBIOS as payload, Y otherwise. |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 136 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 137 | config ALWAYS_LOAD_OPROM |
| 138 | def_bool n |
| 139 | depends on VGA_ROM_RUN |
| 140 | help |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 141 | Always load option ROMs if any are found. The decision to run |
| 142 | the ROM is still determined at runtime, but the distinction |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 143 | between loading and not running comes into play for CHROMEOS. |
| 144 | |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 145 | An example where this is required is that VBT (Video BIOS Tables) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 146 | are needed for the kernel's display driver to know how a piece of |
| 147 | hardware is configured to be used. |
| 148 | |
Aaron Durbin | 1051025 | 2018-01-30 10:04:02 -0700 | [diff] [blame] | 149 | config ALWAYS_RUN_OPROM |
| 150 | def_bool n |
| 151 | depends on VGA_ROM_RUN && ALWAYS_LOAD_OPROM |
| 152 | help |
| 153 | Always uncondtionally run the option regardless of other |
| 154 | policies. |
| 155 | |
Patrick Rudolph | 647e34d | 2016-02-11 08:36:50 +0100 | [diff] [blame] | 156 | config ON_DEVICE_ROM_LOAD |
| 157 | bool "Load Option ROMs on PCI devices" |
Peter Stuge | be0ede4 | 2012-10-27 14:17:04 +0200 | [diff] [blame] | 158 | default n if PAYLOAD_SEABIOS |
| 159 | default y if !PAYLOAD_SEABIOS |
Nico Huber | 49d99fc | 2017-05-20 17:56:02 +0200 | [diff] [blame] | 160 | depends on VGA_ROM_RUN |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 161 | help |
Nico Huber | 49d99fc | 2017-05-20 17:56:02 +0200 | [diff] [blame] | 162 | Load Option ROMs stored on PCI/PCIe/AGP VGA devices in coreboot. |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 163 | |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 164 | If disabled, only Option ROMs stored in CBFS will be executed by |
| 165 | coreboot. If you are concerned about security, you might want to |
| 166 | disable this option, but it might leave your system in a state of |
| 167 | degraded functionality. |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 168 | |
Peter Stuge | b6fa47c | 2012-10-27 13:45:51 +0200 | [diff] [blame] | 169 | When using a SeaBIOS payload it runs all option ROMs with much |
| 170 | more complete BIOS interrupt services available than coreboot, |
| 171 | which some option ROMs require in order to function correctly. |
| 172 | |
| 173 | If unsure, say N when using SeaBIOS as payload, Y otherwise. |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 174 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 175 | choice |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 176 | prompt "Option ROM execution type" |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 177 | default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 |
| 178 | default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 |
Arthur Heymans | 57f70a1 | 2018-12-20 10:27:19 +0100 | [diff] [blame] | 179 | depends on VGA_ROM_RUN |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 180 | |
| 181 | config PCI_OPTION_ROM_RUN_REALMODE |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 182 | prompt "Native mode" |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 183 | bool |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 184 | depends on ARCH_X86 |
Myles Watson | 28412f5 | 2009-09-17 16:54:46 +0000 | [diff] [blame] | 185 | help |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 186 | If you select this option, PCI Option ROMs will be executed |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 187 | natively on the CPU in real mode. No CPU emulation is involved, |
| 188 | so this is the fastest, but also the least secure option. |
| 189 | (only works on x86/x64 systems) |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 190 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 191 | config PCI_OPTION_ROM_RUN_YABEL |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 192 | prompt "Secure mode" |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 193 | bool |
| 194 | help |
Stefan Reinauer | 14be4d0 | 2010-01-31 21:46:12 +0000 | [diff] [blame] | 195 | If you select this option, the x86emu CPU emulator will be used to |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 196 | execute PCI Option ROMs. |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 197 | |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 198 | This option prevents Option ROMs from doing dirty tricks with the |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 199 | system (such as installing SMM modules or hypervisors), but it is |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 200 | also significantly slower than the native Option ROM initialization |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 201 | method. |
| 202 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 203 | This is the default choice for non-x86 systems. |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 204 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 205 | endchoice |
Uwe Hermann | 5ec2c2b | 2009-08-25 00:53:22 +0000 | [diff] [blame] | 206 | |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 207 | config YABEL_PCI_ACCESS_OTHER_DEVICES |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 208 | prompt "Allow Option ROMs to access other devices" |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 209 | bool |
| 210 | depends on PCI_OPTION_ROM_RUN_YABEL |
| 211 | help |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 212 | Per default, YABEL only allows Option ROMs to access the PCI device |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 213 | that they are associated with. However, this causes trouble for some |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 214 | onboard graphics chips whose Option ROM needs to reconfigure the |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 215 | north bridge. |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 216 | |
Patrick Georgi | c4b2a1b | 2012-07-20 13:44:50 +0200 | [diff] [blame] | 217 | config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG |
| 218 | prompt "Fake success on writing other device's config space" |
| 219 | bool |
| 220 | depends on YABEL_PCI_ACCESS_OTHER_DEVICES |
| 221 | help |
| 222 | By default, YABEL aborts when the Option ROM tries to write to other |
| 223 | devices' config spaces. With this option enabled, the write doesn't |
| 224 | follow through, but the Option ROM is allowed to go on. |
| 225 | This can create issues such as hanging Option ROMs (if it depends on |
| 226 | that other register changing to the written value), so test for |
| 227 | impact before using this option. |
| 228 | |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 229 | config YABEL_VIRTMEM_LOCATION |
| 230 | prompt "Location of YABEL's virtual memory" |
| 231 | hex |
Alexandru Gagniuc | fdbc1af | 2015-08-26 10:11:02 -0400 | [diff] [blame] | 232 | depends on PCI_OPTION_ROM_RUN_YABEL |
Stefan Reinauer | 9a35853 | 2010-02-12 09:32:17 +0000 | [diff] [blame] | 233 | default 0x1000000 |
| 234 | help |
| 235 | YABEL requires 1MB memory for its CPU emulation. This memory is |
| 236 | normally located at 16MB. |
| 237 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 238 | config YABEL_DIRECTHW |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 239 | prompt "Direct hardware access" |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 240 | bool |
Stefan Reinauer | 91f1423 | 2012-12-07 16:55:12 -0800 | [diff] [blame] | 241 | depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 |
Myles Watson | e680495 | 2009-08-28 14:36:12 +0000 | [diff] [blame] | 242 | help |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 243 | YABEL consists of two parts: It uses x86emu for the CPU emulation and |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 244 | additionally provides a PC system emulation that filters bad device |
| 245 | and memory access (such as PCI config space access to other devices |
| 246 | than the initialized one). |
| 247 | |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 248 | When choosing this option, x86emu will pass through all hardware |
Uwe Hermann | 548dbe7 | 2010-02-22 16:41:49 +0000 | [diff] [blame] | 249 | accesses to memory and I/O devices to the underlying memory and I/O |
Stefan Reinauer | afaa257 | 2011-10-06 16:47:51 -0700 | [diff] [blame] | 250 | addresses. While this option prevents Option ROMs from doing dirty |
Stefan Reinauer | d650e99 | 2010-02-22 04:33:13 +0000 | [diff] [blame] | 251 | tricks with the CPU (such as installing SMM modules or hypervisors), |
| 252 | they can still access all devices in the system. |
| 253 | Enable this option for a good compromise between security and speed. |
| 254 | |
Stefan Reinauer | abc0c85 | 2010-11-22 08:09:50 +0000 | [diff] [blame] | 255 | config MULTIPLE_VGA_ADAPTERS |
Myles Watson | 28412f5 | 2009-09-17 16:54:46 +0000 | [diff] [blame] | 256 | bool |
| 257 | default n |
| 258 | |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 259 | menu "Display" |
| 260 | depends on HAVE_VGA_TEXT_FRAMEBUFFER || HAVE_LINEAR_FRAMEBUFFER |
| 261 | |
| 262 | config FRAMEBUFFER_SET_VESA_MODE |
| 263 | prompt "Set framebuffer graphics resolution" |
| 264 | bool |
Nico Huber | 7ebb018 | 2019-07-22 18:17:40 +0200 | [diff] [blame] | 265 | default y if CHROMEOS |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 266 | depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE |
| 267 | select HAVE_VBE_LINEAR_FRAMEBUFFER |
| 268 | help |
| 269 | Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console) |
| 270 | |
| 271 | if FRAMEBUFFER_SET_VESA_MODE |
| 272 | |
| 273 | choice |
| 274 | prompt "framebuffer graphics resolution" |
Mike Banon | 749fe1e | 2019-02-23 21:43:05 +0300 | [diff] [blame] | 275 | default FRAMEBUFFER_VESA_MODE_118 |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 276 | help |
| 277 | This option sets the resolution used for the coreboot framebuffer (and |
| 278 | bootsplash screen). |
| 279 | |
| 280 | config FRAMEBUFFER_VESA_MODE_100 |
| 281 | bool "640x400 256-color" |
| 282 | |
| 283 | config FRAMEBUFFER_VESA_MODE_101 |
| 284 | bool "640x480 256-color" |
| 285 | |
| 286 | config FRAMEBUFFER_VESA_MODE_102 |
| 287 | bool "800x600 16-color" |
| 288 | |
| 289 | config FRAMEBUFFER_VESA_MODE_103 |
| 290 | bool "800x600 256-color" |
| 291 | |
| 292 | config FRAMEBUFFER_VESA_MODE_104 |
| 293 | bool "1024x768 16-color" |
| 294 | |
| 295 | config FRAMEBUFFER_VESA_MODE_105 |
| 296 | bool "1024x768 256-color" |
| 297 | |
| 298 | config FRAMEBUFFER_VESA_MODE_106 |
| 299 | bool "1280x1024 16-color" |
| 300 | |
| 301 | config FRAMEBUFFER_VESA_MODE_107 |
| 302 | bool "1280x1024 256-color" |
| 303 | |
| 304 | config FRAMEBUFFER_VESA_MODE_108 |
| 305 | bool "80x60 text" |
| 306 | |
| 307 | config FRAMEBUFFER_VESA_MODE_109 |
| 308 | bool "132x25 text" |
| 309 | |
| 310 | config FRAMEBUFFER_VESA_MODE_10A |
| 311 | bool "132x43 text" |
| 312 | |
| 313 | config FRAMEBUFFER_VESA_MODE_10B |
| 314 | bool "132x50 text" |
| 315 | |
| 316 | config FRAMEBUFFER_VESA_MODE_10C |
| 317 | bool "132x60 text" |
| 318 | |
| 319 | config FRAMEBUFFER_VESA_MODE_10D |
| 320 | bool "320x200 32k-color (1:5:5:5)" |
| 321 | |
| 322 | config FRAMEBUFFER_VESA_MODE_10E |
| 323 | bool "320x200 64k-color (5:6:5)" |
| 324 | |
| 325 | config FRAMEBUFFER_VESA_MODE_10F |
| 326 | bool "320x200 16.8M-color (8:8:8)" |
| 327 | |
| 328 | config FRAMEBUFFER_VESA_MODE_110 |
| 329 | bool "640x480 32k-color (1:5:5:5)" |
| 330 | |
| 331 | config FRAMEBUFFER_VESA_MODE_111 |
| 332 | bool "640x480 64k-color (5:6:5)" |
| 333 | |
| 334 | config FRAMEBUFFER_VESA_MODE_112 |
| 335 | bool "640x480 16.8M-color (8:8:8)" |
| 336 | |
| 337 | config FRAMEBUFFER_VESA_MODE_113 |
| 338 | bool "800x600 32k-color (1:5:5:5)" |
| 339 | |
| 340 | config FRAMEBUFFER_VESA_MODE_114 |
| 341 | bool "800x600 64k-color (5:6:5)" |
| 342 | |
| 343 | config FRAMEBUFFER_VESA_MODE_115 |
| 344 | bool "800x600 16.8M-color (8:8:8)" |
| 345 | |
| 346 | config FRAMEBUFFER_VESA_MODE_116 |
| 347 | bool "1024x768 32k-color (1:5:5:5)" |
| 348 | |
| 349 | config FRAMEBUFFER_VESA_MODE_117 |
| 350 | bool "1024x768 64k-color (5:6:5)" |
| 351 | |
| 352 | config FRAMEBUFFER_VESA_MODE_118 |
| 353 | bool "1024x768 16.8M-color (8:8:8)" |
| 354 | |
| 355 | config FRAMEBUFFER_VESA_MODE_119 |
| 356 | bool "1280x1024 32k-color (1:5:5:5)" |
| 357 | |
| 358 | config FRAMEBUFFER_VESA_MODE_11A |
| 359 | bool "1280x1024 64k-color (5:6:5)" |
| 360 | |
| 361 | config FRAMEBUFFER_VESA_MODE_11B |
| 362 | bool "1280x1024 16.8M-color (8:8:8)" |
| 363 | |
| 364 | config FRAMEBUFFER_VESA_MODE_USER |
| 365 | bool "Manually select VESA mode" |
| 366 | |
| 367 | endchoice |
| 368 | |
| 369 | # Map the config names to an integer (KB). |
| 370 | config FRAMEBUFFER_VESA_MODE |
| 371 | prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER |
| 372 | hex |
| 373 | default 0x100 if FRAMEBUFFER_VESA_MODE_100 |
| 374 | default 0x101 if FRAMEBUFFER_VESA_MODE_101 |
| 375 | default 0x102 if FRAMEBUFFER_VESA_MODE_102 |
| 376 | default 0x103 if FRAMEBUFFER_VESA_MODE_103 |
| 377 | default 0x104 if FRAMEBUFFER_VESA_MODE_104 |
| 378 | default 0x105 if FRAMEBUFFER_VESA_MODE_105 |
| 379 | default 0x106 if FRAMEBUFFER_VESA_MODE_106 |
| 380 | default 0x107 if FRAMEBUFFER_VESA_MODE_107 |
| 381 | default 0x108 if FRAMEBUFFER_VESA_MODE_108 |
| 382 | default 0x109 if FRAMEBUFFER_VESA_MODE_109 |
| 383 | default 0x10A if FRAMEBUFFER_VESA_MODE_10A |
| 384 | default 0x10B if FRAMEBUFFER_VESA_MODE_10B |
| 385 | default 0x10C if FRAMEBUFFER_VESA_MODE_10C |
| 386 | default 0x10D if FRAMEBUFFER_VESA_MODE_10D |
| 387 | default 0x10E if FRAMEBUFFER_VESA_MODE_10E |
| 388 | default 0x10F if FRAMEBUFFER_VESA_MODE_10F |
| 389 | default 0x110 if FRAMEBUFFER_VESA_MODE_110 |
| 390 | default 0x111 if FRAMEBUFFER_VESA_MODE_111 |
| 391 | default 0x112 if FRAMEBUFFER_VESA_MODE_112 |
| 392 | default 0x113 if FRAMEBUFFER_VESA_MODE_113 |
| 393 | default 0x114 if FRAMEBUFFER_VESA_MODE_114 |
| 394 | default 0x115 if FRAMEBUFFER_VESA_MODE_115 |
| 395 | default 0x116 if FRAMEBUFFER_VESA_MODE_116 |
| 396 | default 0x117 if FRAMEBUFFER_VESA_MODE_117 |
| 397 | default 0x118 if FRAMEBUFFER_VESA_MODE_118 |
| 398 | default 0x119 if FRAMEBUFFER_VESA_MODE_119 |
| 399 | default 0x11A if FRAMEBUFFER_VESA_MODE_11A |
| 400 | default 0x11B if FRAMEBUFFER_VESA_MODE_11B |
Mike Banon | 749fe1e | 2019-02-23 21:43:05 +0300 | [diff] [blame] | 401 | default 0x118 if FRAMEBUFFER_VESA_MODE_USER |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 402 | endif # FRAMEBUFFER_SET_VESA_MODE |
| 403 | |
Angel Pons | 4cb2f76 | 2020-06-16 19:49:53 +0200 | [diff] [blame] | 404 | config WANT_LINEAR_FRAMEBUFFER |
| 405 | bool |
| 406 | default y if CHROMEOS |
| 407 | default y if PAYLOAD_TIANOCORE |
| 408 | |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 409 | choice |
| 410 | prompt "Framebuffer mode" |
Angel Pons | 4cb2f76 | 2020-06-16 19:49:53 +0200 | [diff] [blame] | 411 | default VBE_LINEAR_FRAMEBUFFER if HAVE_VBE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER |
| 412 | default GENERIC_LINEAR_FRAMEBUFFER if HAVE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 413 | default VGA_TEXT_FRAMEBUFFER |
| 414 | |
| 415 | config VGA_TEXT_FRAMEBUFFER |
| 416 | bool "Legacy VGA text mode" |
| 417 | depends on HAVE_VGA_TEXT_FRAMEBUFFER |
| 418 | help |
| 419 | If this option is enabled, coreboot will initialize graphics in |
| 420 | legacy VGA text mode or, if a VGA BIOS is used and a VESA mode set, |
| 421 | switch to text mode before handing control to a payload. |
| 422 | |
| 423 | config VBE_LINEAR_FRAMEBUFFER |
| 424 | bool "VESA framebuffer" |
| 425 | depends on HAVE_VBE_LINEAR_FRAMEBUFFER |
| 426 | help |
| 427 | This option keeps the framebuffer mode set after coreboot finishes |
| 428 | execution. If this option is enabled, coreboot will pass a |
| 429 | framebuffer entry in its coreboot table and the payload will need a |
| 430 | compatible driver. |
| 431 | |
| 432 | config GENERIC_LINEAR_FRAMEBUFFER |
| 433 | bool "Linear \"high-resolution\" framebuffer" |
| 434 | depends on HAVE_LINEAR_FRAMEBUFFER |
| 435 | help |
| 436 | This option enables a high-resolution, linear framebuffer. If this |
| 437 | option is enabled, coreboot will pass a framebuffer entry in its |
| 438 | coreboot table and the payload will need a compatible driver. |
| 439 | |
| 440 | endchoice |
| 441 | |
| 442 | # Workaround to have LINEAR_FRAMEBUFFER set in both cases |
| 443 | # VBE_LINEAR_FRAMEBUFFER and GENERIC_LINEAR_FRAMEBUFFER. |
| 444 | # `kconfig_lint` doesn't let us use the same name with |
| 445 | # different texts in the choice above. |
| 446 | config LINEAR_FRAMEBUFFER |
| 447 | def_bool y |
| 448 | depends on VBE_LINEAR_FRAMEBUFFER || GENERIC_LINEAR_FRAMEBUFFER |
| 449 | |
Johanna Schander | c544a85 | 2019-07-28 09:28:33 +0200 | [diff] [blame] | 450 | config BOOTSPLASH |
| 451 | prompt "Show graphical bootsplash" |
| 452 | bool |
| 453 | depends on LINEAR_FRAMEBUFFER |
| 454 | help |
| 455 | This option shows a graphical bootsplash screen. The graphics are |
| 456 | loaded from the CBFS file bootsplash.jpg. |
| 457 | |
| 458 | You can either specify the location and file name of the |
| 459 | image in the 'General' section or add it manually to CBFS, using, |
| 460 | for example, cbfstool. |
| 461 | |
Nico Huber | 2bc892c | 2019-01-01 22:28:47 +0100 | [diff] [blame] | 462 | config LINEAR_FRAMEBUFFER_MAX_WIDTH |
| 463 | int "Maximum width in pixels" |
| 464 | depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT |
| 465 | default 2560 |
| 466 | help |
| 467 | Set the maximum width of the framebuffer. This may help with |
| 468 | default fonts too tiny for high-resolution displays. |
| 469 | |
| 470 | config LINEAR_FRAMEBUFFER_MAX_HEIGHT |
| 471 | int "Maximum height in pixels" |
| 472 | depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT |
| 473 | default 1600 |
| 474 | help |
| 475 | Set the maximum height of the framebuffer. This may help with |
| 476 | default fonts too tiny for high-resolution displays. |
| 477 | |
Nico Huber | a2cf686 | 2017-05-20 17:57:01 +0200 | [diff] [blame] | 478 | endmenu # "Display" |
| 479 | |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 480 | config PCI |
| 481 | bool |
| 482 | default n |
| 483 | |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 484 | if PCI |
| 485 | |
| 486 | config NO_MMCONF_SUPPORT |
| 487 | bool |
Kyösti Mälkki | 3d15e10 | 2016-11-29 16:46:56 +0200 | [diff] [blame] | 488 | default n |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 489 | |
| 490 | config MMCONF_SUPPORT |
| 491 | bool |
Kyösti Mälkki | 3d15e10 | 2016-11-29 16:46:56 +0200 | [diff] [blame] | 492 | default !NO_MMCONF_SUPPORT |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 493 | |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 494 | config HYPERTRANSPORT_PLUGIN_SUPPORT |
| 495 | bool |
Myles Watson | 74fb8f2 | 2009-09-24 15:09:11 +0000 | [diff] [blame] | 496 | default n |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 497 | |
Kyösti Mälkki | bc29bd0 | 2019-11-20 22:26:54 +0200 | [diff] [blame] | 498 | config HT_CHAIN_UNITID_BASE |
| 499 | int |
| 500 | default 0 |
| 501 | |
| 502 | config HT_CHAIN_END_UNITID_BASE |
| 503 | int |
| 504 | default 0 |
| 505 | |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 506 | config PCIX_PLUGIN_SUPPORT |
| 507 | bool |
Myles Watson | ed03556 | 2009-09-22 21:29:32 +0000 | [diff] [blame] | 508 | default y |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 509 | |
Ronald G. Minnich | 876d7e9 | 2009-08-28 14:23:38 +0000 | [diff] [blame] | 510 | config CARDBUS_PLUGIN_SUPPORT |
| 511 | bool |
Myles Watson | ed03556 | 2009-09-22 21:29:32 +0000 | [diff] [blame] | 512 | default y |
Duncan Laurie | 90dcdd4 | 2011-10-25 14:15:11 -0700 | [diff] [blame] | 513 | |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 514 | config AZALIA_PLUGIN_SUPPORT |
| 515 | bool |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 516 | default n |
| 517 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 518 | config PCIEXP_PLUGIN_SUPPORT |
| 519 | bool |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 520 | default y |
| 521 | |
Felix Singer | e4a7d9f | 2020-06-15 15:00:56 +0200 | [diff] [blame^] | 522 | config PCI_ALLOW_BUS_MASTER |
| 523 | bool "Allow PCI bus master bit to be enabled by coreboot" |
| 524 | default y |
| 525 | help |
| 526 | For security reasons, bus mastering should be enabled as late as |
| 527 | possible. In coreboot, it's usually not necessary and payloads |
| 528 | should only enable it for devices they use. Since not all payloads |
| 529 | enable bus mastering properly yet, this option gives some sort of |
| 530 | "backwards compatibility" and is enabled by default to keep the |
| 531 | traditional behaviour for now. This is currently necessary, for |
| 532 | instance, for libpayload based payloads as the drivers don't enable |
| 533 | bus mastering for PCI bridges. |
| 534 | |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 535 | endif # PCI |
| 536 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 537 | if PCIEXP_PLUGIN_SUPPORT |
| 538 | |
Duncan Laurie | 90dcdd4 | 2011-10-25 14:15:11 -0700 | [diff] [blame] | 539 | config PCIEXP_COMMON_CLOCK |
| 540 | prompt "Enable PCIe Common Clock" |
| 541 | bool |
| 542 | default n |
| 543 | help |
| 544 | Detect and enable Common Clock on PCIe links. |
| 545 | |
| 546 | config PCIEXP_ASPM |
| 547 | prompt "Enable PCIe ASPM" |
| 548 | bool |
| 549 | default n |
| 550 | help |
Jonathan Neuschäfer | 8c50e68 | 2016-12-27 16:31:28 +0100 | [diff] [blame] | 551 | Detect and enable ASPM (Active State Power Management) on PCIe links. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 552 | |
Kane Chen | 18cb134 | 2014-10-01 11:13:54 +0800 | [diff] [blame] | 553 | config PCIEXP_CLK_PM |
| 554 | prompt "Enable PCIe Clock Power Management" |
| 555 | bool |
Kane Chen | 18cb134 | 2014-10-01 11:13:54 +0800 | [diff] [blame] | 556 | default n |
| 557 | help |
| 558 | Detect and enable Clock Power Management on PCIe. |
| 559 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 560 | config PCIEXP_L1_SUB_STATE |
| 561 | prompt "Enable PCIe ASPM L1 SubState" |
| 562 | bool |
Kyösti Mälkki | 6f66f41 | 2016-12-01 22:08:18 +0200 | [diff] [blame] | 563 | depends on (MMCONF_SUPPORT || PCI_IO_CFG_EXT) |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 564 | default n |
| 565 | help |
| 566 | Detect and enable ASPM on PCIe links. |
| 567 | |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 568 | config PCIEXP_HOTPLUG |
| 569 | prompt "Enable PCIe Hotplug Support" |
| 570 | bool |
| 571 | default n |
| 572 | help |
| 573 | Allocate resources for PCIe hotplug bridges |
| 574 | |
| 575 | if PCIEXP_HOTPLUG |
| 576 | |
| 577 | config PCIEXP_HOTPLUG_BUSES |
| 578 | int "PCI Express Hotplug Buses" |
| 579 | default 32 |
| 580 | help |
| 581 | This is the number of buses allocated for hotplug PCI express |
| 582 | bridges, for use by hotplugged child devices. The default is 32 |
| 583 | buses. |
| 584 | |
| 585 | config PCIEXP_HOTPLUG_MEM |
| 586 | hex "PCI Express Hotplug Memory" |
| 587 | default 0x800000 |
| 588 | help |
| 589 | This is the amount of memory space, in bytes, to allocate to |
| 590 | hotplug PCI express bridges, for use by hotplugged child devices. |
| 591 | This size should be page-aligned. The default is 8 MiB. |
| 592 | |
| 593 | config PCIEXP_HOTPLUG_PREFETCH_MEM |
| 594 | hex "PCI Express Hotplug Prefetch Memory" |
| 595 | default 0x10000000 |
| 596 | help |
| 597 | This is the amount of pre-fetchable memory space, in bytes, to |
| 598 | allocate to hot-plug PCI express bridges, for use by hotplugged |
| 599 | child devices. This size should be page-aligned. The default is |
| 600 | 256 MiB. |
| 601 | |
Furquan Shaikh | 32f385e | 2020-05-15 23:35:00 -0700 | [diff] [blame] | 602 | config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G |
| 603 | bool |
| 604 | depends on RESOURCE_ALLOCATOR_V4 |
| 605 | default y if !PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G |
| 606 | default n |
| 607 | help |
| 608 | This enables prefetch memory allocation above 4G boundary for the |
| 609 | hotplug resources. |
| 610 | |
| 611 | config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G |
| 612 | bool "PCI Express Hotplug Prefetch Memory Allocation below 4G boundary" |
| 613 | default n |
| 614 | help |
| 615 | This enables prefetch memory allocation below 4G boundary for the |
| 616 | hotplug resources. |
| 617 | |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 618 | config PCIEXP_HOTPLUG_IO |
| 619 | hex "PCI Express Hotplug I/O Space" |
| 620 | default 0x2000 |
| 621 | help |
| 622 | This is the amount of I/O space to allocate to hot-plug PCI |
| 623 | express bridges, for use by hotplugged child devices. The default |
| 624 | is 8 KiB. |
| 625 | |
| 626 | endif # PCIEXP_HOTPLUG |
| 627 | |
Kyösti Mälkki | 91bfa8e | 2016-11-20 20:39:56 +0200 | [diff] [blame] | 628 | endif # PCIEXP_PLUGIN_SUPPORT |
| 629 | |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 630 | config EARLY_PCI_BRIDGE |
| 631 | bool "Early PCI bridge" |
| 632 | depends on PCI |
| 633 | default n |
| 634 | help |
| 635 | While coreboot is executing code from ROM, the coreboot resource |
| 636 | allocator has not been running yet. Hence PCI devices living behind |
| 637 | a bridge are not yet visible to the system. |
| 638 | |
| 639 | This option enables static configuration for a single pre-defined |
| 640 | PCI bridge function on bus 0. |
| 641 | |
| 642 | if EARLY_PCI_BRIDGE |
| 643 | |
| 644 | config EARLY_PCI_BRIDGE_DEVICE |
| 645 | hex "bridge device" |
| 646 | default 0x0 |
| 647 | |
| 648 | config EARLY_PCI_BRIDGE_FUNCTION |
| 649 | hex "bridge function" |
| 650 | default 0x0 |
| 651 | |
| 652 | config EARLY_PCI_MMIO_BASE |
| 653 | hex "MMIO window base" |
| 654 | default 0x0 |
| 655 | |
| 656 | endif # EARLY_PCI_BRIDGE |
| 657 | |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 658 | config SUBSYSTEM_VENDOR_ID |
| 659 | hex "Override PCI Subsystem Vendor ID" |
| 660 | depends on PCI |
Martin Roth | 3b87812 | 2016-09-30 14:43:01 -0600 | [diff] [blame] | 661 | default 0x0000 |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 662 | help |
| 663 | This config option will override the devicetree settings for |
| 664 | PCI Subsystem Vendor ID. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 665 | |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 666 | config SUBSYSTEM_DEVICE_ID |
| 667 | hex "Override PCI Subsystem Device ID" |
| 668 | depends on PCI |
Martin Roth | 3b87812 | 2016-09-30 14:43:01 -0600 | [diff] [blame] | 669 | default 0x0000 |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 670 | help |
| 671 | This config option will override the devicetree settings for |
| 672 | PCI Subsystem Device ID. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 673 | |
| 674 | config VGA_BIOS |
| 675 | bool "Add a VGA BIOS image" |
Vladimir Serbinenko | d51a089 | 2016-03-04 09:20:20 +0100 | [diff] [blame] | 676 | depends on ARCH_X86 |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 677 | help |
| 678 | Select this option if you have a VGA BIOS image that you would |
| 679 | like to add to your ROM. |
| 680 | |
| 681 | You will be able to specify the location and file name of the |
| 682 | image later. |
| 683 | |
| 684 | config VGA_BIOS_FILE |
| 685 | string "VGA BIOS path and filename" |
| 686 | depends on VGA_BIOS |
| 687 | default "vgabios.bin" |
| 688 | help |
| 689 | The path and filename of the file to use as VGA BIOS. |
| 690 | |
| 691 | config VGA_BIOS_ID |
| 692 | string "VGA device PCI IDs" |
| 693 | depends on VGA_BIOS |
| 694 | default "1106,3230" |
| 695 | help |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 696 | The comma-separated PCI vendor and device ID with optional revision if that |
| 697 | feature is enabled that would associate your vBIOS to your video card. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 698 | |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 699 | Example: 1106,3230 or 1106,3230,a3 |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 700 | |
| 701 | In the above example 1106 is the PCI vendor ID (in hex, but without |
| 702 | the "0x" prefix) and 3230 specifies the PCI device ID of the |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 703 | video card (also in hex, without "0x" prefix). a3 specifies the revision. |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 704 | |
Daniele Forsi | f2fb7d9 | 2014-07-17 11:59:41 +0200 | [diff] [blame] | 705 | Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| 706 | |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 707 | config VGA_BIOS_SECOND |
| 708 | bool "Add a 2nd video BIOS image" |
| 709 | depends on ARCH_X86 && VGA_BIOS |
| 710 | help |
| 711 | Select this option if you have a 2nd video BIOS image that you would |
| 712 | like to add to your ROM. |
| 713 | |
| 714 | config VGA_BIOS_SECOND_FILE |
| 715 | string "2nd video BIOS path and filename" |
| 716 | depends on VGA_BIOS_SECOND |
| 717 | default "vbios2.bin" |
| 718 | help |
| 719 | The path and filename of the file to use as video BIOS. |
| 720 | |
| 721 | config VGA_BIOS_SECOND_ID |
| 722 | string "Graphics device PCI IDs" |
| 723 | depends on VGA_BIOS_SECOND |
| 724 | help |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 725 | The comma-separated PCI vendor and device ID with optional revision if that |
| 726 | feature is enabled that would associate your vBIOS to your video card. |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 727 | |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 728 | Example: 1106,3230 or 1106,3230,a3 |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 729 | |
| 730 | In the above example 1106 is the PCI vendor ID (in hex, but without |
| 731 | the "0x" prefix) and 3230 specifies the PCI device ID of the |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 732 | video card (also in hex, without "0x" prefix). a3 specifies the revision. |
Martin Roth | 4cc2cac | 2019-12-06 19:11:08 -0700 | [diff] [blame] | 733 | |
| 734 | Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| 735 | |
Martin Roth | a616a4b | 2020-01-21 09:28:40 -0700 | [diff] [blame] | 736 | config CHECK_REV_IN_OPROM_NAME |
| 737 | def_bool n |
| 738 | help |
| 739 | Select this in the platform BIOS or chipset if the option rom has a revision |
| 740 | that needs to be checked when searching CBFS. |
| 741 | |
Mike Banon | 0f8547e | 2019-02-17 19:51:53 +0300 | [diff] [blame] | 742 | config VGA_BIOS_DGPU |
| 743 | bool "Add a discrete VGA BIOS image" |
| 744 | depends on VGA_BIOS |
| 745 | help |
| 746 | Select this option if you have a VGA BIOS image for discrete GPU |
| 747 | that you would like to add to your ROM. |
| 748 | |
| 749 | You will be able to specify the location and file name of the |
| 750 | image later. |
| 751 | |
| 752 | config VGA_BIOS_DGPU_FILE |
| 753 | string "Discrete VGA BIOS path and filename" |
| 754 | depends on VGA_BIOS_DGPU |
| 755 | default "vgabios_dgpu.bin" |
| 756 | help |
| 757 | The path and filename of the file to use as VGA BIOS for discrete GPU. |
| 758 | |
| 759 | config VGA_BIOS_DGPU_ID |
| 760 | string "Discrete VGA device PCI IDs" |
| 761 | depends on VGA_BIOS_DGPU |
| 762 | default "1002,6663" |
| 763 | help |
| 764 | The comma-separated PCI vendor and device ID that would associate |
| 765 | your VGA BIOS to your discrete video card. |
| 766 | |
| 767 | Examples: |
| 768 | 1002,6663 for HD 8570M |
| 769 | 1002,6665 for R5 M230 |
| 770 | |
| 771 | In the above examples 1002 is the PCI vendor ID (in hex, but without |
| 772 | the "0x" prefix) and 6663 / 6665 specifies the PCI device ID of the |
| 773 | discrete video card (also in hex, without "0x" prefix). |
| 774 | |
| 775 | Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| 776 | |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 777 | config INTEL_GMA_HAVE_VBT |
Arthur Heymans | 7225a36 | 2018-05-28 21:09:21 +0200 | [diff] [blame] | 778 | bool |
| 779 | help |
| 780 | Select this in the mainboard Kconfig to indicate the board has |
| 781 | a data.vbt file. |
| 782 | |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 783 | config INTEL_GMA_ADD_VBT |
Patrick Rudolph | 4c17098 | 2017-07-17 19:53:56 +0200 | [diff] [blame] | 784 | depends on SOC_INTEL_COMMON || CPU_INTEL_COMMON |
Elyes HAOUAS | 6dc9d03 | 2020-02-16 16:22:52 +0100 | [diff] [blame] | 785 | bool "Add a Video BIOS Table (VBT) binary to CBFS" |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 786 | default y if INTEL_GMA_HAVE_VBT |
Patrick Rudolph | 4c17098 | 2017-07-17 19:53:56 +0200 | [diff] [blame] | 787 | help |
| 788 | Add a VBT data file to CBFS. The VBT describes the integrated |
| 789 | GPU and connections, and is needed by the GOP driver integrated into |
| 790 | FSP and the OS driver in order to initialize the display. |
| 791 | |
| 792 | config INTEL_GMA_VBT_FILE |
| 793 | string "VBT binary path and filename" |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 794 | depends on INTEL_GMA_ADD_VBT |
Patrick Georgi | b8fba86 | 2020-06-17 21:06:53 +0200 | [diff] [blame] | 795 | default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(VARIANT_DIR)/data.vbt" \ |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 796 | if INTEL_GMA_HAVE_VBT && VARIANT_DIR != "" |
Patrick Georgi | b8fba86 | 2020-06-17 21:06:53 +0200 | [diff] [blame] | 797 | default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if INTEL_GMA_HAVE_VBT |
| 798 | default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/vbt.bin" |
Patrick Rudolph | 4c17098 | 2017-07-17 19:53:56 +0200 | [diff] [blame] | 799 | help |
| 800 | The path and filename of the VBT binary. |
| 801 | |
Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 802 | config SOFTWARE_I2C |
| 803 | bool "Enable I2C controller emulation in software" |
| 804 | default n |
| 805 | help |
| 806 | This config option will enable code to override the i2c_transfer |
| 807 | routine with a (simple) software emulation of the protocol. This may |
| 808 | be useful for debugging or on platforms where a driver for the real |
| 809 | I2C controller is not (yet) available. The platform code needs to |
| 810 | provide bindings to manually toggle I2C lines. |
Kyösti Mälkki | a91e1e6 | 2014-12-31 10:36:08 +0200 | [diff] [blame] | 811 | |
Furquan Shaikh | 6939574 | 2020-05-15 15:43:15 -0700 | [diff] [blame] | 812 | config RESOURCE_ALLOCATOR_V3 |
| 813 | bool |
Furquan Shaikh | 23b874a | 2020-05-15 16:25:47 -0700 | [diff] [blame] | 814 | default n |
Furquan Shaikh | 6939574 | 2020-05-15 15:43:15 -0700 | [diff] [blame] | 815 | help |
| 816 | This config option enables resource allocator v3 which performs |
Furquan Shaikh | 23b874a | 2020-05-15 16:25:47 -0700 | [diff] [blame] | 817 | top down allocation of resources in a single MMIO window. This is the |
| 818 | old resource allocator meant to be used only until the broken AMD |
| 819 | chipsets are fixed. DO NOT USE THIS FOR ANY NEW CHIPSETS! |
Furquan Shaikh | 6939574 | 2020-05-15 15:43:15 -0700 | [diff] [blame] | 820 | |
Furquan Shaikh | f4bc9eb | 2020-05-15 16:04:28 -0700 | [diff] [blame] | 821 | config RESOURCE_ALLOCATOR_V4 |
| 822 | bool |
| 823 | default n if RESOURCE_ALLOCATOR_V3 |
| 824 | default y if !RESOURCE_ALLOCATOR_V3 |
| 825 | help |
| 826 | This config option enables resource allocator v4 which uses multiple |
| 827 | ranges for allocating resources. This allows allocation of resources |
| 828 | above 4G boundary as well. |
| 829 | |
Raul E Rangel | a5b7ddf | 2020-05-29 17:16:20 -0600 | [diff] [blame] | 830 | config XHCI_UTILS |
| 831 | def_bool n |
| 832 | help |
| 833 | Provides xHCI utility functions. |
| 834 | |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 835 | endmenu |