device/pciexp: Add support for PCIe CLK power management
Set PCIe "Enable Clock Power Management", if endpoint supports it.
BUG=chrome-os-partner:31424
BRANCH=none
TEST=build and boot on rambi, check Enable Clock Power Management
in link control register is set properly
Change-Id: Ie54110d1ef42184cfcf47c9fe4d735960aebe47f
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/220742
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
[Edit commit message.]
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/8447
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
diff --git a/src/device/Kconfig b/src/device/Kconfig
index 91da02a..42a68d2 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -251,6 +251,14 @@
help
Detect and enable ASPM on PCIe links.
+config PCIEXP_CLK_PM
+ prompt "Enable PCIe Clock Power Management"
+ bool
+ depends on PCIEXP_PLUGIN_SUPPORT
+ default n
+ help
+ Detect and enable Clock Power Management on PCIe.
+
config PCI_BUS_SEGN_BITS
int
default 0