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Yidi Lin3d7b6062015-07-31 17:10:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Yidi Lin3d7b6062015-07-31 17:10:40 +080014 */
15
16#include <arch/cache.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080017#include <boardid.h>
Jitao Shi4a04a7b2016-01-08 16:02:13 +080018#include <bootmode.h>
19#include <console/console.h>
Koro Chen9733ba52015-07-31 17:11:04 +080020#include <delay.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080021#include <device/device.h>
Jitao Shi4a04a7b2016-01-08 16:02:13 +080022#include <drivers/parade/ps8640/ps8640.h>
23#include <edid.h>
Koro Chen9733ba52015-07-31 17:11:04 +080024#include <gpio.h>
henryc.chen316ded82016-03-11 14:55:30 +080025#include <soc/da9212.h>
Jitao Shi4a04a7b2016-01-08 16:02:13 +080026#include <soc/ddp.h>
27#include <soc/dsi.h>
jun.gaof059e972015-12-17 16:59:55 +080028#include <soc/i2c.h>
henryc.chen316ded82016-03-11 14:55:30 +080029#include <soc/mt6311.h>
Koro Chen9733ba52015-07-31 17:11:04 +080030#include <soc/mt6391.h>
31#include <soc/mtcmos.h>
Koro Chen9733ba52015-07-31 17:11:04 +080032#include <soc/pll.h>
Ben Loka7379402015-07-31 17:11:11 +080033#include <soc/usb.h>
CC Ma72980b12015-09-15 17:33:38 +080034#include <vendorcode/google/chromeos/chromeos.h>
Koro Chen9733ba52015-07-31 17:11:04 +080035
henryc.chen316ded82016-03-11 14:55:30 +080036enum {
37 CODEC_I2C_BUS = 0,
38 EXT_BUCK_I2C_BUS = 1,
39};
40
41static void configure_ext_buck(void)
Jimmy Huang27eba672015-07-31 17:11:00 +080042{
henryc.chen316ded82016-03-11 14:55:30 +080043 mtk_i2c_bus_init(EXT_BUCK_I2C_BUS);
jun.gaof059e972015-12-17 16:59:55 +080044
Julius Werner9a570952016-03-14 20:12:18 -070045 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
henryc.chen70b30442015-12-23 11:45:29 +080046 case 3:
47 case 4:
Jimmy Huang27eba672015-07-31 17:11:00 +080048 /* rev-3 and rev-4 use mt6311 as external buck */
Tristan Shieh71d227b2018-07-09 18:59:32 +080049 gpio_output(GPIO(EINT15), 1);
henryc.chen316ded82016-03-11 14:55:30 +080050 udelay(500);
51 mt6311_probe(EXT_BUCK_I2C_BUS);
Jimmy Huang27eba672015-07-31 17:11:00 +080052 break;
henryc.chen70b30442015-12-23 11:45:29 +080053 case 2:
54 default:
55 /* rev-2 and rev-5 use da9212 as external buck */
henryc.chen316ded82016-03-11 14:55:30 +080056 mt6391_gpio_output(MT6391_KP_ROW3, 1); /* DA9212_IC_EN */
57 mt6391_gpio_output(MT6391_KP_ROW4, 1); /* DA9212_EN_A */
58 udelay(500); /* add 500us delay for powering on da9212 */
59 da9212_probe(EXT_BUCK_I2C_BUS);
henryc.chen70b30442015-12-23 11:45:29 +080060 break;
Jimmy Huang27eba672015-07-31 17:11:00 +080061 }
62}
63
YH Huang5d687ad2016-07-14 11:49:01 +080064static void configure_touchscreen(void)
65{
66 /* Pull low reset gpio for 500us and then pull high */
67 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT >= 7) {
Tristan Shieh71d227b2018-07-09 18:59:32 +080068 gpio_output(GPIO(PCM_SYNC), 0);
YH Huang5d687ad2016-07-14 11:49:01 +080069 udelay(500);
Tristan Shieh71d227b2018-07-09 18:59:32 +080070 gpio_output(GPIO(PCM_SYNC), 1);
YH Huang5d687ad2016-07-14 11:49:01 +080071 }
72}
73
Koro Chen9733ba52015-07-31 17:11:04 +080074static void configure_audio(void)
75{
76 mtcmos_audio_power_on();
77
Koro Chen603cb852015-12-30 17:50:56 +080078 /* vgp1 set to 1.8V */
79 mt6391_configure_ldo(LDO_VCAMD, LDO_1P8);
80 /* delay 1ms for realtek's power sequence request */
81 mdelay(1);
82 /* vcama set to 1.8V */
83 mt6391_configure_ldo(LDO_VCAMA, LDO_1P8);
Koro Chen9733ba52015-07-31 17:11:04 +080084
85 /* reset ALC5676 */
Julius Werner9a570952016-03-14 20:12:18 -070086 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
Tristan Shieh71d227b2018-07-09 18:59:32 +080087 gpio_output(GPIO(LCM_RST), 1);
Koro Chen9733ba52015-07-31 17:11:04 +080088
89 /* SoC I2S */
Tristan Shieh71d227b2018-07-09 18:59:32 +080090 gpio_set_mode(GPIO(I2S0_LRCK), PAD_I2S0_LRCK_FUNC_I2S1_WS);
91 gpio_set_mode(GPIO(I2S0_BCK), PAD_I2S0_BCK_FUNC_I2S1_BCK);
92 gpio_set_mode(GPIO(I2S0_MCK), PAD_I2S0_MCK_FUNC_I2S1_MCK);
93 gpio_set_mode(GPIO(I2S0_DATA0), PAD_I2S0_DATA0_FUNC_I2S1_DO_1);
94 gpio_set_mode(GPIO(I2S0_DATA1), PAD_I2S0_DATA1_FUNC_I2S2_DI_2);
Koro Chen9733ba52015-07-31 17:11:04 +080095 /* codec ext MCLK ON */
96 mt6391_gpio_output(MT6391_KP_COL4, 1);
Yidi Lin19318dd2016-03-16 16:59:17 +080097
98 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
99 case 2:
100 case 3:
101 case 4:
102 mt6391_gpio_output(MT6391_KP_COL5, 1);
103 break;
104 case 5:
105 case 6:
Tristan Shieh71d227b2018-07-09 18:59:32 +0800106 gpio_set_mode(GPIO(UCTS0), PAD_UCTS0_FUNC_I2S2_DI_1);
Yidi Lin19318dd2016-03-16 16:59:17 +0800107 mt6391_gpio_output(MT6391_KP_COL5, 1);
108 break;
109 default:
110 break;
111 }
Koro Chen9733ba52015-07-31 17:11:04 +0800112
jun.gaof059e972015-12-17 16:59:55 +0800113 /* Init i2c bus Timing register for audio codecs */
henryc.chen316ded82016-03-11 14:55:30 +0800114 mtk_i2c_bus_init(CODEC_I2C_BUS);
jun.gaof059e972015-12-17 16:59:55 +0800115
Koro Chen9733ba52015-07-31 17:11:04 +0800116 /* set I2S clock to 48KHz */
117 mt_pll_set_aud_div(48 * KHz);
118}
119
Ben Loka7379402015-07-31 17:11:11 +0800120static void configure_usb(void)
121{
122 setup_usb_host();
123
Julius Werner9a570952016-03-14 20:12:18 -0700124 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 3) {
Yidi Lin57debca2017-02-17 15:59:17 +0800125 /* Type C port 0 Over current alert pin */
Tristan Shieh71d227b2018-07-09 18:59:32 +0800126 gpio_input_pullup(GPIO(MSDC3_DSL));
Evan Green0aa1f9e2019-03-26 11:37:30 -0700127 /* Enable USB3 type A port 0 5V load switch */
128 gpio_output(GPIO(CM2MCLK), 1);
129 /* USB3 Type A port 0 power over current alert pin */
130 gpio_input_pullup(GPIO(CMPCLK));
Yidi Lin57debca2017-02-17 15:59:17 +0800131 /* Type C port 1 over current alert pin */
Yidi Lin19318dd2016-03-16 16:59:17 +0800132 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 7)
Tristan Shieh71d227b2018-07-09 18:59:32 +0800133 gpio_input_pullup(GPIO(PCM_SYNC));
Yidi Lin358f66a2016-01-11 10:05:46 +0800134 }
135
Yidi Lin19318dd2016-03-16 16:59:17 +0800136 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4 &&
137 board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 7)
138 {
Yidi Lin358f66a2016-01-11 10:05:46 +0800139 /* USB 2.0 type A port over current interrupt pin(low active) */
Tristan Shieh71d227b2018-07-09 18:59:32 +0800140 gpio_input_pullup(GPIO(UCTS2));
Yidi Lin358f66a2016-01-11 10:05:46 +0800141 /* USB 2.0 type A port BC1.2 STATUS(low active) */
Tristan Shieh71d227b2018-07-09 18:59:32 +0800142 gpio_input_pullup(GPIO(AUD_DAT_MISO));
Yidi Lin358f66a2016-01-11 10:05:46 +0800143 }
Ben Loka7379402015-07-31 17:11:11 +0800144}
145
Ben Lok7d7dc202016-01-08 13:10:34 +0800146static void configure_usb_hub(void)
147{
Elyes HAOUAS44f558e2020-02-24 13:26:04 +0100148 /* set USB hub reset pin (low active) to high */
Julius Werner9a570952016-03-14 20:12:18 -0700149 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4)
Tristan Shieh71d227b2018-07-09 18:59:32 +0800150 gpio_output(GPIO(UTXD3), 1);
Ben Lok7d7dc202016-01-08 13:10:34 +0800151}
152
YH Huang1fcee362015-07-31 17:11:07 +0800153/* Setup backlight control pins as output pin and power-off by default */
154static void configure_backlight(void)
155{
Yidi Lin0443ecc2015-12-28 16:40:54 +0800156 /* Configure PANEL_LCD_POWER_EN */
Julius Werner9a570952016-03-14 20:12:18 -0700157 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
YH Huang1fcee362015-07-31 17:11:07 +0800158 case 3:
Tristan Shieh71d227b2018-07-09 18:59:32 +0800159 gpio_output(GPIO(UCTS2), 0);
YH Huang1fcee362015-07-31 17:11:07 +0800160 break;
161 case 4:
Tristan Shieh71d227b2018-07-09 18:59:32 +0800162 gpio_output(GPIO(SRCLKENAI), 0);
Yidi Lin0443ecc2015-12-28 16:40:54 +0800163 break;
YH Huang1fcee362015-07-31 17:11:07 +0800164 default:
Tristan Shieh71d227b2018-07-09 18:59:32 +0800165 gpio_output(GPIO(UTXD2), 0);
YH Huang1fcee362015-07-31 17:11:07 +0800166 break;
167 }
Yidi Lin0443ecc2015-12-28 16:40:54 +0800168
Tristan Shieh71d227b2018-07-09 18:59:32 +0800169 gpio_output(GPIO(DISP_PWM0), 0); /* DISP_PWM0 */
170 gpio_output(GPIO(PCM_TX), 0); /* PANEL_POWER_EN */
YH Huang1fcee362015-07-31 17:11:07 +0800171}
172
Jitao Shi8ea218b2016-01-11 19:24:37 +0800173static void configure_display(void)
174{
Yidi Lin19318dd2016-03-16 16:59:17 +0800175 /* board from Rev2 */
Tristan Shieh71d227b2018-07-09 18:59:32 +0800176 gpio_output(GPIO(CMMCLK), 1); /* PANEL_3V3_ENABLE */
Yidi Lin19318dd2016-03-16 16:59:17 +0800177 /* vgp2 set to 3.3V for ps8640 */
178 mt6391_configure_ldo(LDO_VGP2, LDO_3P3);
Tristan Shieh71d227b2018-07-09 18:59:32 +0800179 gpio_output(GPIO(URTS0), 0); /* PS8640_SYSRSTN */
Yidi Lin19318dd2016-03-16 16:59:17 +0800180 /* PS8640_1V2_ENABLE */
181 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT == 4)
Tristan Shieh71d227b2018-07-09 18:59:32 +0800182 gpio_output(GPIO(SRCLKENAI2), 1);
Yidi Lin19318dd2016-03-16 16:59:17 +0800183 else
Tristan Shieh71d227b2018-07-09 18:59:32 +0800184 gpio_output(GPIO(URTS2), 1);
Yidi Lin19318dd2016-03-16 16:59:17 +0800185 /* delay 2ms for vgp2 and PS8640_1V2_ENABLE stable */
186 mdelay(2);
187 /* PS8640_PDN */
188 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4)
Tristan Shieh71d227b2018-07-09 18:59:32 +0800189 gpio_output(GPIO(LCM_RST), 1);
Yidi Lin19318dd2016-03-16 16:59:17 +0800190 else
Tristan Shieh71d227b2018-07-09 18:59:32 +0800191 gpio_output(GPIO(UCTS0), 1);
192 gpio_output(GPIO(PCM_CLK), 1); /* PS8640_MODE_CONF */
193 gpio_output(GPIO(URTS0), 1); /* PS8640_SYSRSTN */
Yidi Lin19318dd2016-03-16 16:59:17 +0800194 /* for level shift(1.8V to 3.3V) on */
195 udelay(100);
Jitao Shi8ea218b2016-01-11 19:24:37 +0800196}
197
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800198static int read_edid_from_ps8640(struct edid *edid)
199{
Yidi Lin19318dd2016-03-16 16:59:17 +0800200 u8 i2c_bus, i2c_addr;
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800201
Yidi Lin19318dd2016-03-16 16:59:17 +0800202 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 6) {
203 i2c_bus = 0;
204 i2c_addr = 0x8;
205 } else {
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800206 i2c_bus = 4;
Yidi Lin19318dd2016-03-16 16:59:17 +0800207 i2c_addr = 0x18;
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800208 }
Yidi Lin19318dd2016-03-16 16:59:17 +0800209
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800210 mtk_i2c_bus_init(i2c_bus);
211
Yidi Lin19318dd2016-03-16 16:59:17 +0800212 ps8640_init(i2c_bus, i2c_addr);
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800213 if (ps8640_get_edid(i2c_bus, i2c_addr, edid)) {
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800214 printk(BIOS_ERR, "Can't get panel's edid\n");
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800215 return -1;
216 }
217
218 return 0;
219}
220
221static void display_startup(void)
222{
223 struct edid edid;
224 int ret;
225 u32 mipi_dsi_flags;
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800226
Evan Green0aa1f9e2019-03-26 11:37:30 -0700227 if (read_edid_from_ps8640(&edid) < 0)
228 return;
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800229
Evan Green0aa1f9e2019-03-26 11:37:30 -0700230 mipi_dsi_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
Daniel Kurtz2332ada2017-04-20 12:30:00 +0800231 edid_set_framebuffer_bits_per_pixel(&edid, 32, 0);
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800232
Hung-Te Lin1c6e5a62019-08-05 14:38:30 +0800233 mtk_ddp_init();
Hung-Te Lin75e43142019-08-07 10:31:27 +0800234 ret = mtk_dsi_init(mipi_dsi_flags, MIPI_DSI_FMT_RGB888, 4, &edid, NULL);
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800235 if (ret < 0) {
236 printk(BIOS_ERR, "dsi init fail\n");
237 return;
238 }
239
Hung-Te Lin1c6e5a62019-08-05 14:38:30 +0800240 mtk_ddp_mode_set(&edid);
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800241 set_vbe_mode_info_valid(&edid, (uintptr_t)0);
242}
243
Elyes HAOUASd129d432018-05-04 20:23:33 +0200244static void mainboard_init(struct device *dev)
Yidi Lin3d7b6062015-07-31 17:10:40 +0800245{
Ben Loka7379402015-07-31 17:11:11 +0800246 /* TP_SHIFT_EN: Enables the level shifter for I2C bus 4 (TPAD), which
247 * also contains the PS8640 eDP brige and the USB hub.
248 */
Julius Werner9a570952016-03-14 20:12:18 -0700249 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
Yidi Lincd6aac12015-12-28 17:22:33 +0800250 mt6391_gpio_output(MT6391_KP_ROW2, 1);
Ben Loka7379402015-07-31 17:11:11 +0800251
Yidi Linb9b2c6f2015-11-13 16:21:48 +0800252 /* Config SD card detection pin */
Tristan Shieh71d227b2018-07-09 18:59:32 +0800253 gpio_input_pullup(GPIO(EINT1)); /* SD_DET */
Yidi Linb9b2c6f2015-11-13 16:21:48 +0800254
Koro Chen9733ba52015-07-31 17:11:04 +0800255 configure_audio();
Martin Rothc7dfbe22016-07-22 11:15:12 -0600256
257 /* fix dsi lp mode is half voltage attenuation */
258 mtk_dsi_pin_drv_ctrl();
259
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800260 if (display_init_required()) {
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800261 mtcmos_display_power_on();
Evan Green0aa1f9e2019-03-26 11:37:30 -0700262 configure_backlight();
263 configure_display();
Daniel Kurtz8e055f82017-04-20 15:31:33 +0800264 display_startup();
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800265 } else {
266 printk(BIOS_INFO, "Skipping display init.\n");
267 }
Ben Loka7379402015-07-31 17:11:11 +0800268 configure_usb();
Ben Lok7d7dc202016-01-08 13:10:34 +0800269 configure_usb_hub();
henryc.chen316ded82016-03-11 14:55:30 +0800270 configure_ext_buck();
YH Huang5d687ad2016-07-14 11:49:01 +0800271 configure_touchscreen();
Yidi Lin3d7b6062015-07-31 17:10:40 +0800272}
273
Elyes HAOUASd129d432018-05-04 20:23:33 +0200274static void mainboard_enable(struct device *dev)
Yidi Lin3d7b6062015-07-31 17:10:40 +0800275{
276 dev->ops->init = &mainboard_init;
277}
278
279struct chip_operations mainboard_ops = {
280 .name = "oak",
281 .enable_dev = mainboard_enable,
282};