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Yidi Lin3d7b6062015-07-31 17:10:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Yidi Lin3d7b6062015-07-31 17:10:40 +080014 */
15
16#include <arch/cache.h>
17#include <arch/io.h>
18#include <boardid.h>
19#include <boot/coreboot_tables.h>
Jitao Shi4a04a7b2016-01-08 16:02:13 +080020#include <bootmode.h>
21#include <console/console.h>
Koro Chen9733ba52015-07-31 17:11:04 +080022#include <delay.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080023#include <device/device.h>
Jitao Shi4a04a7b2016-01-08 16:02:13 +080024#include <drivers/parade/ps8640/ps8640.h>
25#include <edid.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080026
CC Ma72980b12015-09-15 17:33:38 +080027#include <elog.h>
Koro Chen9733ba52015-07-31 17:11:04 +080028#include <gpio.h>
henryc.chen316ded82016-03-11 14:55:30 +080029#include <soc/da9212.h>
Jitao Shi4a04a7b2016-01-08 16:02:13 +080030#include <soc/ddp.h>
31#include <soc/dsi.h>
jun.gaof059e972015-12-17 16:59:55 +080032#include <soc/i2c.h>
henryc.chen316ded82016-03-11 14:55:30 +080033#include <soc/mt6311.h>
Koro Chen9733ba52015-07-31 17:11:04 +080034#include <soc/mt6391.h>
35#include <soc/mtcmos.h>
36#include <soc/pinmux.h>
37#include <soc/pll.h>
Ben Loka7379402015-07-31 17:11:11 +080038#include <soc/usb.h>
CC Ma72980b12015-09-15 17:33:38 +080039#include <vendorcode/google/chromeos/chromeos.h>
Koro Chen9733ba52015-07-31 17:11:04 +080040
henryc.chen316ded82016-03-11 14:55:30 +080041enum {
42 CODEC_I2C_BUS = 0,
43 EXT_BUCK_I2C_BUS = 1,
44};
45
46static void configure_ext_buck(void)
Jimmy Huang27eba672015-07-31 17:11:00 +080047{
henryc.chen316ded82016-03-11 14:55:30 +080048 mtk_i2c_bus_init(EXT_BUCK_I2C_BUS);
jun.gaof059e972015-12-17 16:59:55 +080049
Julius Werner9a570952016-03-14 20:12:18 -070050 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
henryc.chen70b30442015-12-23 11:45:29 +080051 case 3:
52 case 4:
Jimmy Huang27eba672015-07-31 17:11:00 +080053 /* rev-3 and rev-4 use mt6311 as external buck */
henryc.chen316ded82016-03-11 14:55:30 +080054 gpio_output(PAD_EINT15, 1);
55 udelay(500);
56 mt6311_probe(EXT_BUCK_I2C_BUS);
Jimmy Huang27eba672015-07-31 17:11:00 +080057 break;
henryc.chen70b30442015-12-23 11:45:29 +080058 case 2:
59 default:
60 /* rev-2 and rev-5 use da9212 as external buck */
henryc.chen316ded82016-03-11 14:55:30 +080061 mt6391_gpio_output(MT6391_KP_ROW3, 1); /* DA9212_IC_EN */
62 mt6391_gpio_output(MT6391_KP_ROW4, 1); /* DA9212_EN_A */
63 udelay(500); /* add 500us delay for powering on da9212 */
64 da9212_probe(EXT_BUCK_I2C_BUS);
henryc.chen70b30442015-12-23 11:45:29 +080065 break;
Jimmy Huang27eba672015-07-31 17:11:00 +080066 }
67}
68
Koro Chen9733ba52015-07-31 17:11:04 +080069static void configure_audio(void)
70{
71 mtcmos_audio_power_on();
72
Koro Chen603cb852015-12-30 17:50:56 +080073 /* vgp1 set to 1.8V */
74 mt6391_configure_ldo(LDO_VCAMD, LDO_1P8);
75 /* delay 1ms for realtek's power sequence request */
76 mdelay(1);
77 /* vcama set to 1.8V */
78 mt6391_configure_ldo(LDO_VCAMA, LDO_1P8);
Koro Chen9733ba52015-07-31 17:11:04 +080079
80 /* reset ALC5676 */
Julius Werner9a570952016-03-14 20:12:18 -070081 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
Koro Chena9f65292015-12-30 17:31:44 +080082 gpio_output(PAD_LCM_RST, 1);
Koro Chen9733ba52015-07-31 17:11:04 +080083
84 /* SoC I2S */
85 gpio_set_mode(PAD_I2S0_LRCK, PAD_I2S0_LRCK_FUNC_I2S1_WS);
86 gpio_set_mode(PAD_I2S0_BCK, PAD_I2S0_BCK_FUNC_I2S1_BCK);
87 gpio_set_mode(PAD_I2S0_MCK, PAD_I2S0_MCK_FUNC_I2S1_MCK);
88 gpio_set_mode(PAD_I2S0_DATA0, PAD_I2S0_DATA0_FUNC_I2S1_DO_1);
89 gpio_set_mode(PAD_I2S0_DATA1, PAD_I2S0_DATA1_FUNC_I2S2_DI_2);
Julius Werner9a570952016-03-14 20:12:18 -070090 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT >= 5)
Koro Chena9f65292015-12-30 17:31:44 +080091 gpio_set_mode(PAD_UCTS0, PAD_UCTS0_FUNC_I2S2_DI_1);
Koro Chen9733ba52015-07-31 17:11:04 +080092
93 /* codec ext MCLK ON */
94 mt6391_gpio_output(MT6391_KP_COL4, 1);
95 mt6391_gpio_output(MT6391_KP_COL5, 1);
96
jun.gaof059e972015-12-17 16:59:55 +080097 /* Init i2c bus Timing register for audio codecs */
henryc.chen316ded82016-03-11 14:55:30 +080098 mtk_i2c_bus_init(CODEC_I2C_BUS);
jun.gaof059e972015-12-17 16:59:55 +080099
Koro Chen9733ba52015-07-31 17:11:04 +0800100 /* set I2S clock to 48KHz */
101 mt_pll_set_aud_div(48 * KHz);
102}
103
Ben Loka7379402015-07-31 17:11:11 +0800104static void configure_usb(void)
105{
106 setup_usb_host();
107
Julius Werner9a570952016-03-14 20:12:18 -0700108 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 3) {
Yidi Lin358f66a2016-01-11 10:05:46 +0800109 /* Enable current limit */
Ben Loka7379402015-07-31 17:11:11 +0800110 gpio_output(PAD_CM2MCLK, 1);
Yidi Lin358f66a2016-01-11 10:05:46 +0800111 /* Configure USB OC pins*/
112 gpio_input_pullup(PAD_MSDC3_DSL);
113 gpio_input_pullup(PAD_CMPCLK);
114 gpio_input_pullup(PAD_PCM_SYNC);
115 }
116
Julius Werner9a570952016-03-14 20:12:18 -0700117 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4) {
Yidi Lin358f66a2016-01-11 10:05:46 +0800118 /* USB 2.0 type A port over current interrupt pin(low active) */
119 gpio_input_pullup(PAD_UCTS2);
120 /* USB 2.0 type A port BC1.2 STATUS(low active) */
121 gpio_input_pullup(PAD_AUD_DAT_MISO);
122 }
Ben Loka7379402015-07-31 17:11:11 +0800123}
124
Ben Lok7d7dc202016-01-08 13:10:34 +0800125static void configure_usb_hub(void)
126{
127 /* set usb hub reset pin (low active) to high */
Julius Werner9a570952016-03-14 20:12:18 -0700128 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4)
Ben Lok7d7dc202016-01-08 13:10:34 +0800129 gpio_output(PAD_UTXD3, 1);
130}
131
YH Huang1fcee362015-07-31 17:11:07 +0800132/* Setup backlight control pins as output pin and power-off by default */
133static void configure_backlight(void)
134{
Yidi Lin0443ecc2015-12-28 16:40:54 +0800135 /* Configure PANEL_LCD_POWER_EN */
Julius Werner9a570952016-03-14 20:12:18 -0700136 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
YH Huang1fcee362015-07-31 17:11:07 +0800137 case 1:
138 case 2:
YH Huang1fcee362015-07-31 17:11:07 +0800139 break;
140 case 3:
Yidi Lin0443ecc2015-12-28 16:40:54 +0800141 gpio_output(PAD_UCTS2, 0);
YH Huang1fcee362015-07-31 17:11:07 +0800142 break;
143 case 4:
Yidi Lin0443ecc2015-12-28 16:40:54 +0800144 gpio_output(PAD_SRCLKENAI, 0);
145 break;
YH Huang1fcee362015-07-31 17:11:07 +0800146 default:
Yidi Lin0443ecc2015-12-28 16:40:54 +0800147 gpio_output(PAD_UTXD2, 0);
YH Huang1fcee362015-07-31 17:11:07 +0800148 break;
149 }
Yidi Lin0443ecc2015-12-28 16:40:54 +0800150
151 gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
152 gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
YH Huang1fcee362015-07-31 17:11:07 +0800153}
154
Jitao Shi8ea218b2016-01-11 19:24:37 +0800155static void configure_display(void)
156{
157 mtcmos_display_power_on();
158
Julius Werner9a570952016-03-14 20:12:18 -0700159 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
Jitao Shi8ea218b2016-01-11 19:24:37 +0800160 case 0:
161 /* board from Rev0, Rev1 */
162 /* vgp2 set to 1.8V for it6151 */
163 mt6391_configure_ldo(LDO_VGP2, LDO_1P8);
164 gpio_output(PAD_PCM_RX, 0); /* IT6151_SYSRSTN */
165 gpio_output(PAD_CMMCLK, 1); /* PANEL_3V3_ENABLE */
166 gpio_output(PAD_PCM_SYNC, 1); /* IT6151_1V2_ENABLE */
167 gpio_output(PAD_PCM_RX, 1); /* IT6151_SYSRSTN */
168 break;
169 case 1:
170 /* board from Rev0, Rev1 */
171 /* vgp2 set to 1.8V for it6151 */
172 mt6391_configure_ldo(LDO_VGP2, LDO_1P8);
173 gpio_output(PAD_URTS0, 0); /* IT6151_SYSRSTN */
174 gpio_output(PAD_URTS2, 1); /* IT6151_1V2_ENABLE */
175 gpio_output(PAD_CMMCLK, 1); /* PANEL_3V3_ENABLE */
176 gpio_output(PAD_URTS0, 1); /* IT6151_SYSRSTN */
177 break;
178 default:
179 /* board from Rev2 */
180 gpio_output(PAD_CMMCLK, 1); /* PANEL_3V3_ENABLE */
181 /* vgp2 set to 3.3V for ps8640 */
182 mt6391_configure_ldo(LDO_VGP2, LDO_3P3);
183 gpio_output(PAD_URTS0, 0); /* PS8640_SYSRSTN */
184 /* PS8640_1V2_ENABLE */
Julius Werner9a570952016-03-14 20:12:18 -0700185 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT == 4)
186 gpio_output(PAD_SRCLKENAI2, 1);
187 else
188 gpio_output(PAD_URTS2, 1);
Jitao Shi8ea218b2016-01-11 19:24:37 +0800189 /* delay 2ms for vgp2 and PS8640_1V2_ENABLE stable */
190 mdelay(2);
191 /* PS8640_PDN */
Julius Werner9a570952016-03-14 20:12:18 -0700192 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4)
193 gpio_output(PAD_LCM_RST, 1);
194 else
195 gpio_output(PAD_UCTS0, 1);
Jitao Shi8ea218b2016-01-11 19:24:37 +0800196 gpio_output(PAD_PCM_CLK, 1); /* PS8640_MODE_CONF */
197 gpio_output(PAD_URTS0, 1); /* PS8640_SYSRSTN */
198 /* for level shift(1.8V to 3.3V) on */
199 udelay(100);
200 }
201}
202
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800203static void display_startup(void)
204{
205 struct edid edid;
206 u8 i2c_bus;
207 int ret;
208
Julius Werner9a570952016-03-14 20:12:18 -0700209 switch (board_id() + CONFIG_BOARD_ID_ADJUSTMENT) {
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800210 case 0:
211 case 1:
212 i2c_bus = 3;
213 break;
214 default:
215 i2c_bus = 4;
216 break;
217 }
218 mtk_i2c_bus_init(i2c_bus);
219
220 ps8640_init(i2c_bus, 0x18);
221 if (ps8640_get_edid(i2c_bus, 0x18, &edid)) {
222 printk(BIOS_ERR, "Can't get panel's edid\n");
223 return;
224 }
225
226 edid.x_resolution = edid.mode.ha;
227 edid.y_resolution = edid.mode.va;
228 edid.bytes_per_line = edid.mode.ha * edid.framebuffer_bits_per_pixel /
229 8;
230
231 mtk_ddp_init();
232 ret = mtk_dsi_init(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
233 MIPI_DSI_FMT_RGB888, 4, &edid);
234 if (ret < 0) {
235 printk(BIOS_ERR, "dsi init fail\n");
236 return;
237 }
238
239 mtk_ddp_mode_set(&edid);
240
241 set_vbe_mode_info_valid(&edid, (uintptr_t)0);
242}
243
Yidi Lin3d7b6062015-07-31 17:10:40 +0800244static void mainboard_init(device_t dev)
245{
Ben Loka7379402015-07-31 17:11:11 +0800246 /* TP_SHIFT_EN: Enables the level shifter for I2C bus 4 (TPAD), which
247 * also contains the PS8640 eDP brige and the USB hub.
248 */
Julius Werner9a570952016-03-14 20:12:18 -0700249 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
Yidi Lincd6aac12015-12-28 17:22:33 +0800250 mt6391_gpio_output(MT6391_KP_ROW2, 1);
Ben Loka7379402015-07-31 17:11:11 +0800251
Yidi Linb9b2c6f2015-11-13 16:21:48 +0800252 /* Config SD card detection pin */
253 gpio_input(PAD_EINT1); /* SD_DET */
254
Koro Chen9733ba52015-07-31 17:11:04 +0800255 configure_audio();
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800256 if (display_init_required()) {
257 configure_backlight();
Jitao Shi8ea218b2016-01-11 19:24:37 +0800258 configure_display();
Jitao Shi4a04a7b2016-01-08 16:02:13 +0800259 display_startup();
260 } else {
261 printk(BIOS_INFO, "Skipping display init.\n");
262 }
Ben Loka7379402015-07-31 17:11:11 +0800263 configure_usb();
Ben Lok7d7dc202016-01-08 13:10:34 +0800264 configure_usb_hub();
henryc.chen316ded82016-03-11 14:55:30 +0800265 configure_ext_buck();
CC Ma72980b12015-09-15 17:33:38 +0800266
267 elog_init();
Julius Wernerc7135942016-03-23 16:08:11 -0700268 elog_add_watchdog_reset();
CC Ma72980b12015-09-15 17:33:38 +0800269 elog_add_boot_reason();
Yidi Lin3d7b6062015-07-31 17:10:40 +0800270}
271
272static void mainboard_enable(device_t dev)
273{
274 dev->ops->init = &mainboard_init;
275}
276
277struct chip_operations mainboard_ops = {
278 .name = "oak",
279 .enable_dev = mainboard_enable,
280};