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Yidi Lin3d7b6062015-07-31 17:10:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Yidi Lin3d7b6062015-07-31 17:10:40 +080014 */
15
16#include <arch/cache.h>
17#include <arch/io.h>
18#include <boardid.h>
19#include <boot/coreboot_tables.h>
Koro Chen9733ba52015-07-31 17:11:04 +080020#include <delay.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080021#include <device/device.h>
22
CC Ma72980b12015-09-15 17:33:38 +080023#include <elog.h>
Koro Chen9733ba52015-07-31 17:11:04 +080024#include <gpio.h>
Jimmy Huang27eba672015-07-31 17:11:00 +080025#include <soc/bl31_plat_params.h>
jun.gaof059e972015-12-17 16:59:55 +080026#include <soc/i2c.h>
Koro Chen9733ba52015-07-31 17:11:04 +080027#include <soc/mt6391.h>
28#include <soc/mtcmos.h>
29#include <soc/pinmux.h>
30#include <soc/pll.h>
Ben Loka7379402015-07-31 17:11:11 +080031#include <soc/usb.h>
CC Ma72980b12015-09-15 17:33:38 +080032#include <vendorcode/google/chromeos/chromeos.h>
Koro Chen9733ba52015-07-31 17:11:04 +080033
Jimmy Huang27eba672015-07-31 17:11:00 +080034static void register_da9212_to_bl31(void)
35{
36#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE)
37 static struct bl31_da9212_param param_da9212 = {
38 .h = {
39 .type = PARAM_CLUSTER1_DA9212,
40 },
41 .i2c_bus = 1,
42 .ic_en = {
henryc.chen70b30442015-12-23 11:45:29 +080043 .type = PARAM_GPIO_MT6391,
Jimmy Huang27eba672015-07-31 17:11:00 +080044 .polarity = PARAM_GPIO_ACTIVE_HIGH,
henryc.chen70b30442015-12-23 11:45:29 +080045 .index = MT6391_KP_ROW3,
Jimmy Huang27eba672015-07-31 17:11:00 +080046 },
47 .en_a = {
48 .type = PARAM_GPIO_MT6391,
49 .polarity = PARAM_GPIO_ACTIVE_HIGH,
50 .index = MT6391_KP_ROW4,
51 },
52 .en_b = {
53 .type = PARAM_GPIO_NONE,
54 },
55 };
henryc.chen70b30442015-12-23 11:45:29 +080056 if (board_id() == 2) {
57 param_da9212.ic_en.type = PARAM_GPIO_SOC;
58 param_da9212.ic_en.index = PAD_UCTS2;
59 }
Jimmy Huang27eba672015-07-31 17:11:00 +080060 register_bl31_param(&param_da9212.h);
jun.gaof059e972015-12-17 16:59:55 +080061
62 /* Init i2c bus Timing register for da9212 */
63 mtk_i2c_bus_init(param_da9212.i2c_bus);
Jimmy Huang27eba672015-07-31 17:11:00 +080064#endif
65}
66
67static void register_mt6311_to_bl31(void)
68{
69#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE)
70 static struct bl31_mt6311_param param_mt6311 = {
71 .h = {
72 .type = PARAM_CLUSTER1_MT6311,
73 },
74 .i2c_bus = 1,
75 };
76 register_bl31_param(&param_mt6311.h);
jun.gaof059e972015-12-17 16:59:55 +080077
78 /* Init i2c bus Timing register for mt6311 */
79 mtk_i2c_bus_init(param_mt6311.i2c_bus);
Jimmy Huang27eba672015-07-31 17:11:00 +080080#endif
81}
82
83static void configure_bl31(void)
84{
85 switch (board_id()) {
henryc.chen70b30442015-12-23 11:45:29 +080086 case 3:
87 case 4:
Jimmy Huang27eba672015-07-31 17:11:00 +080088 /* rev-3 and rev-4 use mt6311 as external buck */
89 register_mt6311_to_bl31();
90 break;
henryc.chen70b30442015-12-23 11:45:29 +080091 case 2:
92 default:
93 /* rev-2 and rev-5 use da9212 as external buck */
94 register_da9212_to_bl31();
95 break;
Jimmy Huang27eba672015-07-31 17:11:00 +080096 }
97}
98
Koro Chen9733ba52015-07-31 17:11:04 +080099static void configure_audio(void)
100{
101 mtcmos_audio_power_on();
102
103 /* regulator for codecs */
104 switch (board_id()) {
105 case 0:
106 /* vgp1 set to 1.22V */
107 mt6391_configure_ldo(LDO_VCAMD, LDO_1P22);
108 /* vgp4 set to 1.8V */
109 mt6391_configure_ldo(LDO_VGP4, LDO_1P8);
110 break;
111 default:
112 /* board from Rev1 */
113 /* vgp1 set to 1.8V */
114 mt6391_configure_ldo(LDO_VCAMD, LDO_1P8);
115 /* delay 1ms for realtek's power sequence request */
116 mdelay(1);
117 /* vcama set to 1.8V */
118 mt6391_configure_ldo(LDO_VCAMA, LDO_1P8);
119 break;
120 }
121
122 /* reset ALC5676 */
123 gpio_output(PAD_LCM_RST, 1);
124
125 /* SoC I2S */
126 gpio_set_mode(PAD_I2S0_LRCK, PAD_I2S0_LRCK_FUNC_I2S1_WS);
127 gpio_set_mode(PAD_I2S0_BCK, PAD_I2S0_BCK_FUNC_I2S1_BCK);
128 gpio_set_mode(PAD_I2S0_MCK, PAD_I2S0_MCK_FUNC_I2S1_MCK);
129 gpio_set_mode(PAD_I2S0_DATA0, PAD_I2S0_DATA0_FUNC_I2S1_DO_1);
130 gpio_set_mode(PAD_I2S0_DATA1, PAD_I2S0_DATA1_FUNC_I2S2_DI_2);
131
132 /* codec ext MCLK ON */
133 mt6391_gpio_output(MT6391_KP_COL4, 1);
134 mt6391_gpio_output(MT6391_KP_COL5, 1);
135
jun.gaof059e972015-12-17 16:59:55 +0800136 /* Init i2c bus Timing register for audio codecs */
137 mtk_i2c_bus_init(0);
138
Koro Chen9733ba52015-07-31 17:11:04 +0800139 /* set I2S clock to 48KHz */
140 mt_pll_set_aud_div(48 * KHz);
141}
142
Ben Loka7379402015-07-31 17:11:11 +0800143static void configure_usb(void)
144{
145 setup_usb_host();
146
147 if (board_id() > 3)
148 gpio_output(PAD_CM2MCLK, 1);
149}
150
YH Huang1fcee362015-07-31 17:11:07 +0800151/* Setup backlight control pins as output pin and power-off by default */
152static void configure_backlight(void)
153{
Yidi Lin0443ecc2015-12-28 16:40:54 +0800154 /* Configure PANEL_LCD_POWER_EN */
YH Huang1fcee362015-07-31 17:11:07 +0800155 switch (board_id()) {
YH Huang1fcee362015-07-31 17:11:07 +0800156 case 1:
157 case 2:
YH Huang1fcee362015-07-31 17:11:07 +0800158 break;
159 case 3:
Yidi Lin0443ecc2015-12-28 16:40:54 +0800160 gpio_output(PAD_UCTS2, 0);
YH Huang1fcee362015-07-31 17:11:07 +0800161 break;
162 case 4:
Yidi Lin0443ecc2015-12-28 16:40:54 +0800163 gpio_output(PAD_SRCLKENAI, 0);
164 break;
YH Huang1fcee362015-07-31 17:11:07 +0800165 default:
Yidi Lin0443ecc2015-12-28 16:40:54 +0800166 gpio_output(PAD_UTXD2, 0);
YH Huang1fcee362015-07-31 17:11:07 +0800167 break;
168 }
Yidi Lin0443ecc2015-12-28 16:40:54 +0800169
170 gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
171 gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
YH Huang1fcee362015-07-31 17:11:07 +0800172}
173
Yidi Lin3d7b6062015-07-31 17:10:40 +0800174static void mainboard_init(device_t dev)
175{
Ben Loka7379402015-07-31 17:11:11 +0800176 /* TP_SHIFT_EN: Enables the level shifter for I2C bus 4 (TPAD), which
177 * also contains the PS8640 eDP brige and the USB hub.
178 */
179 mt6391_gpio_output(MT6391_KP_ROW2, 1);
180
Yidi Linb9b2c6f2015-11-13 16:21:48 +0800181 /* Config SD card detection pin */
182 gpio_input(PAD_EINT1); /* SD_DET */
183
Koro Chen9733ba52015-07-31 17:11:04 +0800184 configure_audio();
YH Huang1fcee362015-07-31 17:11:07 +0800185 configure_backlight();
Ben Loka7379402015-07-31 17:11:11 +0800186 configure_usb();
Jimmy Huang27eba672015-07-31 17:11:00 +0800187 configure_bl31();
CC Ma72980b12015-09-15 17:33:38 +0800188
189 elog_init();
190 elog_add_boot_reason();
Yidi Lin3d7b6062015-07-31 17:10:40 +0800191}
192
193static void mainboard_enable(device_t dev)
194{
195 dev->ops->init = &mainboard_init;
196}
197
198struct chip_operations mainboard_ops = {
199 .name = "oak",
200 .enable_dev = mainboard_enable,
201};