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Yidi Lin3d7b6062015-07-31 17:10:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Yidi Lin3d7b6062015-07-31 17:10:40 +080014 */
15
16#include <arch/cache.h>
17#include <arch/io.h>
18#include <boardid.h>
19#include <boot/coreboot_tables.h>
Koro Chen9733ba52015-07-31 17:11:04 +080020#include <delay.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080021#include <device/device.h>
22
Koro Chen9733ba52015-07-31 17:11:04 +080023#include <gpio.h>
24#include <soc/mt6391.h>
25#include <soc/mtcmos.h>
26#include <soc/pinmux.h>
27#include <soc/pll.h>
Ben Loka7379402015-07-31 17:11:11 +080028#include <soc/usb.h>
Koro Chen9733ba52015-07-31 17:11:04 +080029
30static void configure_audio(void)
31{
32 mtcmos_audio_power_on();
33
34 /* regulator for codecs */
35 switch (board_id()) {
36 case 0:
37 /* vgp1 set to 1.22V */
38 mt6391_configure_ldo(LDO_VCAMD, LDO_1P22);
39 /* vgp4 set to 1.8V */
40 mt6391_configure_ldo(LDO_VGP4, LDO_1P8);
41 break;
42 default:
43 /* board from Rev1 */
44 /* vgp1 set to 1.8V */
45 mt6391_configure_ldo(LDO_VCAMD, LDO_1P8);
46 /* delay 1ms for realtek's power sequence request */
47 mdelay(1);
48 /* vcama set to 1.8V */
49 mt6391_configure_ldo(LDO_VCAMA, LDO_1P8);
50 break;
51 }
52
53 /* reset ALC5676 */
54 gpio_output(PAD_LCM_RST, 1);
55
56 /* SoC I2S */
57 gpio_set_mode(PAD_I2S0_LRCK, PAD_I2S0_LRCK_FUNC_I2S1_WS);
58 gpio_set_mode(PAD_I2S0_BCK, PAD_I2S0_BCK_FUNC_I2S1_BCK);
59 gpio_set_mode(PAD_I2S0_MCK, PAD_I2S0_MCK_FUNC_I2S1_MCK);
60 gpio_set_mode(PAD_I2S0_DATA0, PAD_I2S0_DATA0_FUNC_I2S1_DO_1);
61 gpio_set_mode(PAD_I2S0_DATA1, PAD_I2S0_DATA1_FUNC_I2S2_DI_2);
62
63 /* codec ext MCLK ON */
64 mt6391_gpio_output(MT6391_KP_COL4, 1);
65 mt6391_gpio_output(MT6391_KP_COL5, 1);
66
67 /* set I2S clock to 48KHz */
68 mt_pll_set_aud_div(48 * KHz);
69}
70
Ben Loka7379402015-07-31 17:11:11 +080071static void configure_usb(void)
72{
73 setup_usb_host();
74
75 if (board_id() > 3)
76 gpio_output(PAD_CM2MCLK, 1);
77}
78
YH Huang1fcee362015-07-31 17:11:07 +080079/* Setup backlight control pins as output pin and power-off by default */
80static void configure_backlight(void)
81{
82 switch (board_id()) {
83 case 0:
84 gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
85 mt6391_gpio_output(MT6391_KP_ROW3, 0); /* PANEL_POWER_EN_6397 */
86 break;
87 case 1:
88 case 2:
89 gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
90 gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
91 break;
92 case 3:
93 gpio_output(PAD_UCTS2, 0); /* PANEL_LCD_POWER_EN */
94 gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
95 gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
96 break;
97 case 4:
98 default:
99 gpio_output(PAD_SRCLKENAI, 0); /* PANEL_LCD_POWER_EN */
100 gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
101 gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
102 break;
103 }
104}
105
Yidi Lin3d7b6062015-07-31 17:10:40 +0800106static void mainboard_init(device_t dev)
107{
Ben Loka7379402015-07-31 17:11:11 +0800108 /* TP_SHIFT_EN: Enables the level shifter for I2C bus 4 (TPAD), which
109 * also contains the PS8640 eDP brige and the USB hub.
110 */
111 mt6391_gpio_output(MT6391_KP_ROW2, 1);
112
Koro Chen9733ba52015-07-31 17:11:04 +0800113 configure_audio();
YH Huang1fcee362015-07-31 17:11:07 +0800114 configure_backlight();
Ben Loka7379402015-07-31 17:11:11 +0800115 configure_usb();
Yidi Lin3d7b6062015-07-31 17:10:40 +0800116}
117
118static void mainboard_enable(device_t dev)
119{
120 dev->ops->init = &mainboard_init;
121}
122
123struct chip_operations mainboard_ops = {
124 .name = "oak",
125 .enable_dev = mainboard_enable,
126};