Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 1 | /* |
| 2 | * inteltool - dump all registers on an Intel CPU + chipset based system. |
| 3 | * |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 4 | * Copyright (C) 2008-2010 by coresystems GmbH |
Anton Kochkov | c7fc442 | 2012-07-21 06:36:47 +0400 | [diff] [blame] | 5 | * Copyright (C) 2012 Anton Kochkov |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 6 | * |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 19 | */ |
| 20 | |
| 21 | #include <stdio.h> |
| 22 | #include <stdlib.h> |
Stefan Reinauer | a7b296d | 2011-11-14 12:40:34 -0800 | [diff] [blame] | 23 | #include <inttypes.h> |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 24 | #include "inteltool.h" |
| 25 | |
Anton Kochkov | c7fc442 | 2012-07-21 06:36:47 +0400 | [diff] [blame] | 26 | static const io_register_t sandybridge_dmi_registers[] = { |
| 27 | { 0x00, 4, "DMI VCECH" }, // DMI Virtual Channel Enhanced Capability |
| 28 | { 0x04, 4, "DMI PVCCAP1" }, // DMI Port VC Capability Register 1 |
| 29 | { 0x08, 4, "DMI PVVAP2" }, // DMI Port VC Capability Register 2 |
| 30 | { 0x0C, 2, "DMI PVCCTL" }, // DMI Port VC Control |
| 31 | /* { 0x0E, 2, "RSVD" }, // Reserved */ |
| 32 | { 0x10, 4, "DMI VC0RCAP" }, // DMI VC0 Resource Capability |
| 33 | { 0x14, 4, "DMI VC0RCTL" }, // DMI VC0 Resource Control |
| 34 | /* { 0x18, 2, "RSVD" }, // Reserved */ |
| 35 | { 0x1A, 2, "DMI VC0RSTS" }, // DMI VC0 Resource Status |
| 36 | { 0x1C, 4, "DMI VC1RCAP" }, // DMI VC1 Resource Capability |
| 37 | { 0x20, 4, "DMI VC1RCTL" }, // DMI VC1 Resource Control |
| 38 | /* { 0x24, 2, "RSVD" }, // Reserved */ |
| 39 | { 0x26, 2, "DMI VC1RSTS" }, // DMI VC1 Resource Status |
| 40 | { 0x28, 4, "DMI VCPRCAP" }, // DMI VCp Resource Capability |
| 41 | { 0x2C, 4, "DMI VCPRCTL" }, // DMI VCp Resource Control |
| 42 | /* { 0x30, 2, "RSVD" }, // Reserved */ |
| 43 | { 0x32, 2, "DMI VCPRSTS" }, // DMI VCp Resource Status |
| 44 | { 0x34, 4, "DMI VCMRCAP" }, // DMI VCm Resource Capability |
| 45 | { 0x38, 4, "DMI VCMRCTL" }, // DMI VCm Resource Control |
| 46 | /* { 0x3C, 2, "RSVD" }, // Reserved */ |
| 47 | { 0x3E, 2, "DMI VCMRSTS" }, // DMI VCm Resource Status |
| 48 | /* { 0x40, 4, "RSVD" }, // Reserved */ |
| 49 | { 0x44, 4, "DMI ESC" }, // DMI Element Self Description |
| 50 | /* { 0x48, 8, "RSVD" }, // Reserved */ |
| 51 | { 0x50, 4, "DMI LE1D" }, // DMI Link Entry 1 Description |
| 52 | /* { 0x54, 4, "RSVD" }, // Reserved */ |
| 53 | { 0x58, 4, "DMI LE1A" }, // DMI Link Entry 1 Address |
| 54 | { 0x5C, 4, "DMI LUE1A" }, // DMI Link Upper Entry 1 Address |
| 55 | { 0x60, 4, "DMI LE2D" }, // DMI Link Entry 2 Description |
| 56 | /* { 0x64, 4, "RSVD" }, // Reserved */ |
| 57 | { 0x68, 4, "DMI LE2A" }, // DMI Link Entry 2 Address |
| 58 | /* { 0x6C, 4, "RSVD" }, // Reserved |
| 59 | { 0x70, 8, "RSVD" }, // Reserved |
| 60 | { 0x78, 8, "RSVD" }, // Reserved |
| 61 | { 0x80, 4, "RSVD" }, // Reserved */ |
| 62 | { 0x84, 4, "LCAP" }, // Link Capabilities |
| 63 | { 0x88, 2, "LCTL" }, // Link Control |
| 64 | { 0x8A, 2, "LSTS" }, // Link Status |
| 65 | /* { 0x8C, 4, "RSVD" }, // Reserved |
| 66 | { 0x90, 4, "RSVD" }, // Reserved |
| 67 | { 0x94, 4, "RSVD" }, // Reserved */ |
| 68 | { 0x98, 2, "LCTL2" }, // Link Control 2 |
| 69 | { 0x9A, 2, "LSTS2" }, // Link Status 2 |
| 70 | /* ... - Reserved */ |
| 71 | { 0xBC0, 4, "AFE_BMUF0" }, // AFE BMU Configuration Function 0 |
| 72 | { 0xBC4, 4, "RSVD" }, // Reserved |
| 73 | { 0xBC8, 4, "RSVD" }, // Reserved |
| 74 | { 0xBCC, 4, "AFE_BMUT0" }, // AFE BMU Configuration Test 0 |
| 75 | /* ... - Reserved */ |
| 76 | }; |
| 77 | |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 78 | /* |
| 79 | * Egress Port Root Complex MMIO configuration space |
| 80 | */ |
| 81 | int print_epbar(struct pci_dev *nb) |
| 82 | { |
| 83 | int i, size = (4 * 1024); |
| 84 | volatile uint8_t *epbar; |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 85 | uint64_t epbar_phys; |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 86 | |
| 87 | printf("\n============= EPBAR =============\n\n"); |
| 88 | |
| 89 | switch (nb->device_id) { |
Pat Erley | ca3548e | 2010-04-21 06:23:19 +0000 | [diff] [blame] | 90 | case PCI_DEVICE_ID_INTEL_82915: |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 91 | case PCI_DEVICE_ID_INTEL_82945GM: |
Björn Busse | 2d33dc4 | 2010-08-01 15:33:30 +0000 | [diff] [blame] | 92 | case PCI_DEVICE_ID_INTEL_82945GSE: |
Stefan Reinauer | 3d9a12f | 2008-11-02 11:11:40 +0000 | [diff] [blame] | 93 | case PCI_DEVICE_ID_INTEL_82945P: |
Stefan Tauner | 1a00cf0 | 2012-10-13 06:23:52 +0200 | [diff] [blame^] | 94 | case PCI_DEVICE_ID_INTEL_82946: |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 95 | case PCI_DEVICE_ID_INTEL_82975X: |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 96 | epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe; |
| 97 | break; |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 98 | case PCI_DEVICE_ID_INTEL_82965PM: |
| 99 | case PCI_DEVICE_ID_INTEL_82Q965: |
| 100 | case PCI_DEVICE_ID_INTEL_82Q35: |
| 101 | case PCI_DEVICE_ID_INTEL_82G33: |
| 102 | case PCI_DEVICE_ID_INTEL_82Q33: |
| 103 | case PCI_DEVICE_ID_INTEL_82X38: |
Ruud Schramp | bb41f50 | 2011-04-04 07:53:19 +0200 | [diff] [blame] | 104 | case PCI_DEVICE_ID_INTEL_32X0: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 105 | case PCI_DEVICE_ID_INTEL_82X4X: |
Corey Osgood | 23d98c7 | 2010-07-29 19:25:31 +0000 | [diff] [blame] | 106 | case PCI_DEVICE_ID_INTEL_ATOM_DXXX: |
| 107 | case PCI_DEVICE_ID_INTEL_ATOM_NXXX: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 108 | epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe; |
| 109 | epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32; |
| 110 | break; |
Stefan Reinauer | b2aedb1 | 2009-08-29 15:45:43 +0000 | [diff] [blame] | 111 | case PCI_DEVICE_ID_INTEL_82810: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 112 | case PCI_DEVICE_ID_INTEL_82810_DC: |
| 113 | case PCI_DEVICE_ID_INTEL_82810E_DC: |
Stefan Reinauer | 0484481 | 2010-02-22 11:26:06 +0000 | [diff] [blame] | 114 | case PCI_DEVICE_ID_INTEL_82830M: |
Idwer Vollering | 312fc96 | 2010-12-17 22:34:58 +0000 | [diff] [blame] | 115 | case PCI_DEVICE_ID_INTEL_82865: |
| 116 | printf("This northbridge does not have EPBAR.\n"); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 117 | return 1; |
| 118 | default: |
| 119 | printf("Error: Dumping EPBAR on this northbridge is not (yet) supported.\n"); |
| 120 | return 1; |
| 121 | } |
| 122 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 123 | epbar = map_physical(epbar_phys, size); |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 124 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 125 | if (epbar == NULL) { |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 126 | perror("Error mapping EPBAR"); |
| 127 | exit(1); |
| 128 | } |
| 129 | |
Stefan Reinauer | a7b296d | 2011-11-14 12:40:34 -0800 | [diff] [blame] | 130 | printf("EPBAR = 0x%08" PRIx64 " (MEM)\n\n", epbar_phys); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 131 | for (i = 0; i < size; i += 4) { |
| 132 | if (*(uint32_t *)(epbar + i)) |
| 133 | printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(epbar+i)); |
| 134 | } |
| 135 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 136 | unmap_physical((void *)epbar, size); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | /* |
| 141 | * MCH-ICH Serial Interconnect Ingress Root Complex MMIO configuration space |
| 142 | */ |
| 143 | int print_dmibar(struct pci_dev *nb) |
| 144 | { |
| 145 | int i, size = (4 * 1024); |
| 146 | volatile uint8_t *dmibar; |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 147 | uint64_t dmibar_phys; |
Anton Kochkov | c7fc442 | 2012-07-21 06:36:47 +0400 | [diff] [blame] | 148 | const io_register_t *dmi_registers = NULL; |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 149 | |
| 150 | printf("\n============= DMIBAR ============\n\n"); |
| 151 | |
| 152 | switch (nb->device_id) { |
Pat Erley | ca3548e | 2010-04-21 06:23:19 +0000 | [diff] [blame] | 153 | case PCI_DEVICE_ID_INTEL_82915: |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 154 | case PCI_DEVICE_ID_INTEL_82945GM: |
Björn Busse | 2d33dc4 | 2010-08-01 15:33:30 +0000 | [diff] [blame] | 155 | case PCI_DEVICE_ID_INTEL_82945GSE: |
Stefan Reinauer | 3d9a12f | 2008-11-02 11:11:40 +0000 | [diff] [blame] | 156 | case PCI_DEVICE_ID_INTEL_82945P: |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 157 | case PCI_DEVICE_ID_INTEL_82975X: |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 158 | dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe; |
| 159 | break; |
Stefan Tauner | 1a00cf0 | 2012-10-13 06:23:52 +0200 | [diff] [blame^] | 160 | case PCI_DEVICE_ID_INTEL_82946: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 161 | case PCI_DEVICE_ID_INTEL_82965PM: |
| 162 | case PCI_DEVICE_ID_INTEL_82Q965: |
Warren Turkal | 5329195 | 2010-09-03 09:32:17 +0000 | [diff] [blame] | 163 | case PCI_DEVICE_ID_INTEL_82Q35: |
| 164 | case PCI_DEVICE_ID_INTEL_82G33: |
| 165 | case PCI_DEVICE_ID_INTEL_82Q33: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 166 | case PCI_DEVICE_ID_INTEL_82X38: |
Ruud Schramp | bb41f50 | 2011-04-04 07:53:19 +0200 | [diff] [blame] | 167 | case PCI_DEVICE_ID_INTEL_32X0: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 168 | case PCI_DEVICE_ID_INTEL_82X4X: |
Corey Osgood | 23d98c7 | 2010-07-29 19:25:31 +0000 | [diff] [blame] | 169 | case PCI_DEVICE_ID_INTEL_ATOM_DXXX: |
| 170 | case PCI_DEVICE_ID_INTEL_ATOM_NXXX: |
Warren Turkal | 5329195 | 2010-09-03 09:32:17 +0000 | [diff] [blame] | 171 | dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe; |
| 172 | dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32; |
| 173 | break; |
Stefan Reinauer | b2aedb1 | 2009-08-29 15:45:43 +0000 | [diff] [blame] | 174 | case PCI_DEVICE_ID_INTEL_82810: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 175 | case PCI_DEVICE_ID_INTEL_82810_DC: |
| 176 | case PCI_DEVICE_ID_INTEL_82810E_DC: |
Idwer Vollering | 312fc96 | 2010-12-17 22:34:58 +0000 | [diff] [blame] | 177 | case PCI_DEVICE_ID_INTEL_82865: |
| 178 | printf("This northbridge does not have DMIBAR.\n"); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 179 | return 1; |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 180 | case PCI_DEVICE_ID_INTEL_82X58: |
Warren Turkal | 3235eea | 2010-09-03 09:31:13 +0000 | [diff] [blame] | 181 | dmibar_phys = pci_read_long(nb, 0x50) & 0xfffff000; |
| 182 | break; |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 183 | case PCI_DEVICE_ID_INTEL_CORE_1ST_GEN: |
| 184 | dmibar_phys = pci_read_long(nb, 0x68); |
| 185 | dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32; |
| 186 | dmibar_phys &= 0x0000000ffffff000UL; /* 35:12 */ |
| 187 | dmi_registers = NULL; /* No public documentation */ |
| 188 | break; |
| 189 | case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN: |
Anton Kochkov | c7fc442 | 2012-07-21 06:36:47 +0400 | [diff] [blame] | 190 | dmi_registers = sandybridge_dmi_registers; |
| 191 | size = ARRAY_SIZE(sandybridge_dmi_registers); |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 192 | case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN: /* pretty printing not implemented yet */ |
| 193 | dmibar_phys = pci_read_long(nb, 0x68); |
| 194 | dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32; |
| 195 | dmibar_phys &= 0x0000007ffffff000UL; /* 38:12 */ |
Anton Kochkov | c7fc442 | 2012-07-21 06:36:47 +0400 | [diff] [blame] | 196 | break; |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 197 | default: |
| 198 | printf("Error: Dumping DMIBAR on this northbridge is not (yet) supported.\n"); |
| 199 | return 1; |
| 200 | } |
| 201 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 202 | dmibar = map_physical(dmibar_phys, size); |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 203 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 204 | if (dmibar == NULL) { |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 205 | perror("Error mapping DMIBAR"); |
| 206 | exit(1); |
| 207 | } |
| 208 | |
Stefan Reinauer | a7b296d | 2011-11-14 12:40:34 -0800 | [diff] [blame] | 209 | printf("DMIBAR = 0x%08" PRIx64 " (MEM)\n\n", dmibar_phys); |
Anton Kochkov | c7fc442 | 2012-07-21 06:36:47 +0400 | [diff] [blame] | 210 | if (dmi_registers != NULL) { |
| 211 | for (i = 0; i < size; i++) { |
| 212 | switch (dmi_registers[i].size) { |
| 213 | case 4: |
| 214 | printf("dmibase+0x%04x: 0x%08x (%s)\n", |
| 215 | dmi_registers[i].addr, |
| 216 | *(uint32_t *)(dmibar+dmi_registers[i].addr), |
| 217 | dmi_registers[i].name); |
| 218 | break; |
| 219 | case 2: |
| 220 | printf("dmibase+0x%04x: 0x%04x (%s)\n", |
| 221 | dmi_registers[i].addr, |
| 222 | *(uint16_t *)(dmibar+dmi_registers[i].addr), |
| 223 | dmi_registers[i].name); |
| 224 | break; |
| 225 | case 1: |
| 226 | printf("dmibase+0x%04x: 0x%02x (%s)\n", |
| 227 | dmi_registers[i].addr, |
| 228 | *(uint8_t *)(dmibar+dmi_registers[i].addr), |
| 229 | dmi_registers[i].name); |
| 230 | break; |
| 231 | } |
| 232 | } |
| 233 | } else { |
| 234 | for (i = 0; i < size; i += 4) { |
| 235 | if (*(uint32_t *)(dmibar + i)) |
| 236 | printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(dmibar+i)); |
| 237 | } |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 238 | } |
| 239 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 240 | unmap_physical((void *)dmibar, size); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 241 | return 0; |
| 242 | } |
| 243 | |
| 244 | /* |
| 245 | * PCIe MMIO configuration space |
| 246 | */ |
| 247 | int print_pciexbar(struct pci_dev *nb) |
| 248 | { |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 249 | uint64_t pciexbar_reg; |
| 250 | uint64_t pciexbar_phys; |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 251 | volatile uint8_t *pciexbar; |
| 252 | int max_busses, devbase, i; |
| 253 | int bus, dev, fn; |
| 254 | |
| 255 | printf("========= PCIEXBAR ========\n\n"); |
| 256 | |
| 257 | switch (nb->device_id) { |
Pat Erley | ca3548e | 2010-04-21 06:23:19 +0000 | [diff] [blame] | 258 | case PCI_DEVICE_ID_INTEL_82915: |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 259 | case PCI_DEVICE_ID_INTEL_82945GM: |
Björn Busse | 2d33dc4 | 2010-08-01 15:33:30 +0000 | [diff] [blame] | 260 | case PCI_DEVICE_ID_INTEL_82945GSE: |
Stefan Reinauer | 3d9a12f | 2008-11-02 11:11:40 +0000 | [diff] [blame] | 261 | case PCI_DEVICE_ID_INTEL_82945P: |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 262 | case PCI_DEVICE_ID_INTEL_82975X: |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 263 | pciexbar_reg = pci_read_long(nb, 0x48); |
| 264 | break; |
Stefan Tauner | 1a00cf0 | 2012-10-13 06:23:52 +0200 | [diff] [blame^] | 265 | case PCI_DEVICE_ID_INTEL_82946: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 266 | case PCI_DEVICE_ID_INTEL_82965PM: |
| 267 | case PCI_DEVICE_ID_INTEL_82Q965: |
| 268 | case PCI_DEVICE_ID_INTEL_82Q35: |
| 269 | case PCI_DEVICE_ID_INTEL_82G33: |
| 270 | case PCI_DEVICE_ID_INTEL_82Q33: |
| 271 | case PCI_DEVICE_ID_INTEL_82X38: |
Ruud Schramp | bb41f50 | 2011-04-04 07:53:19 +0200 | [diff] [blame] | 272 | case PCI_DEVICE_ID_INTEL_32X0: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 273 | case PCI_DEVICE_ID_INTEL_82X4X: |
Corey Osgood | 23d98c7 | 2010-07-29 19:25:31 +0000 | [diff] [blame] | 274 | case PCI_DEVICE_ID_INTEL_ATOM_DXXX: |
| 275 | case PCI_DEVICE_ID_INTEL_ATOM_NXXX: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 276 | pciexbar_reg = pci_read_long(nb, 0x60); |
| 277 | pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32; |
| 278 | break; |
Stefan Reinauer | b2aedb1 | 2009-08-29 15:45:43 +0000 | [diff] [blame] | 279 | case PCI_DEVICE_ID_INTEL_82810: |
Stefan Tauner | 04c0600 | 2012-10-13 02:19:30 +0200 | [diff] [blame] | 280 | case PCI_DEVICE_ID_INTEL_82810_DC: |
| 281 | case PCI_DEVICE_ID_INTEL_82810E_DC: |
Idwer Vollering | 312fc96 | 2010-12-17 22:34:58 +0000 | [diff] [blame] | 282 | case PCI_DEVICE_ID_INTEL_82865: |
| 283 | printf("Error: This northbridge does not have PCIEXBAR.\n"); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 284 | return 1; |
| 285 | default: |
| 286 | printf("Error: Dumping PCIEXBAR on this northbridge is not (yet) supported.\n"); |
| 287 | return 1; |
| 288 | } |
| 289 | |
| 290 | if (!(pciexbar_reg & (1 << 0))) { |
| 291 | printf("PCIEXBAR register is disabled.\n"); |
| 292 | return 0; |
| 293 | } |
| 294 | |
| 295 | switch ((pciexbar_reg >> 1) & 3) { |
| 296 | case 0: // 256MB |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 297 | pciexbar_phys = pciexbar_reg & (0xff << 28); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 298 | max_busses = 256; |
| 299 | break; |
| 300 | case 1: // 128M |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 301 | pciexbar_phys = pciexbar_reg & (0x1ff << 27); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 302 | max_busses = 128; |
| 303 | break; |
| 304 | case 2: // 64M |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 305 | pciexbar_phys = pciexbar_reg & (0x3ff << 26); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 306 | max_busses = 64; |
| 307 | break; |
| 308 | default: // RSVD |
| 309 | printf("Undefined address base. Bailing out.\n"); |
| 310 | return 1; |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 311 | } |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 312 | |
Stefan Reinauer | a7b296d | 2011-11-14 12:40:34 -0800 | [diff] [blame] | 313 | printf("PCIEXBAR: 0x%08" PRIx64 "\n", pciexbar_phys); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 314 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 315 | pciexbar = map_physical(pciexbar_phys, (max_busses * 1024 * 1024)); |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 316 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 317 | if (pciexbar == NULL) { |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 318 | perror("Error mapping PCIEXBAR"); |
| 319 | exit(1); |
| 320 | } |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 321 | |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 322 | for (bus = 0; bus < max_busses; bus++) { |
| 323 | for (dev = 0; dev < 32; dev++) { |
| 324 | for (fn = 0; fn < 8; fn++) { |
| 325 | devbase = (bus * 1024 * 1024) + (dev * 32 * 1024) + (fn * 4 * 1024); |
| 326 | |
| 327 | if (*(uint16_t *)(pciexbar + devbase) == 0xffff) |
| 328 | continue; |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 329 | |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 330 | /* This is a heuristics. Anyone got a better check? */ |
| 331 | if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) && |
| 332 | (*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) { |
| 333 | #if DEBUG |
| 334 | printf("Skipped non-PCIe device %02x:%02x.%01x\n", bus, dev, fn); |
| 335 | #endif |
| 336 | continue; |
| 337 | } |
| 338 | |
| 339 | printf("\nPCIe %02x:%02x.%01x extended config space:", bus, dev, fn); |
| 340 | for (i = 0; i < 4096; i++) { |
| 341 | if((i % 0x10) == 0) |
| 342 | printf("\n%04x:", i); |
| 343 | printf(" %02x", *(pciexbar+devbase+i)); |
| 344 | } |
| 345 | printf("\n"); |
| 346 | } |
| 347 | } |
| 348 | } |
| 349 | |
Stefan Reinauer | 1162f25 | 2008-12-04 15:18:20 +0000 | [diff] [blame] | 350 | unmap_physical((void *)pciexbar, (max_busses * 1024 * 1024)); |
Stefan Reinauer | 2319027 | 2008-08-20 13:41:24 +0000 | [diff] [blame] | 351 | |
| 352 | return 0; |
| 353 | } |