Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 13 | * Copyright (C) 2005-2009 coresystems GmbH |
| 14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 18 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 19 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 20 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 21 | * David Mosberger-Tang |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 22 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 23 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 24 | */ |
| 25 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 26 | #include <kconfig.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 27 | #include <console/console.h> |
| 28 | #include <stdlib.h> |
| 29 | #include <stdint.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 30 | #include <string.h> |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 31 | #include <arch/io.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 32 | #include <device/device.h> |
| 33 | #include <device/pci.h> |
| 34 | #include <device/pci_ids.h> |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 35 | #include <bootmode.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 36 | #include <delay.h> |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 37 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 38 | #include <device/hypertransport.h> |
| 39 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 40 | #if CONFIG_PCIX_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 41 | #include <device/pcix.h> |
| 42 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 43 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 44 | #include <device/pciexp.h> |
| 45 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 46 | #if CONFIG_AGP_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 47 | #include <device/agp.h> |
| 48 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 49 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 50 | #include <device/cardbus.h> |
| 51 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 52 | #if CONFIG_PC80_SYSTEM |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 53 | #include <pc80/i8259.h> |
| 54 | #endif |
Stefan Reinauer | 0a50084 | 2011-09-23 10:33:58 -0700 | [diff] [blame] | 55 | #if CONFIG_HAVE_ACPI_RESUME && !CONFIG_S3_VGA_ROM_RUN |
| 56 | #include <arch/acpi.h> |
| 57 | #endif |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 58 | #if CONFIG_CHROMEOS |
| 59 | #include <vendorcode/google/chromeos/chromeos.h> |
| 60 | #endif |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 61 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 62 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 63 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 64 | u8 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 65 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 66 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 67 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 68 | pci_write_config8(dev, reg, 0xff); |
| 69 | ones = pci_read_config8(dev, reg); |
| 70 | |
| 71 | pci_write_config8(dev, reg, 0x00); |
| 72 | zeroes = pci_read_config8(dev, reg); |
| 73 | |
| 74 | pci_write_config8(dev, reg, value); |
| 75 | |
| 76 | return ones ^ zeroes; |
| 77 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 78 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 79 | u16 pci_moving_config16(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 80 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 81 | u16 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 82 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 83 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 84 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 85 | pci_write_config16(dev, reg, 0xffff); |
| 86 | ones = pci_read_config16(dev, reg); |
| 87 | |
| 88 | pci_write_config16(dev, reg, 0x0000); |
| 89 | zeroes = pci_read_config16(dev, reg); |
| 90 | |
| 91 | pci_write_config16(dev, reg, value); |
| 92 | |
| 93 | return ones ^ zeroes; |
| 94 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 95 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 96 | u32 pci_moving_config32(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 97 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 98 | u32 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 99 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 100 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 101 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 102 | pci_write_config32(dev, reg, 0xffffffff); |
| 103 | ones = pci_read_config32(dev, reg); |
| 104 | |
| 105 | pci_write_config32(dev, reg, 0x00000000); |
| 106 | zeroes = pci_read_config32(dev, reg); |
| 107 | |
| 108 | pci_write_config32(dev, reg, value); |
| 109 | |
| 110 | return ones ^ zeroes; |
| 111 | } |
| 112 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 113 | /** |
| 114 | * Given a device, a capability type, and a last position, return the next |
| 115 | * matching capability. Always start at the head of the list. |
| 116 | * |
| 117 | * @param dev Pointer to the device structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 118 | * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 119 | * @param last Location of the PCI capability register to start from. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 120 | * @return The next matching capability. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 121 | */ |
| 122 | unsigned pci_find_next_capability(struct device *dev, unsigned cap, |
| 123 | unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 124 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 125 | unsigned pos = 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 126 | u16 status; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 127 | unsigned reps = 48; |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 128 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 129 | status = pci_read_config16(dev, PCI_STATUS); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 130 | if (!(status & PCI_STATUS_CAP_LIST)) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 131 | return 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 132 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 133 | switch (dev->hdr_type & 0x7f) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 134 | case PCI_HEADER_TYPE_NORMAL: |
| 135 | case PCI_HEADER_TYPE_BRIDGE: |
| 136 | pos = PCI_CAPABILITY_LIST; |
| 137 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 138 | case PCI_HEADER_TYPE_CARDBUS: |
| 139 | pos = PCI_CB_CAPABILITY_LIST; |
| 140 | break; |
| 141 | default: |
| 142 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 143 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 144 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 145 | pos = pci_read_config8(dev, pos); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 146 | while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 147 | int this_cap; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 148 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 149 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 150 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 151 | printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", |
| 152 | this_cap, pos); |
| 153 | if (this_cap == 0xff) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 154 | break; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 155 | |
| 156 | if (!last && (this_cap == cap)) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 157 | return pos; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 158 | |
| 159 | if (last == pos) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 160 | last = 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 161 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 162 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 163 | } |
| 164 | return 0; |
| 165 | } |
| 166 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 167 | /** |
| 168 | * Given a device, and a capability type, return the next matching |
| 169 | * capability. Always start at the head of the list. |
| 170 | * |
| 171 | * @param dev Pointer to the device structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 172 | * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 173 | * @return The next matching capability. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 174 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 175 | unsigned pci_find_capability(device_t dev, unsigned cap) |
| 176 | { |
| 177 | return pci_find_next_capability(dev, cap, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 178 | } |
| 179 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 180 | /** |
| 181 | * Given a device and register, read the size of the BAR for that register. |
| 182 | * |
| 183 | * @param dev Pointer to the device structure. |
| 184 | * @param index Address of the PCI configuration register. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 185 | * @return TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 186 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 187 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 188 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 189 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 190 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 191 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 192 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 193 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 194 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 195 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 196 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 197 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 198 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 199 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 200 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 201 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 202 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 203 | attr = value & ~moving; |
| 204 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 205 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 206 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 207 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 208 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 209 | /* Find the high bits that move. */ |
| 210 | moving |= |
| 211 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 212 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 213 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 214 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 215 | * Start by finding the bits that move. From there: |
| 216 | * - Size is the least significant bit of the bits that move. |
| 217 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 218 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 219 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 220 | limit = 0; |
| 221 | if (moving) { |
| 222 | resource->size = 1; |
| 223 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 224 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 225 | resource->size <<= 1; |
| 226 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 227 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 228 | } |
| 229 | resource->limit = limit = moving | (resource->size - 1); |
| 230 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 231 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 232 | /* |
| 233 | * Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 234 | * really size correctly. |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 235 | * |
| 236 | * Example: the Acer M7229 has BARs 1-4 normally read-only, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 237 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 238 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- which |
| 239 | * is a violation of the spec. |
| 240 | * |
| 241 | * We catch this case and ignore it by observing which bits move. |
| 242 | * |
| 243 | * This also catches the common case of unimplemented registers |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 244 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 245 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 246 | if (moving == 0) { |
| 247 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 248 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 249 | "read-only ignoring it\n", |
| 250 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 251 | } |
| 252 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 253 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 254 | /* An I/O mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 255 | attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 256 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 257 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 258 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 259 | } else { |
| 260 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 261 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 262 | resource->flags |= IORESOURCE_MEM; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 263 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 264 | resource->flags |= IORESOURCE_PREFETCH; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 265 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 266 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 267 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 268 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 269 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 270 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 271 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 272 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 273 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 274 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 275 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 276 | } else { |
| 277 | /* Invalid value. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 278 | printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); |
| 279 | printk(BIOS_ERR, " on dev %s at index %02lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 280 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 281 | resource->flags = 0; |
| 282 | } |
| 283 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 284 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 285 | /* Don't let the limit exceed which bits can move. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 286 | if (resource->limit > limit) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 287 | resource->limit = limit; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 288 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 289 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 290 | } |
| 291 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 292 | /** |
| 293 | * Given a device and an index, read the size of the BAR for that register. |
| 294 | * |
| 295 | * @param dev Pointer to the device structure. |
| 296 | * @param index Address of the PCI configuration register. |
| 297 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 298 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 299 | { |
| 300 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 301 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 302 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 303 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 304 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 305 | resource = new_resource(dev, index); |
| 306 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 307 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 308 | value = pci_read_config32(dev, index); |
| 309 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 310 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 311 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 312 | |
| 313 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 314 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 315 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 316 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 317 | * Start by finding the bits that move. From there: |
| 318 | * - Size is the least significant bit of the bits that move. |
| 319 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 320 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 321 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 322 | if (moving) { |
| 323 | resource->size = 1; |
| 324 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 325 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 326 | resource->size <<= 1; |
| 327 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 328 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 329 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 330 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 331 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 332 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 333 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 334 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 335 | "read-only ignoring it\n", |
| 336 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 337 | } |
| 338 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 339 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 340 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 341 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 342 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 343 | /** |
| 344 | * Read the base address registers for a given device. |
| 345 | * |
| 346 | * @param dev Pointer to the dev structure. |
| 347 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 348 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 349 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 350 | { |
| 351 | unsigned long index; |
| 352 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 353 | for (index = PCI_BASE_ADDRESS_0; |
| 354 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 355 | struct resource *resource; |
| 356 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 357 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 358 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 359 | |
| 360 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 361 | } |
| 362 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 363 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
| 364 | unsigned index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 365 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 366 | struct resource *resource; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 367 | unsigned long gran; |
| 368 | resource_t step; |
| 369 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 370 | resource = NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 371 | |
| 372 | if (!moving) |
| 373 | return; |
| 374 | |
| 375 | /* Initialize the constraints on the current bus. */ |
| 376 | resource = new_resource(dev, index); |
| 377 | resource->size = 0; |
| 378 | gran = 0; |
| 379 | step = 1; |
| 380 | while ((moving & step) == 0) { |
| 381 | gran += 1; |
| 382 | step <<= 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 383 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 384 | resource->gran = gran; |
| 385 | resource->align = gran; |
| 386 | resource->limit = moving | (step - 1); |
| 387 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 388 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 389 | } |
| 390 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 391 | static void pci_bridge_read_bases(struct device *dev) |
| 392 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 393 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 394 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 395 | /* See if the bridge I/O resources are implemented. */ |
| 396 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 397 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 398 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 399 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 400 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 401 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 402 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 403 | |
| 404 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 405 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 406 | /* Initialize the I/O space constraints on the current bus. */ |
| 407 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 408 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 409 | /* See if the bridge prefmem resources are implemented. */ |
| 410 | moving_base = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 411 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 412 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 413 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 414 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 415 | moving_limit = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 416 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 417 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 418 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 419 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 420 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 421 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 422 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 423 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 424 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 425 | /* See if the bridge mem resources are implemented. */ |
| 426 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 427 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 428 | |
| 429 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 430 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 431 | /* Initialize the memory resources on the current bus. */ |
| 432 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 433 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 434 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 435 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 436 | } |
| 437 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 438 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 439 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 440 | pci_read_bases(dev, 6); |
| 441 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 442 | } |
| 443 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 444 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 445 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 446 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 447 | pci_read_bases(dev, 2); |
| 448 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 449 | } |
| 450 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 451 | void pci_domain_read_resources(struct device *dev) |
| 452 | { |
| 453 | struct resource *res; |
| 454 | |
| 455 | /* Initialize the system-wide I/O space constraints. */ |
| 456 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 457 | res->limit = 0xffffUL; |
| 458 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 459 | IORESOURCE_ASSIGNED; |
| 460 | |
| 461 | /* Initialize the system-wide memory resources constraints. */ |
| 462 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 463 | res->limit = 0xffffffffULL; |
| 464 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 465 | IORESOURCE_ASSIGNED; |
| 466 | } |
| 467 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 468 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 469 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 470 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 471 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 472 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 473 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 474 | printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " |
| 475 | "assigned\n", dev_path(dev), resource->index, |
| 476 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 477 | return; |
| 478 | } |
| 479 | |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 480 | /* If this resource is fixed don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 481 | if (resource->flags & IORESOURCE_FIXED) |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 482 | return; |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 483 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 484 | /* If I have already stored this resource don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 485 | if (resource->flags & IORESOURCE_STORED) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 486 | return; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 487 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 488 | /* If the resource is subtractive don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 489 | if (resource->flags & IORESOURCE_SUBTRACTIVE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 490 | return; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 491 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 492 | /* Only handle PCI memory and I/O resources for now. */ |
| 493 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 494 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 495 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 496 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 497 | if (resource->size) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 498 | if (resource->flags & IORESOURCE_MEM) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 499 | dev->command |= PCI_COMMAND_MEMORY; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 500 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 501 | dev->command |= PCI_COMMAND_IO; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 502 | if (resource->flags & IORESOURCE_PCI_BRIDGE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 503 | dev->command |= PCI_COMMAND_MASTER; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 504 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 505 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 506 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 507 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 508 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 509 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 510 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 511 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 512 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 513 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 514 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 515 | /* |
| 516 | * PCI bridges have no enable bit. They are disabled if the base of |
| 517 | * the range is greater than the limit. If the size is zero, disable |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 518 | * by setting the base = limit and end = limit - 2^gran. |
| 519 | */ |
| 520 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 521 | base = resource->limit; |
| 522 | end = resource->limit - (1 << resource->gran); |
| 523 | resource->base = base; |
| 524 | } |
| 525 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 526 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 527 | unsigned long base_lo, base_hi; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 528 | |
| 529 | /* |
| 530 | * Some chipsets allow us to set/clear the I/O bit |
| 531 | * (e.g. VIA 82C686A). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 532 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 533 | base_lo = base & 0xffffffff; |
| 534 | base_hi = (base >> 32) & 0xffffffff; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 535 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 536 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 537 | pci_write_config32(dev, resource->index, base_lo); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 538 | if (resource->flags & IORESOURCE_PCI64) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 539 | pci_write_config32(dev, resource->index + 4, base_hi); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 540 | } else if (resource->index == PCI_IO_BASE) { |
| 541 | /* Set the I/O ranges. */ |
| 542 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 543 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 544 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 545 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 546 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 547 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 548 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 549 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 550 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 551 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 552 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 553 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 554 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 555 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 556 | } else { |
| 557 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 558 | resource->flags &= ~IORESOURCE_STORED; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 559 | printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 560 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 561 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 562 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 563 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 564 | } |
| 565 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 566 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 567 | { |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 568 | struct resource *res; |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 569 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 570 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 571 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 572 | for (res = dev->resource_list; res; res = res->next) |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 573 | pci_set_resource(dev, res); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 574 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 575 | for (bus = dev->link_list; bus; bus = bus->next) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 576 | if (bus->children) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 577 | assign_resources(bus); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 578 | } |
| 579 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 580 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 581 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 582 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 583 | /* Set a default secondary latency timer. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 584 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 585 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 586 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 587 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 588 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 589 | if (line) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 590 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 591 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 592 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 593 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 594 | } |
| 595 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 596 | void pci_dev_enable_resources(struct device *dev) |
| 597 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 598 | const struct pci_operations *ops; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 599 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 600 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 601 | /* Set the subsystem vendor and device ID for mainboard devices. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 602 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 603 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 604 | if (CONFIG_SUBSYSTEM_VENDOR_ID) |
| 605 | dev->subsystem_vendor = CONFIG_SUBSYSTEM_VENDOR_ID; |
| 606 | if (CONFIG_SUBSYSTEM_DEVICE_ID) |
| 607 | dev->subsystem_device = CONFIG_SUBSYSTEM_DEVICE_ID; |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 608 | printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n", |
| 609 | dev_path(dev), dev->subsystem_vendor, |
| 610 | dev->subsystem_device); |
| 611 | ops->set_subsystem(dev, dev->subsystem_vendor, |
| 612 | dev->subsystem_device); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 613 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 614 | command = pci_read_config16(dev, PCI_COMMAND); |
| 615 | command |= dev->command; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 616 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 617 | /* v3 has |
| 618 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 619 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 620 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 621 | printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 622 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 623 | } |
| 624 | |
| 625 | void pci_bus_enable_resources(struct device *dev) |
| 626 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 627 | u16 ctrl; |
| 628 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 629 | /* |
| 630 | * Enable I/O in command register if there is VGA card |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 631 | * connected with (even it does not claim I/O resource). |
| 632 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 633 | if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 634 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 635 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 636 | ctrl |= dev->link_list->bridge_ctrl; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 637 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 638 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 639 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 640 | |
| 641 | pci_dev_enable_resources(dev); |
| 642 | } |
| 643 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 644 | void pci_bus_reset(struct bus *bus) |
| 645 | { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 646 | u16 ctl; |
| 647 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 648 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 649 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 650 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 651 | mdelay(10); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 652 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 653 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 654 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 655 | delay(1); |
| 656 | } |
| 657 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 658 | void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 659 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 660 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 661 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 662 | } |
| 663 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 664 | #if CONFIG_VGA_ROM_RUN |
| 665 | static int should_run_oprom(struct device *dev) |
| 666 | { |
| 667 | static int should_run = -1; |
| 668 | |
| 669 | if (should_run >= 0) |
| 670 | return should_run; |
| 671 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 672 | /* Don't run VGA option ROMs, unless we have to print |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 673 | * something on the screen before the kernel is loaded. |
| 674 | */ |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 675 | should_run = !IS_ENABLED(CONFIG_BOOTMODE_STRAPS) || |
| 676 | developer_mode_enabled() || recovery_mode_enabled(); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 677 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 678 | #if CONFIG_CHROMEOS |
| 679 | if (!should_run) |
| 680 | should_run = vboot_wants_oprom(); |
| 681 | #endif |
| 682 | if (!should_run) |
| 683 | printk(BIOS_DEBUG, "Not running VGA Option ROM\n"); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 684 | return should_run; |
| 685 | } |
| 686 | |
| 687 | static int should_load_oprom(struct device *dev) |
| 688 | { |
| 689 | #if CONFIG_HAVE_ACPI_RESUME && !CONFIG_S3_VGA_ROM_RUN |
| 690 | /* If S3_VGA_ROM_RUN is disabled, skip running VGA option |
| 691 | * ROMs when coming out of an S3 resume. |
| 692 | */ |
| 693 | if ((acpi_slp_type == 3) && |
| 694 | ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) |
| 695 | return 0; |
| 696 | #endif |
| 697 | if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM)) |
| 698 | return 1; |
| 699 | if (should_run_oprom(dev)) |
| 700 | return 1; |
| 701 | |
| 702 | return 0; |
| 703 | } |
| 704 | #endif /* CONFIG_VGA_ROM_RUN */ |
| 705 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 706 | /** Default handler: only runs the relevant PCI BIOS. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 707 | void pci_dev_init(struct device *dev) |
| 708 | { |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 709 | #if CONFIG_VGA_ROM_RUN |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 710 | struct rom_header *rom, *ram; |
| 711 | |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 712 | /* Only execute VGA ROMs. */ |
| 713 | if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 714 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 715 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 716 | if (!should_load_oprom(dev)) |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 717 | return; |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 718 | |
| 719 | rom = pci_rom_probe(dev); |
| 720 | if (rom == NULL) |
| 721 | return; |
| 722 | |
| 723 | ram = pci_rom_load(dev, rom); |
| 724 | if (ram == NULL) |
| 725 | return; |
| 726 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 727 | if (!should_run_oprom(dev)) |
| 728 | return; |
| 729 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 730 | run_bios(dev, (unsigned long)ram); |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 731 | gfx_set_init_done(1); |
| 732 | printk(BIOS_DEBUG, "VGA Option ROM was run\n"); |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 733 | #endif /* CONFIG_VGA_ROM_RUN */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 734 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 735 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 736 | /** Default device operation for PCI devices */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 737 | static struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 738 | .set_subsystem = pci_dev_set_subsystem, |
| 739 | }; |
| 740 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 741 | struct device_operations default_pci_ops_dev = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 742 | .read_resources = pci_dev_read_resources, |
| 743 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 744 | .enable_resources = pci_dev_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 745 | .init = pci_dev_init, |
| 746 | .scan_bus = 0, |
| 747 | .enable = 0, |
| 748 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 749 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 750 | |
| 751 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 752 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 753 | .set_subsystem = 0, |
| 754 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 755 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 756 | struct device_operations default_pci_ops_bus = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 757 | .read_resources = pci_bus_read_resources, |
| 758 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 759 | .enable_resources = pci_bus_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 760 | .init = 0, |
| 761 | .scan_bus = pci_scan_bridge, |
| 762 | .enable = 0, |
| 763 | .reset_bus = pci_bus_reset, |
| 764 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 765 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 766 | |
| 767 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 768 | * Detect the type of downstream bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 769 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 770 | * This function is a heuristic to detect which type of bus is downstream |
| 771 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 772 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 773 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 774 | * |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 775 | * When only a PCI-Express capability is found the type is examined to see |
| 776 | * which type of bridge we have. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 777 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 778 | * @param dev Pointer to the device structure of the bridge. |
| 779 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 780 | */ |
| 781 | static struct device_operations *get_pci_bridge_ops(device_t dev) |
| 782 | { |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 783 | #if CONFIG_PCIX_PLUGIN_SUPPORT |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 784 | unsigned int pcixpos; |
| 785 | pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 786 | if (pcixpos) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 787 | printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 788 | return &default_pcix_ops_bus; |
| 789 | } |
| 790 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 791 | #if CONFIG_AGP_PLUGIN_SUPPORT |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 792 | /* How do I detect a PCI to AGP bridge? */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 793 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 794 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 795 | unsigned int htpos = 0; |
| 796 | while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 797 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 798 | flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 799 | if ((flags >> 13) == 1) { |
| 800 | /* Host or Secondary Interface */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 801 | printk(BIOS_DEBUG, "%s subordinate bus HT\n", |
| 802 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 803 | return &default_ht_ops_bus; |
| 804 | } |
| 805 | } |
| 806 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 807 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 808 | unsigned int pciexpos; |
| 809 | pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 810 | if (pciexpos) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 811 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 812 | flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 813 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 814 | case PCI_EXP_TYPE_ROOT_PORT: |
| 815 | case PCI_EXP_TYPE_UPSTREAM: |
| 816 | case PCI_EXP_TYPE_DOWNSTREAM: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 817 | printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 818 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 819 | return &default_pciexp_ops_bus; |
| 820 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 821 | printk(BIOS_DEBUG, "%s subordinate PCI\n", |
| 822 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 823 | return &default_pci_ops_bus; |
| 824 | default: |
| 825 | break; |
| 826 | } |
| 827 | } |
| 828 | #endif |
| 829 | return &default_pci_ops_bus; |
| 830 | } |
| 831 | |
| 832 | /** |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 833 | * Check if a device id matches a PCI driver entry. |
| 834 | * |
| 835 | * The driver entry can either point at a zero terminated array of acceptable |
| 836 | * device IDs, or include a single device ID. |
| 837 | * |
| 838 | * @driver pointer to the PCI driver entry being checked |
| 839 | * @device_id PCI device ID of the device being matched |
| 840 | */ |
| 841 | static int device_id_match(struct pci_driver *driver, unsigned short device_id) |
| 842 | { |
| 843 | if (driver->devices) { |
| 844 | unsigned short check_id; |
| 845 | const unsigned short *device_list = driver->devices; |
| 846 | while ((check_id = *device_list++) != 0) |
| 847 | if (check_id == device_id) |
| 848 | return 1; |
| 849 | } |
| 850 | |
| 851 | return (driver->device == device_id); |
| 852 | } |
| 853 | |
| 854 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 855 | * Set up PCI device operation. |
| 856 | * |
| 857 | * Check if it already has a driver. If not, use find_device_operations(), |
| 858 | * or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 859 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 860 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 861 | * @see pci_drivers |
| 862 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 863 | static void set_pci_ops(struct device *dev) |
| 864 | { |
| 865 | struct pci_driver *driver; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 866 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 867 | if (dev->ops) |
| 868 | return; |
| 869 | |
| 870 | /* |
| 871 | * Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 872 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 873 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 874 | for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 875 | if ((driver->vendor == dev->vendor) && |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 876 | device_id_match(driver, dev->device)) { |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 877 | dev->ops = (struct device_operations *)driver->ops; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 878 | printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 879 | dev_path(dev), driver->vendor, driver->device, |
| 880 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 881 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 882 | } |
| 883 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 884 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 885 | /* If I don't have a specific driver use the default operations. */ |
| 886 | switch (dev->hdr_type & 0x7f) { /* Header type */ |
| 887 | case PCI_HEADER_TYPE_NORMAL: |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 888 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 889 | goto bad; |
| 890 | dev->ops = &default_pci_ops_dev; |
| 891 | break; |
| 892 | case PCI_HEADER_TYPE_BRIDGE: |
| 893 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 894 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 895 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 896 | break; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 897 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 898 | case PCI_HEADER_TYPE_CARDBUS: |
| 899 | dev->ops = &default_cardbus_ops_bus; |
| 900 | break; |
| 901 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 902 | default: |
| 903 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 904 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 905 | printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown " |
| 906 | "header type %02x, ignoring.\n", dev_path(dev), |
| 907 | dev->vendor, dev->device, |
| 908 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 909 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 910 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 911 | } |
| 912 | |
| 913 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 914 | * See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 915 | * |
| 916 | * Given a linked list of PCI device structures and a devfn number, find the |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 917 | * device structure correspond to the devfn, if present. This function also |
| 918 | * removes the device structure from the linked list. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 919 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 920 | * @param list The device structure list. |
| 921 | * @param devfn A device/function number. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 922 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 923 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 924 | */ |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 925 | static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 926 | { |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 927 | struct device *dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 928 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 929 | dev = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 930 | for (; *list; list = &(*list)->sibling) { |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 931 | if ((*list)->path.type != DEVICE_PATH_PCI) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 932 | printk(BIOS_ERR, "child %s not a PCI device\n", |
| 933 | dev_path(*list)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 934 | continue; |
| 935 | } |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 936 | if ((*list)->path.pci.devfn == devfn) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 937 | /* Unlink from the list. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 938 | dev = *list; |
| 939 | *list = (*list)->sibling; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 940 | dev->sibling = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 941 | break; |
| 942 | } |
| 943 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 944 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 945 | /* |
| 946 | * Just like alloc_dev() add the device to the list of devices on the |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 947 | * bus. When the list of devices was formed we removed all of the |
| 948 | * parents children, and now we are interleaving static and dynamic |
| 949 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 950 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 951 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 952 | struct device *child; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 953 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 954 | /* Find the last child of our parent. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 955 | for (child = dev->bus->children; child && child->sibling;) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 956 | child = child->sibling; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 957 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 958 | /* Place the device on the list of children of its parent. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 959 | if (child) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 960 | child->sibling = dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 961 | else |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 962 | dev->bus->children = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 963 | } |
| 964 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 965 | return dev; |
| 966 | } |
| 967 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 968 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 969 | * Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 970 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 971 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 972 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 973 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 974 | * @param dev Pointer to the dev structure. |
| 975 | * @param bus Pointer to the bus structure. |
| 976 | * @param devfn A device/function number to look at. |
| 977 | * @return The device structure for the device (if found), NULL otherwise. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 978 | */ |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 979 | device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 980 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 981 | u32 id, class; |
| 982 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 983 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 984 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 985 | if (!dev) { |
| 986 | struct device dummy; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 987 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 988 | dummy.bus = bus; |
| 989 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 990 | dummy.path.pci.devfn = devfn; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 991 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 992 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 993 | /* |
| 994 | * Have we found something? Some broken boards return 0 if a |
| 995 | * slot is empty, but the expected answer is 0xffffffff. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 996 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 997 | if (id == 0xffffffff) |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 998 | return NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 999 | |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1000 | if ((id == 0x00000000) || (id == 0x0000ffff) || |
| 1001 | (id == 0xffff0000)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1002 | printk(BIOS_SPEW, "%s, bad id 0x%x\n", |
| 1003 | dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1004 | return NULL; |
| 1005 | } |
| 1006 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1007 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1008 | /* |
| 1009 | * Enable/disable the device. Once we have found the device- |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1010 | * specific operations this operations we will disable the |
| 1011 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1012 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1013 | * This is geared toward devices that have subfunctions |
| 1014 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1015 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1016 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1017 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1018 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1019 | /* Run the magic enable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1020 | if (dev->chip_ops && dev->chip_ops->enable_dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1021 | dev->chip_ops->enable_dev(dev); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1022 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1023 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1024 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1025 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1026 | /* |
| 1027 | * If the device does not have a PCI ID disable it. Possibly |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1028 | * this is because we have already disabled the device. But |
| 1029 | * this also handles optional devices that may not always |
| 1030 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1031 | */ |
| 1032 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1033 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 1034 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1035 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1036 | printk(BIOS_INFO, "PCI: Static device %s not " |
| 1037 | "found, disabling it.\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1038 | dev->enabled = 0; |
| 1039 | } |
| 1040 | return dev; |
| 1041 | } |
| 1042 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1043 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1044 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1045 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 1046 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1047 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1048 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1049 | dev->vendor = id & 0xffff; |
| 1050 | dev->device = (id >> 16) & 0xffff; |
| 1051 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1052 | |
| 1053 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1054 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1055 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1056 | /* Architectural/System devices always need to be bus masters. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1057 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1058 | dev->command |= PCI_COMMAND_MASTER; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1059 | |
| 1060 | /* |
| 1061 | * Look at the vendor and device ID, or at least the header type and |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1062 | * class and figure out which set of configuration methods to use. |
| 1063 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1064 | */ |
| 1065 | set_pci_ops(dev); |
| 1066 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1067 | /* Now run the magic enable/disable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1068 | if (dev->ops && dev->ops->enable) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1069 | dev->ops->enable(dev); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1070 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1071 | /* Display the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1072 | printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", dev_path(dev), |
| 1073 | dev->vendor, dev->device, dev->enabled ? "enabled" : "disabled", |
| 1074 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1075 | |
| 1076 | return dev; |
| 1077 | } |
| 1078 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1079 | /** |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1080 | * Test for match between romstage and ramstage device instance. |
| 1081 | * |
| 1082 | * @param dev Pointer to the device structure. |
| 1083 | * @param sdev Simple device model identifier, created with PCI_DEV(). |
| 1084 | * @return Non-zero if bus:dev.fn of device matches. |
| 1085 | */ |
| 1086 | unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev) |
| 1087 | { |
| 1088 | return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && |
| 1089 | dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); |
| 1090 | } |
| 1091 | |
| 1092 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1093 | * Scan a PCI bus. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1094 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1095 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1096 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1097 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1098 | * This function is the default scan_bus() method for the root device |
| 1099 | * 'dev_root'. |
| 1100 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1101 | * @param bus Pointer to the bus structure. |
| 1102 | * @param min_devfn Minimum devfn to look at in the scan, usually 0x00. |
| 1103 | * @param max_devfn Maximum devfn to look at in the scan, usually 0xff. |
| 1104 | * @param max Current bus number. |
| 1105 | * @return The maximum bus number found, after scanning all subordinate busses. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1106 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1107 | unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, |
| 1108 | unsigned max_devfn, unsigned int max) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1109 | { |
| 1110 | unsigned int devfn; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1111 | struct device *old_devices; |
| 1112 | struct device *child; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1113 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1114 | #if CONFIG_PCI_BUS_SEGN_BITS |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1115 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %04x:%02x\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1116 | bus->secondary >> 8, bus->secondary & 0xff); |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1117 | #else |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1118 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1119 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1120 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1121 | /* Maximum sane devfn is 0xFF. */ |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1122 | if (max_devfn > 0xff) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1123 | printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - " |
| 1124 | "devfn %x\n", min_devfn, max_devfn); |
| 1125 | printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. " |
| 1126 | "Using 0xff.\n"); |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1127 | max_devfn=0xff; |
| 1128 | } |
| 1129 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1130 | old_devices = bus->children; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1131 | bus->children = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1132 | |
| 1133 | post_code(0x24); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1134 | |
| 1135 | /* |
| 1136 | * Probe all devices/functions on this bus with some optimization for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1137 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1138 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1139 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1140 | struct device *dev; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1141 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1142 | /* First thing setup the device structure. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1143 | dev = pci_scan_get_dev(&old_devices, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1144 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1145 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1146 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1147 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1148 | /* |
| 1149 | * If this is not a multi function device, or the device is |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1150 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1151 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1152 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1153 | if ((PCI_FUNC(devfn) == 0x00) && (!dev |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1154 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1155 | devfn += 0x07; |
| 1156 | } |
| 1157 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1158 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1159 | post_code(0x25); |
| 1160 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1161 | /* |
| 1162 | * Warn if any leftover static devices are are found. |
| 1163 | * There's probably a problem in devicetree.cb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1164 | */ |
| 1165 | if (old_devices) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1166 | device_t left; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1167 | printk(BIOS_WARNING, "PCI: Left over static devices:\n"); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1168 | for (left = old_devices; left; left = left->sibling) |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1169 | printk(BIOS_WARNING, "%s\n", dev_path(left)); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1170 | |
| 1171 | printk(BIOS_WARNING, "PCI: Check your devicetree.cb.\n"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1172 | } |
| 1173 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1174 | /* |
| 1175 | * For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1176 | * scan the bus behind that child. |
| 1177 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1178 | for (child = bus->children; child; child = child->sibling) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1179 | max = scan_bus(child, max); |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1180 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1181 | /* |
| 1182 | * We've scanned the bus and so we know all about what's on the other |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1183 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1184 | * Return how far we've got finding sub-buses. |
| 1185 | */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1186 | printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1187 | post_code(0x55); |
| 1188 | return max; |
| 1189 | } |
| 1190 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1191 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1192 | * Scan a PCI bridge and the buses behind the bridge. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1193 | * |
| 1194 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1195 | * according to the result of the scan. |
| 1196 | * |
| 1197 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1198 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1199 | * @param dev Pointer to the bridge device. |
| 1200 | * @param max The highest bus number assigned up to now. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1201 | * @param do_scan_bus TODO |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1202 | * @return The maximum bus number found, after scanning all subordinate buses. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1203 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1204 | unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1205 | unsigned int (*do_scan_bus) (struct bus * bus, |
| 1206 | unsigned min_devfn, |
| 1207 | unsigned max_devfn, |
| 1208 | unsigned int max)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1209 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1210 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1211 | u32 buses; |
| 1212 | u16 cr; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1213 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1214 | printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1215 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 1216 | if (dev->link_list == NULL) { |
| 1217 | struct bus *link; |
| 1218 | link = malloc(sizeof(*link)); |
| 1219 | if (link == NULL) |
| 1220 | die("Couldn't allocate a link!\n"); |
| 1221 | memset(link, 0, sizeof(*link)); |
| 1222 | link->dev = dev; |
| 1223 | dev->link_list = link; |
| 1224 | } |
| 1225 | |
| 1226 | bus = dev->link_list; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1227 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1228 | /* |
| 1229 | * Set up the primary, secondary and subordinate bus numbers. We have |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1230 | * no idea how many buses are behind this bridge yet, so we set the |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1231 | * subordinate bus number to 0xff for the moment. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1232 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1233 | bus->secondary = ++max; |
| 1234 | bus->subordinate = 0xff; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1235 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1236 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1237 | cr = pci_read_config16(dev, PCI_COMMAND); |
| 1238 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1239 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1240 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1241 | /* |
| 1242 | * Read the existing primary/secondary/subordinate bus |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1243 | * number configuration. |
| 1244 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1245 | buses = pci_read_config32(dev, PCI_PRIMARY_BUS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1246 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1247 | /* |
| 1248 | * Configure the bus numbers for this bridge: the configuration |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1249 | * transactions will not be propagated by the bridge if it is not |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1250 | * correctly configured. |
| 1251 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1252 | buses &= 0xff000000; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1253 | buses |= (((unsigned int)(dev->bus->secondary) << 0) | |
| 1254 | ((unsigned int)(bus->secondary) << 8) | |
| 1255 | ((unsigned int)(bus->subordinate) << 16)); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1256 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1257 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1258 | /* Now we can scan all subordinate buses (those behind the bridge). */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1259 | max = do_scan_bus(bus, 0x00, 0xff, max); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1260 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1261 | /* |
| 1262 | * We know the number of buses behind this bridge. Set the subordinate |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1263 | * bus number to its real value. |
| 1264 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1265 | bus->subordinate = max; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1266 | buses = (buses & 0xff00ffff) | ((unsigned int)(bus->subordinate) << 16); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1267 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
| 1268 | pci_write_config16(dev, PCI_COMMAND, cr); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1269 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1270 | printk(BIOS_SPEW, "%s returns max %d\n", __func__, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1271 | return max; |
| 1272 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1273 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1274 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1275 | * Scan a PCI bridge and the buses behind the bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1276 | * |
| 1277 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1278 | * according to the result of the scan. |
| 1279 | * |
| 1280 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1281 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1282 | * @param dev Pointer to the bridge device. |
| 1283 | * @param max The highest bus number assigned up to now. |
| 1284 | * @return The maximum bus number found, after scanning all subordinate buses. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1285 | */ |
| 1286 | unsigned int pci_scan_bridge(struct device *dev, unsigned int max) |
| 1287 | { |
| 1288 | return do_pci_scan_bridge(dev, max, pci_scan_bus); |
| 1289 | } |
| 1290 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1291 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1292 | * Scan a PCI domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1293 | * |
| 1294 | * This function is the default scan_bus() method for PCI domains. |
| 1295 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1296 | * @param dev Pointer to the domain. |
| 1297 | * @param max The highest bus number assigned up to now. |
| 1298 | * @return The maximum bus number found, after scanning all subordinate busses. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1299 | */ |
| 1300 | unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) |
| 1301 | { |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 1302 | max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1303 | return max; |
| 1304 | } |
| 1305 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 1306 | #if CONFIG_PC80_SYSTEM |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1307 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1308 | * Assign IRQ numbers. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1309 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1310 | * This function assigns IRQs for all functions contained within the indicated |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1311 | * device address. If the device does not exist or does not require interrupts |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1312 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1313 | * |
| 1314 | * This function should be called for each PCI slot in your system. |
| 1315 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1316 | * @param bus Pointer to the bus structure. |
| 1317 | * @param slot TODO |
| 1318 | * @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD |
| 1319 | * of this slot. The particular IRQ #s that are passed in depend on the |
| 1320 | * routing inside your southbridge and on your board. |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1321 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1322 | void pci_assign_irqs(unsigned bus, unsigned slot, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1323 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1324 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1325 | unsigned int funct; |
| 1326 | device_t pdev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1327 | u8 line, irq; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1328 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1329 | /* Each slot may contain up to eight functions. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1330 | for (funct = 0; funct < 8; funct++) { |
| 1331 | pdev = dev_find_slot(bus, (slot << 3) + funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1332 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1333 | if (!pdev) |
| 1334 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1335 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1336 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1337 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1338 | /* PCI spec says all values except 1..4 are reserved. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1339 | if ((line < 1) || (line > 4)) |
| 1340 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1341 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1342 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1343 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1344 | printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1345 | irq, bus, slot, funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1346 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 1347 | pci_write_config8(pdev, PCI_INTERRUPT_LINE, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1348 | pIntAtoD[line - 1]); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1349 | |
| 1350 | #ifdef PARANOID_IRQ_ASSIGNMENTS |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 1351 | irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1352 | printk(BIOS_DEBUG, " Readback = %d\n", irq); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1353 | #endif |
| 1354 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 1355 | #if CONFIG_PC80_SYSTEM |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1356 | /* Change to level triggered. */ |
| 1357 | i8259_configure_irq_trigger(pIntAtoD[line - 1], |
| 1358 | IRQ_LEVEL_TRIGGERED); |
Stefan Reinauer | 5fb6216 | 2010-12-16 23:52:04 +0000 | [diff] [blame] | 1359 | #endif |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1360 | } |
| 1361 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1362 | #endif |