Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <device/pci_ids.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 7 | #include <option.h> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 8 | #include <pc80/mc146818rtc.h> |
| 9 | #include <pc80/isa-dma.h> |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 10 | #include <pc80/i8259.h> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 11 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 12 | #include <device/pci_ops.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 13 | #include <arch/ioapic.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 14 | #include <acpi/acpi.h> |
Sven Schnelle | f4dc1a7 | 2011-06-05 11:33:41 +0200 | [diff] [blame] | 15 | #include <cpu/x86/smm.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 16 | #include <acpi/acpigen.h> |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 17 | #include <arch/smp/mpspec.h> |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 18 | #include <southbridge/intel/common/acpi_pirq_gen.h> |
Tim Wawrzynczak | f62c494 | 2021-02-26 10:30:52 -0700 | [diff] [blame] | 19 | #include <southbridge/intel/common/rcba_pirq.h> |
Angel Pons | eef4343 | 2021-01-12 22:25:28 +0100 | [diff] [blame] | 20 | #include <southbridge/intel/common/hpet.h> |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 21 | #include <southbridge/intel/common/pmbase.h> |
Arthur Heymans | b429c5b | 2019-05-28 13:24:15 +0200 | [diff] [blame] | 22 | #include <southbridge/intel/common/spi.h> |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 23 | |
Arthur Heymans | 742df5a | 2019-06-03 16:24:41 +0200 | [diff] [blame] | 24 | #include "chip.h" |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 25 | #include "i82801gx.h" |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 26 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 27 | #define NMI_OFF 0 |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 28 | |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 29 | /** |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 30 | * Set miscellaneous static southbridge features. |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 31 | * |
| 32 | * @param dev PCI device with I/O APIC control registers |
| 33 | */ |
| 34 | static void i82801gx_enable_ioapic(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 35 | { |
Kyösti Mälkki | d165357 | 2021-06-08 11:31:19 +0300 | [diff] [blame] | 36 | register_new_ioapic_gsi0(VIO_APIC_VADDR); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | static void i82801gx_enable_serial_irqs(struct device *dev) |
| 40 | { |
| 41 | /* Set packet length and toggle silent mode bit for one frame. */ |
Elyes HAOUAS | 92646ea | 2020-04-04 13:43:03 +0200 | [diff] [blame] | 42 | pci_write_config8(dev, SERIRQ_CNTL, (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0)); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 43 | } |
| 44 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 45 | /* PIRQ[n]_ROUT[3:0] - PIRQ Routing Control |
| 46 | * 0x00 - 0000 = Reserved |
| 47 | * 0x01 - 0001 = Reserved |
| 48 | * 0x02 - 0010 = Reserved |
| 49 | * 0x03 - 0011 = IRQ3 |
| 50 | * 0x04 - 0100 = IRQ4 |
| 51 | * 0x05 - 0101 = IRQ5 |
| 52 | * 0x06 - 0110 = IRQ6 |
| 53 | * 0x07 - 0111 = IRQ7 |
| 54 | * 0x08 - 1000 = Reserved |
| 55 | * 0x09 - 1001 = IRQ9 |
| 56 | * 0x0A - 1010 = IRQ10 |
| 57 | * 0x0B - 1011 = IRQ11 |
| 58 | * 0x0C - 1100 = IRQ12 |
| 59 | * 0x0D - 1101 = Reserved |
| 60 | * 0x0E - 1110 = IRQ14 |
| 61 | * 0x0F - 1111 = IRQ15 |
| 62 | * PIRQ[n]_ROUT[7] - PIRQ Routing Control |
| 63 | * 0x80 - The PIRQ is not routed. |
| 64 | */ |
| 65 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 66 | static void i82801gx_pirq_init(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 67 | { |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 68 | struct device *irq_dev; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 69 | /* Get the chip configuration */ |
Elyes HAOUAS | 8d9a6f1 | 2020-04-28 04:57:27 +0200 | [diff] [blame] | 70 | const struct southbridge_intel_i82801gx_config *config = dev->chip_info; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 71 | |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 72 | pci_write_config8(dev, PIRQA_ROUT, config->pirqa_routing); |
| 73 | pci_write_config8(dev, PIRQB_ROUT, config->pirqb_routing); |
| 74 | pci_write_config8(dev, PIRQC_ROUT, config->pirqc_routing); |
| 75 | pci_write_config8(dev, PIRQD_ROUT, config->pirqd_routing); |
| 76 | |
| 77 | pci_write_config8(dev, PIRQE_ROUT, config->pirqe_routing); |
| 78 | pci_write_config8(dev, PIRQF_ROUT, config->pirqf_routing); |
| 79 | pci_write_config8(dev, PIRQG_ROUT, config->pirqg_routing); |
| 80 | pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing); |
| 81 | |
| 82 | /* Eric Biederman once said we should let the OS do this. |
| 83 | * I am not so sure anymore he was right. |
| 84 | */ |
| 85 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 86 | for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 87 | u8 int_pin = 0, int_line = 0; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 88 | |
Fabio Aiuto | d835da9 | 2022-09-30 11:25:28 +0200 | [diff] [blame] | 89 | if (!is_enabled_pci(irq_dev)) |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 90 | continue; |
| 91 | |
| 92 | int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); |
| 93 | |
| 94 | switch (int_pin) { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 95 | case 1: |
| 96 | /* INTA# */ int_line = config->pirqa_routing; break; |
| 97 | case 2: |
| 98 | /* INTB# */ int_line = config->pirqb_routing; break; |
| 99 | case 3: |
| 100 | /* INTC# */ int_line = config->pirqc_routing; break; |
| 101 | case 4: |
| 102 | /* INTD# */ int_line = config->pirqd_routing; break; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 103 | } |
| 104 | |
| 105 | if (!int_line) |
| 106 | continue; |
| 107 | |
| 108 | pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); |
| 109 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 110 | } |
| 111 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 112 | static void i82801gx_gpi_routing(struct device *dev) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 113 | { |
| 114 | /* Get the chip configuration */ |
Elyes HAOUAS | 8d9a6f1 | 2020-04-28 04:57:27 +0200 | [diff] [blame] | 115 | const struct southbridge_intel_i82801gx_config *config = dev->chip_info; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 116 | u32 reg32 = 0; |
| 117 | |
Elyes HAOUAS | 92646ea | 2020-04-04 13:43:03 +0200 | [diff] [blame] | 118 | /* An array would be much nicer here, or some other method of doing this. */ |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 119 | reg32 |= (config->gpi0_routing & 0x03) << 0; |
| 120 | reg32 |= (config->gpi1_routing & 0x03) << 2; |
| 121 | reg32 |= (config->gpi2_routing & 0x03) << 4; |
| 122 | reg32 |= (config->gpi3_routing & 0x03) << 6; |
| 123 | reg32 |= (config->gpi4_routing & 0x03) << 8; |
| 124 | reg32 |= (config->gpi5_routing & 0x03) << 10; |
| 125 | reg32 |= (config->gpi6_routing & 0x03) << 12; |
| 126 | reg32 |= (config->gpi7_routing & 0x03) << 14; |
| 127 | reg32 |= (config->gpi8_routing & 0x03) << 16; |
| 128 | reg32 |= (config->gpi9_routing & 0x03) << 18; |
| 129 | reg32 |= (config->gpi10_routing & 0x03) << 20; |
| 130 | reg32 |= (config->gpi11_routing & 0x03) << 22; |
| 131 | reg32 |= (config->gpi12_routing & 0x03) << 24; |
| 132 | reg32 |= (config->gpi13_routing & 0x03) << 26; |
| 133 | reg32 |= (config->gpi14_routing & 0x03) << 28; |
| 134 | reg32 |= (config->gpi15_routing & 0x03) << 30; |
| 135 | |
Kyösti Mälkki | b85a87b | 2014-12-29 11:32:27 +0200 | [diff] [blame] | 136 | pci_write_config32(dev, GPIO_ROUT, reg32); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 137 | } |
| 138 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 139 | static void i82801gx_power_options(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 140 | { |
| 141 | u8 reg8; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 142 | u16 reg16; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 143 | u32 reg32; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 144 | const char *state; |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 145 | /* Get the chip configuration */ |
Elyes HAOUAS | 8d9a6f1 | 2020-04-28 04:57:27 +0200 | [diff] [blame] | 146 | const struct southbridge_intel_i82801gx_config *config = dev->chip_info; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 147 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 148 | /* Which state do we want to goto after g3 (power restored)? |
| 149 | * 0 == S0 Full On |
| 150 | * 1 == S5 Soft Off |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 151 | * |
| 152 | * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 153 | */ |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame] | 154 | const unsigned int pwr_on = get_uint_option("power_on_after_fail", MAINBOARD_POWER_ON); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 155 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 156 | reg8 = pci_read_config8(dev, GEN_PMCON_3); |
| 157 | reg8 &= 0xfe; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 158 | switch (pwr_on) { |
| 159 | case MAINBOARD_POWER_OFF: |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 160 | reg8 |= 1; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 161 | state = "off"; |
| 162 | break; |
| 163 | case MAINBOARD_POWER_ON: |
| 164 | reg8 &= ~1; |
| 165 | state = "on"; |
| 166 | break; |
| 167 | case MAINBOARD_POWER_KEEP: |
| 168 | reg8 &= ~1; |
| 169 | state = "state keep"; |
| 170 | break; |
| 171 | default: |
| 172 | state = "undefined"; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 173 | } |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 174 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 175 | reg8 |= (3 << 4); /* avoid #S4 assertions */ |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 176 | reg8 &= ~(1 << 3); /* minimum assertion is 1 to 2 RTCCLK */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 177 | |
| 178 | pci_write_config8(dev, GEN_PMCON_3, reg8); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 179 | printk(BIOS_INFO, "Set power %s after power failure.\n", state); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 180 | |
| 181 | /* Set up NMI on errors. */ |
| 182 | reg8 = inb(0x61); |
| 183 | reg8 &= 0x0f; /* Higher Nibble must be 0 */ |
| 184 | reg8 &= ~(1 << 3); /* IOCHK# NMI Enable */ |
| 185 | // reg8 &= ~(1 << 2); /* PCI SERR# Enable */ |
| 186 | reg8 |= (1 << 2); /* PCI SERR# Disable for now */ |
| 187 | outb(reg8, 0x61); |
| 188 | |
| 189 | reg8 = inb(0x70); |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame] | 190 | const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 191 | if (nmi_option) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 192 | printk(BIOS_INFO, "NMI sources enabled.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 193 | reg8 &= ~(1 << 7); /* Set NMI. */ |
| 194 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 195 | printk(BIOS_INFO, "NMI sources disabled.\n"); |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 196 | reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 197 | } |
| 198 | outb(reg8, 0x70); |
| 199 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 200 | /* Enable CPU_SLP# and Intel Speedstep, set SMI# rate down */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 201 | reg16 = pci_read_config16(dev, GEN_PMCON_1); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 202 | reg16 &= ~(3 << 0); // SMI# rate 1 minute |
| 203 | reg16 |= (1 << 2); // CLKRUN_EN - Mobile/Ultra only |
| 204 | reg16 |= (1 << 3); // Speedstep Enable - Mobile/Ultra only |
| 205 | reg16 |= (1 << 5); // CPUSLP_EN Desktop only |
Sven Schnelle | 906f9ae | 2011-10-23 16:35:01 +0200 | [diff] [blame] | 206 | |
| 207 | if (config->c4onc3_enable) |
| 208 | reg16 |= (1 << 7); |
| 209 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 210 | // another laptop wants this? |
| 211 | // reg16 &= ~(1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only |
| 212 | reg16 |= (1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only |
Kyösti Mälkki | 9446447 | 2020-06-13 13:45:42 +0300 | [diff] [blame] | 213 | if (CONFIG(DEBUG_PERIODIC_SMI)) |
| 214 | reg16 |= (3 << 0); // Periodic SMI every 8s |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 215 | pci_write_config16(dev, GEN_PMCON_1, reg16); |
| 216 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 217 | // Set the board's GPI routing. |
| 218 | i82801gx_gpi_routing(dev); |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 219 | |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 220 | write_pmbase32(GPE0_EN, config->gpe0_en); |
| 221 | write_pmbase16(ALT_GP_SMI_EN, config->alt_gp_smi_en); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 222 | |
| 223 | /* Set up power management block and determine sleep mode */ |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 224 | reg32 = read_pmbase32(PM1_CNT); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 225 | |
| 226 | reg32 &= ~(7 << 10); // SLP_TYP |
| 227 | reg32 |= (1 << 1); // enable C3->C0 transition on bus master |
| 228 | reg32 |= (1 << 0); // SCI_EN |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 229 | write_pmbase32(PM1_CNT, reg32); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 230 | } |
| 231 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 232 | static void i82801gx_configure_cstates(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 233 | { |
Angel Pons | d19332c | 2020-06-08 12:32:54 +0200 | [diff] [blame] | 234 | // Enable Popup & Popdown |
| 235 | pci_or_config8(dev, 0xa9, (1 << 4) | (1 << 3) | (1 << 2)); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 236 | |
| 237 | // Set Deeper Sleep configuration to recommended values |
Angel Pons | d19332c | 2020-06-08 12:32:54 +0200 | [diff] [blame] | 238 | // Deeper Sleep to Stop CPU: 34-40us |
| 239 | // Deeper Sleep to Sleep: 15us |
| 240 | pci_update_config8(dev, 0xaa, 0xf0, (2 << 2) | (2 << 0)); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 241 | } |
| 242 | |
| 243 | static void i82801gx_rtc_init(struct device *dev) |
| 244 | { |
| 245 | u8 reg8; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 246 | int rtc_failed; |
| 247 | |
| 248 | reg8 = pci_read_config8(dev, GEN_PMCON_3); |
| 249 | rtc_failed = reg8 & RTC_BATTERY_DEAD; |
| 250 | if (rtc_failed) { |
| 251 | reg8 &= ~RTC_BATTERY_DEAD; |
| 252 | pci_write_config8(dev, GEN_PMCON_3, reg8); |
| 253 | } |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 254 | printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 255 | |
Gabe Black | b3f08c6 | 2014-04-30 17:12:25 -0700 | [diff] [blame] | 256 | cmos_init(rtc_failed); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 257 | } |
| 258 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 259 | static void enable_clock_gating(void) |
| 260 | { |
| 261 | u32 reg32; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 262 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 263 | /* Enable Clock Gating for most devices */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 264 | reg32 = RCBA32(CG); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 265 | reg32 |= (1 << 31); // LPC clock gating |
| 266 | reg32 |= (1 << 30); // PATA clock gating |
| 267 | // SATA clock gating |
| 268 | reg32 |= (1 << 27) | (1 << 26) | (1 << 25) | (1 << 24); |
| 269 | reg32 |= (1 << 23); // AC97 clock gating |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 270 | reg32 |= (1 << 19); // USB EHCI clock gating |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 271 | reg32 |= (1 << 3) | (1 << 1); // DMI clock gating |
| 272 | reg32 |= (1 << 2); // PCIe clock gating; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 273 | reg32 &= ~(1 << 20); // No static clock gating for USB |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 274 | reg32 &= ~((1 << 29) | (1 << 28)); // Disable UHCI clock gating |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 275 | RCBA32(CG) = reg32; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 276 | } |
Stefan Reinauer | 269563a | 2009-01-19 21:20:22 +0000 | [diff] [blame] | 277 | |
Kyösti Mälkki | 83d6a8a | 2019-07-12 08:16:53 +0300 | [diff] [blame] | 278 | static void i82801gx_set_acpi_mode(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 279 | { |
Kyösti Mälkki | ad882c3 | 2020-06-02 05:05:30 +0300 | [diff] [blame] | 280 | if (!acpi_is_wakeup_s3()) { |
| 281 | apm_control(APM_CNT_ACPI_DISABLE); |
| 282 | } else { |
| 283 | apm_control(APM_CNT_ACPI_ENABLE); |
Sven Schnelle | e261807 | 2011-06-05 11:39:12 +0200 | [diff] [blame] | 284 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 285 | } |
| 286 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 287 | static void i82801gx_spi_init(void) |
| 288 | { |
| 289 | u16 spicontrol; |
| 290 | |
| 291 | spicontrol = RCBA16(SPIBASE + 2); |
| 292 | spicontrol &= ~(1 << 0); // SPI Access Request |
| 293 | RCBA16(SPIBASE + 2) = spicontrol; |
| 294 | } |
| 295 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 296 | static void i82801gx_fixups(struct device *dev) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 297 | { |
| 298 | /* This needs to happen after PCI enumeration */ |
| 299 | RCBA32(0x1d40) |= 1; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 300 | |
| 301 | /* USB Transient Disconnect Detect: |
| 302 | * Prevent a SE0 condition on the USB ports from being |
| 303 | * interpreted by the UHCI controller as a disconnect |
| 304 | */ |
| 305 | pci_write_config8(dev, 0xad, 0x3); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 306 | } |
| 307 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 308 | static void lpc_init(struct device *dev) |
| 309 | { |
Elyes HAOUAS | bfc255a | 2020-03-07 13:05:14 +0100 | [diff] [blame] | 310 | printk(BIOS_DEBUG, "i82801gx: %s\n", __func__); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 311 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 312 | /* IO APIC initialization. */ |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 313 | i82801gx_enable_ioapic(dev); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 314 | |
| 315 | i82801gx_enable_serial_irqs(dev); |
| 316 | |
| 317 | /* Setup the PIRQ. */ |
| 318 | i82801gx_pirq_init(dev); |
| 319 | |
| 320 | /* Setup power options. */ |
| 321 | i82801gx_power_options(dev); |
| 322 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 323 | /* Configure Cx state registers */ |
| 324 | i82801gx_configure_cstates(dev); |
| 325 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 326 | /* Initialize the real time clock. */ |
| 327 | i82801gx_rtc_init(dev); |
| 328 | |
| 329 | /* Initialize ISA DMA. */ |
| 330 | isa_dma_init(); |
| 331 | |
| 332 | /* Initialize the High Precision Event Timers, if present. */ |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 333 | enable_hpet(); |
| 334 | |
| 335 | /* Initialize Clock Gating */ |
| 336 | enable_clock_gating(); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 337 | |
| 338 | setup_i8259(); |
| 339 | |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 340 | /* The OS should do this? */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 341 | /* Interrupt 9 should be level triggered (SCI) */ |
| 342 | i8259_configure_irq_trigger(9, 1); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 343 | |
Kyösti Mälkki | 44da9e7 | 2019-10-09 12:32:16 +0300 | [diff] [blame] | 344 | i82801gx_set_acpi_mode(dev); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 345 | |
| 346 | i82801gx_spi_init(); |
| 347 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 348 | i82801gx_fixups(dev); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 349 | } |
| 350 | |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 351 | unsigned long acpi_fill_madt(unsigned long current) |
| 352 | { |
| 353 | /* Local APICs */ |
Kyösti Mälkki | 66b5e1b | 2022-11-12 21:13:45 +0200 | [diff] [blame] | 354 | current = acpi_create_madt_lapics_with_nmis(current); |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 355 | |
| 356 | /* IOAPIC */ |
Kyösti Mälkki | c045735 | 2021-06-08 06:12:25 +0300 | [diff] [blame] | 357 | current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 358 | |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 359 | /* INT_SRC_OVR */ |
| 360 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 361 | current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE); |
| 362 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 363 | current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL); |
| 364 | |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 365 | return current; |
| 366 | } |
| 367 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 368 | static void i82801gx_lpc_read_resources(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 369 | { |
| 370 | struct resource *res; |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 371 | u8 io_index = 0; |
| 372 | int i; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 373 | |
| 374 | /* Get the normal PCI resources of this device. */ |
| 375 | pci_dev_read_resources(dev); |
| 376 | |
| 377 | /* Add an extra subtractive resource for both memory and I/O. */ |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 378 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 379 | res->base = 0; |
| 380 | res->size = 0x1000; |
| 381 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 382 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 383 | |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 384 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 385 | res->base = 0xff800000; |
| 386 | res->size = 0x00800000; /* 8 MB for flash */ |
| 387 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 388 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 389 | |
| 390 | res = new_resource(dev, 3); /* IOAPIC */ |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 391 | res->base = IO_APIC_ADDR; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 392 | res->size = 0x00001000; |
| 393 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 394 | |
| 395 | /* Set IO decode ranges if required.*/ |
| 396 | for (i = 0; i < 4; i++) { |
| 397 | u32 gen_dec; |
| 398 | gen_dec = pci_read_config32(dev, 0x84 + 4 * i); |
| 399 | |
| 400 | if ((gen_dec & 0xFFFC) > 0x1000) { |
| 401 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
| 402 | res->base = gen_dec & 0xFFFC; |
| 403 | res->size = (gen_dec >> 16) & 0xFC; |
| 404 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 405 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 406 | } |
| 407 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 408 | } |
| 409 | |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 410 | static void lpc_final(struct device *dev) |
| 411 | { |
| 412 | u16 tco1_cnt; |
| 413 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 414 | if (!CONFIG(INTEL_CHIPSET_LOCKDOWN)) |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 415 | return; |
| 416 | |
Arthur Heymans | 767de0a | 2019-11-15 19:19:53 +0100 | [diff] [blame] | 417 | if (CONFIG(BOOT_DEVICE_SPI_FLASH)) |
| 418 | spi_finalize_ops(); |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 419 | |
| 420 | /* Lock SPIBAR */ |
| 421 | SPIBAR16(0) = SPIBAR16(0) | (1 << 15); |
| 422 | |
| 423 | /* BIOS Interface Lockdown */ |
| 424 | RCBA32(0x3410) |= 1 << 0; |
| 425 | |
| 426 | /* Global SMI Lock */ |
| 427 | pci_or_config16(dev, GEN_PMCON_1, 1 << 4); |
| 428 | |
| 429 | /* TCO_Lock */ |
Kyösti Mälkki | f38f30a | 2022-11-25 06:22:10 +0200 | [diff] [blame^] | 430 | tco1_cnt = inw(DEFAULT_PMBASE + 0x60 + TCO1_CNT); |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 431 | tco1_cnt |= (1 << 12); /* TCO lock */ |
Kyösti Mälkki | f38f30a | 2022-11-25 06:22:10 +0200 | [diff] [blame^] | 432 | outw(tco1_cnt, DEFAULT_PMBASE + 0x60 + TCO1_CNT); |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 433 | |
| 434 | /* Indicate finalize step with post code */ |
Elyes Haouas | 3347720 | 2022-11-22 15:15:21 +0100 | [diff] [blame] | 435 | post_code(POST_OS_BOOT); |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 436 | } |
| 437 | |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 438 | static const char *lpc_acpi_name(const struct device *dev) |
| 439 | { |
| 440 | return "LPCB"; |
| 441 | } |
| 442 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 443 | static void southbridge_fill_ssdt(const struct device *device) |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 444 | { |
| 445 | intel_acpi_gen_def_acpi_pirq(device); |
| 446 | } |
| 447 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 448 | static struct device_operations device_ops = { |
| 449 | .read_resources = i82801gx_lpc_read_resources, |
| 450 | .set_resources = pci_dev_set_resources, |
Myles Watson | 7eac445 | 2010-06-17 16:16:56 +0000 | [diff] [blame] | 451 | .enable_resources = pci_dev_enable_resources, |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 452 | .write_acpi_tables = acpi_write_hpet, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 453 | .acpi_fill_ssdt = southbridge_fill_ssdt, |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 454 | .acpi_name = lpc_acpi_name, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 455 | .init = lpc_init, |
Nico Huber | 51b75ae | 2019-03-14 16:02:05 +0100 | [diff] [blame] | 456 | .scan_bus = scan_static_bus, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 457 | .enable = i82801gx_enable, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 458 | .ops_pci = &pci_dev_ops_pci, |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 459 | .final = lpc_final, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 460 | }; |
| 461 | |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 462 | static const unsigned short pci_device_ids[] = { |
Elyes HAOUAS | 92646ea | 2020-04-04 13:43:03 +0200 | [diff] [blame] | 463 | 0x27b0, /* 82801GH (ICH7 DH) */ |
| 464 | 0x27b8, /* 82801GB/GR (ICH7/ICH7R) */ |
| 465 | 0x27b9, /* 82801GBM/GU (ICH7-M/ICH7-U) */ |
| 466 | 0x27bc, /* 82NM10 (NM10) */ |
| 467 | 0x27bd, /* 82801GHM (ICH7-M DH) */ |
| 468 | 0 |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 469 | }; |
| 470 | |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 471 | static const struct pci_driver ich7_lpc __pci_driver = { |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 472 | .ops = &device_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 473 | .vendor = PCI_VID_INTEL, |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 474 | .devices = pci_device_ids, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 475 | }; |