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Patrick Georgic49d7a32020-05-08 22:50:46 +02001# SPDX-License-Identifier: GPL-2.0-only
Frank Vibrans420faca2011-02-14 18:42:12 +00002
Kyösti Mälkkid11ca1d2012-03-16 15:40:56 +02003config CPU_AMD_AGESA
Paul Menzelea23a6b2013-05-02 10:34:49 +02004 bool
Paul Menzelea23a6b2013-05-02 10:34:49 +02005 default y if CPU_AMD_AGESA_FAMILY15_TN
Siyuan Wang5d7d09c2013-07-09 17:08:41 +08006 default y if CPU_AMD_AGESA_FAMILY16_KB
Paul Menzelea23a6b2013-05-02 10:34:49 +02007 default n
Angel Pons8e035e32021-06-22 12:58:20 +02008 select ARCH_X86
Kyösti Mälkkid4955f02017-09-08 07:14:17 +03009 select DRIVERS_AMD_PI
Stefan Reinauer0db68202012-08-07 14:44:51 -070010 select TSC_SYNC_LFENCE
Patrick Georgie135ac52012-11-20 11:53:47 +010011 select UDELAY_LAPIC
Paul Menzel60c54cc2013-05-01 16:36:56 +020012 select LAPIC_MONOTONIC_TIMER
Kyösti Mälkkibb6c2162014-04-29 07:15:26 +030013 select SPI_FLASH if HAVE_ACPI_RESUME
Michał Żygowskia3ce27d2019-11-27 22:29:44 +010014 select SSE2
Arthur Heymansb97a3032020-08-07 22:30:04 +020015 select CACHE_MRC_SETTINGS
Kerry Shehd3e990c2012-02-07 20:31:35 +080016
Kyösti Mälkkid11ca1d2012-03-16 15:40:56 +020017if CPU_AMD_AGESA
Kerry Shehd3e990c2012-02-07 20:31:35 +080018
Patrick Georgie135ac52012-11-20 11:53:47 +010019config UDELAY_LAPIC_FIXED_FSB
20 int
21 default 200
22
Kyösti Mälkkic984f4f2013-07-29 10:16:14 +030023# TODO: Sync these with definitions in AGESA vendorcode.
24# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
25# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.
26
27config DCACHE_RAM_BASE
28 hex
29 default 0x30000
30
31config DCACHE_RAM_SIZE
32 hex
33 default 0x10000
Kyösti Mälkki4f7cb872014-06-19 03:48:42 +030034
Michał Żygowski1b12b642019-11-24 16:32:05 +010035config DCACHE_BSP_STACK_SIZE
36 hex
37 default 0x4000
38
Kyösti Mälkki0e1ea272017-09-01 19:23:35 +030039config ENABLE_MRC_CACHE
40 bool "Use cached memory configuration"
41 default n
42 select SPI_FLASH
43 help
44 Try to restore memory training results
45 from non-volatile memory.
46
Patrick Georgi5d41c1a2014-04-12 13:04:14 +020047endif # CPU_AMD_AGESA
Kyösti Mälkkic984f4f2013-07-29 10:16:14 +030048
Patrick Georgi0bb83462019-11-22 20:58:58 +010049source "src/cpu/amd/agesa/family15tn/Kconfig"
50source "src/cpu/amd/agesa/family16kb/Kconfig"