Frank Vibrans | 420faca | 2011-02-14 18:42:12 +0000 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
Frank Vibrans | 420faca | 2011-02-14 18:42:12 +0000 | [diff] [blame] | 4 | # This program is free software; you can redistribute it and/or modify |
| 5 | # it under the terms of the GNU General Public License as published by |
| 6 | # the Free Software Foundation; version 2 of the License. |
| 7 | # |
| 8 | # This program is distributed in the hope that it will be useful, |
| 9 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | # GNU General Public License for more details. |
| 12 | # |
Frank Vibrans | 420faca | 2011-02-14 18:42:12 +0000 | [diff] [blame] | 13 | |
Kyösti Mälkki | d11ca1d | 2012-03-16 15:40:56 +0200 | [diff] [blame] | 14 | config CPU_AMD_AGESA |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 15 | bool |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 16 | default y if CPU_AMD_AGESA_FAMILY14 |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 17 | default y if CPU_AMD_AGESA_FAMILY15_TN |
Siyuan Wang | 5d7d09c | 2013-07-09 17:08:41 +0800 | [diff] [blame] | 18 | default y if CPU_AMD_AGESA_FAMILY16_KB |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 19 | default n |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 20 | select ARCH_BOOTBLOCK_X86_32 |
Stefan Reinauer | 77b1655 | 2015-01-14 19:51:47 +0100 | [diff] [blame] | 21 | select ARCH_VERSTAGE_X86_32 |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 22 | select ARCH_ROMSTAGE_X86_32 |
| 23 | select ARCH_RAMSTAGE_X86_32 |
Kyösti Mälkki | d4955f0 | 2017-09-08 07:14:17 +0300 | [diff] [blame] | 24 | select DRIVERS_AMD_PI |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 25 | select TSC_SYNC_LFENCE |
Patrick Georgi | e135ac5 | 2012-11-20 11:53:47 +0100 | [diff] [blame] | 26 | select UDELAY_LAPIC |
Paul Menzel | 60c54cc | 2013-05-01 16:36:56 +0200 | [diff] [blame] | 27 | select LAPIC_MONOTONIC_TIMER |
Kyösti Mälkki | bb6c216 | 2014-04-29 07:15:26 +0300 | [diff] [blame] | 28 | select SPI_FLASH if HAVE_ACPI_RESUME |
Kyösti Mälkki | 898ca04 | 2019-11-10 18:20:36 +0200 | [diff] [blame] | 29 | select CBMEM_STAGE_CACHE if HAVE_ACPI_RESUME |
Kyösti Mälkki | 4d372c7 | 2019-07-08 13:48:57 +0300 | [diff] [blame] | 30 | select SMM_ASEG |
Arthur Heymans | e33c50d | 2019-10-06 17:39:44 +0200 | [diff] [blame] | 31 | select NO_FIXED_XIP_ROM_SIZE |
Kerry Sheh | d3e990c | 2012-02-07 20:31:35 +0800 | [diff] [blame] | 32 | |
Kyösti Mälkki | d11ca1d | 2012-03-16 15:40:56 +0200 | [diff] [blame] | 33 | if CPU_AMD_AGESA |
Kerry Sheh | d3e990c | 2012-02-07 20:31:35 +0800 | [diff] [blame] | 34 | |
Patrick Georgi | e135ac5 | 2012-11-20 11:53:47 +0100 | [diff] [blame] | 35 | config UDELAY_LAPIC_FIXED_FSB |
| 36 | int |
| 37 | default 200 |
| 38 | |
Kyösti Mälkki | c984f4f | 2013-07-29 10:16:14 +0300 | [diff] [blame] | 39 | # TODO: Sync these with definitions in AGESA vendorcode. |
| 40 | # DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR. |
| 41 | # DCACHE_RAM_SIZE must equal BSP_STACK_SIZE. |
| 42 | |
| 43 | config DCACHE_RAM_BASE |
| 44 | hex |
| 45 | default 0x30000 |
| 46 | |
| 47 | config DCACHE_RAM_SIZE |
| 48 | hex |
| 49 | default 0x10000 |
Kyösti Mälkki | 4f7cb87 | 2014-06-19 03:48:42 +0300 | [diff] [blame] | 50 | |
Kyösti Mälkki | 0e1ea27 | 2017-09-01 19:23:35 +0300 | [diff] [blame] | 51 | config ENABLE_MRC_CACHE |
| 52 | bool "Use cached memory configuration" |
| 53 | default n |
| 54 | select SPI_FLASH |
| 55 | help |
| 56 | Try to restore memory training results |
| 57 | from non-volatile memory. |
| 58 | |
Kyösti Mälkki | 4f7cb87 | 2014-06-19 03:48:42 +0300 | [diff] [blame] | 59 | config S3_DATA_POS |
| 60 | hex |
| 61 | default 0xFFFF0000 |
| 62 | |
| 63 | config S3_DATA_SIZE |
| 64 | int |
| 65 | default 32768 |
| 66 | |
Patrick Georgi | 5d41c1a | 2014-04-12 13:04:14 +0200 | [diff] [blame] | 67 | endif # CPU_AMD_AGESA |
Kyösti Mälkki | c984f4f | 2013-07-29 10:16:14 +0300 | [diff] [blame] | 68 | |
Patrick Georgi | 0bb8346 | 2019-11-22 20:58:58 +0100 | [diff] [blame^] | 69 | source "src/cpu/amd/agesa/family14/Kconfig" |
| 70 | source "src/cpu/amd/agesa/family15tn/Kconfig" |
| 71 | source "src/cpu/amd/agesa/family16kb/Kconfig" |