Patrick Georgi | c49d7a3 | 2020-05-08 22:50:46 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Frank Vibrans | 420faca | 2011-02-14 18:42:12 +0000 | [diff] [blame] | 2 | |
Kyösti Mälkki | d11ca1d | 2012-03-16 15:40:56 +0200 | [diff] [blame] | 3 | config CPU_AMD_AGESA |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 4 | bool |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 5 | default y if CPU_AMD_AGESA_FAMILY14 |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 6 | default y if CPU_AMD_AGESA_FAMILY15_TN |
Siyuan Wang | 5d7d09c | 2013-07-09 17:08:41 +0800 | [diff] [blame] | 7 | default y if CPU_AMD_AGESA_FAMILY16_KB |
Paul Menzel | ea23a6b | 2013-05-02 10:34:49 +0200 | [diff] [blame] | 8 | default n |
Angel Pons | 8e035e3 | 2021-06-22 12:58:20 +0200 | [diff] [blame] | 9 | select ARCH_X86 |
Kyösti Mälkki | d4955f0 | 2017-09-08 07:14:17 +0300 | [diff] [blame] | 10 | select DRIVERS_AMD_PI |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 11 | select TSC_SYNC_LFENCE |
Patrick Georgi | e135ac5 | 2012-11-20 11:53:47 +0100 | [diff] [blame] | 12 | select UDELAY_LAPIC |
Paul Menzel | 60c54cc | 2013-05-01 16:36:56 +0200 | [diff] [blame] | 13 | select LAPIC_MONOTONIC_TIMER |
Kyösti Mälkki | bb6c216 | 2014-04-29 07:15:26 +0300 | [diff] [blame] | 14 | select SPI_FLASH if HAVE_ACPI_RESUME |
Michał Żygowski | a3ce27d | 2019-11-27 22:29:44 +0100 | [diff] [blame] | 15 | select SSE2 |
Arthur Heymans | b97a303 | 2020-08-07 22:30:04 +0200 | [diff] [blame^] | 16 | select CACHE_MRC_SETTINGS |
Kerry Sheh | d3e990c | 2012-02-07 20:31:35 +0800 | [diff] [blame] | 17 | |
Kyösti Mälkki | d11ca1d | 2012-03-16 15:40:56 +0200 | [diff] [blame] | 18 | if CPU_AMD_AGESA |
Kerry Sheh | d3e990c | 2012-02-07 20:31:35 +0800 | [diff] [blame] | 19 | |
Patrick Georgi | e135ac5 | 2012-11-20 11:53:47 +0100 | [diff] [blame] | 20 | config UDELAY_LAPIC_FIXED_FSB |
| 21 | int |
| 22 | default 200 |
| 23 | |
Kyösti Mälkki | c984f4f | 2013-07-29 10:16:14 +0300 | [diff] [blame] | 24 | # TODO: Sync these with definitions in AGESA vendorcode. |
| 25 | # DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR. |
| 26 | # DCACHE_RAM_SIZE must equal BSP_STACK_SIZE. |
| 27 | |
| 28 | config DCACHE_RAM_BASE |
| 29 | hex |
| 30 | default 0x30000 |
| 31 | |
| 32 | config DCACHE_RAM_SIZE |
| 33 | hex |
| 34 | default 0x10000 |
Kyösti Mälkki | 4f7cb87 | 2014-06-19 03:48:42 +0300 | [diff] [blame] | 35 | |
Michał Żygowski | 1b12b64 | 2019-11-24 16:32:05 +0100 | [diff] [blame] | 36 | config DCACHE_BSP_STACK_SIZE |
| 37 | hex |
| 38 | default 0x4000 |
| 39 | |
Kyösti Mälkki | 0e1ea27 | 2017-09-01 19:23:35 +0300 | [diff] [blame] | 40 | config ENABLE_MRC_CACHE |
| 41 | bool "Use cached memory configuration" |
| 42 | default n |
| 43 | select SPI_FLASH |
| 44 | help |
| 45 | Try to restore memory training results |
| 46 | from non-volatile memory. |
| 47 | |
Patrick Georgi | 5d41c1a | 2014-04-12 13:04:14 +0200 | [diff] [blame] | 48 | endif # CPU_AMD_AGESA |
Kyösti Mälkki | c984f4f | 2013-07-29 10:16:14 +0300 | [diff] [blame] | 49 | |
Patrick Georgi | 0bb8346 | 2019-11-22 20:58:58 +0100 | [diff] [blame] | 50 | source "src/cpu/amd/agesa/family14/Kconfig" |
| 51 | source "src/cpu/amd/agesa/family15tn/Kconfig" |
| 52 | source "src/cpu/amd/agesa/family16kb/Kconfig" |