David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 1 | config SOC_CAVIUM_CN81XX |
| 2 | bool |
| 3 | default n |
| 4 | select ARCH_BOOTBLOCK_ARMV8_64 |
| 5 | select ARCH_RAMSTAGE_ARMV8_64 |
| 6 | select ARCH_ROMSTAGE_ARMV8_64 |
| 7 | select ARCH_VERSTAGE_ARMV8_64 |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 8 | select DRIVERS_UART_PL011 |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 9 | select UART_OVERRIDE_REFCLK |
| 10 | select SOC_CAVIUM_COMMON |
Patrick Rudolph | de8e689 | 2018-07-12 11:47:37 +0200 | [diff] [blame] | 11 | select CAVIUM_BDK_DDR_TUNE_HW_OFFSETS |
Patrick Rudolph | d0c6797 | 2018-04-17 13:47:55 +0200 | [diff] [blame] | 12 | select MMCONF_SUPPORT |
| 13 | select PCI |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 14 | |
| 15 | if SOC_CAVIUM_CN81XX |
| 16 | |
Furquan Shaikh | 46514c2 | 2020-06-11 11:59:07 -0700 | [diff] [blame] | 17 | config MEMLAYOUT_LD_FILE |
| 18 | string |
| 19 | default "src/soc/cavium/cn81xx/memlayout.ld" |
| 20 | |
Philipp Deppenwiese | 31a4700c | 2018-08-10 16:07:23 -0700 | [diff] [blame] | 21 | config VBOOT |
| 22 | select VBOOT_SEPARATE_VERSTAGE |
Philipp Deppenwiese | 31a4700c | 2018-08-10 16:07:23 -0700 | [diff] [blame] | 23 | select VBOOT_STARTS_IN_BOOTBLOCK |
| 24 | |
Patrick Rudolph | 5cdaa33 | 2018-04-20 14:43:21 +0200 | [diff] [blame] | 25 | config ARM64_BL31_EXTERNAL_FILE |
| 26 | string |
| 27 | default "3rdparty/blobs/soc/cavium/cn81xx/bl31.elf" |
| 28 | |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 29 | config ARCH_ARMV8_EXTENSION |
| 30 | int |
| 31 | default 1 |
| 32 | |
| 33 | config HEAP_SIZE |
| 34 | default 0x10000 |
| 35 | |
| 36 | config STACK_SIZE |
| 37 | default 0x2000 |
| 38 | |
Patrick Rudolph | d0c6797 | 2018-04-17 13:47:55 +0200 | [diff] [blame] | 39 | config MMCONF_BASE_ADDRESS |
| 40 | default 0x848000000000 |
| 41 | |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 42 | endif |