blob: 9cc7b48438e8f7a1b6cf81e70ef334a9833e626e [file] [log] [blame]
David Hendricks8cbd5692017-12-01 20:49:48 -08001config SOC_CAVIUM_CN81XX
2 bool
3 default n
4 select ARCH_BOOTBLOCK_ARMV8_64
5 select ARCH_RAMSTAGE_ARMV8_64
6 select ARCH_ROMSTAGE_ARMV8_64
7 select ARCH_VERSTAGE_ARMV8_64
8 select BOOTBLOCK_CONSOLE
9 select DRIVERS_UART_PL011
10 select GENERIC_UDELAY
11 select HAVE_MONOTONIC_TIMER
12 select UART_OVERRIDE_REFCLK
13 select SOC_CAVIUM_COMMON
Patrick Rudolphde8e6892018-07-12 11:47:37 +020014 select CAVIUM_BDK_DDR_TUNE_HW_OFFSETS
David Hendricks8cbd5692017-12-01 20:49:48 -080015
16if SOC_CAVIUM_CN81XX
17
18config ARCH_ARMV8_EXTENSION
19 int
20 default 1
21
22config HEAP_SIZE
23 default 0x10000
24
25config STACK_SIZE
26 default 0x2000
27
28endif