blob: 3191ef3c1671ab4257743cfed98a90a383586c1e [file] [log] [blame]
David Hendricks8cbd5692017-12-01 20:49:48 -08001config SOC_CAVIUM_CN81XX
2 bool
3 default n
4 select ARCH_BOOTBLOCK_ARMV8_64
5 select ARCH_RAMSTAGE_ARMV8_64
6 select ARCH_ROMSTAGE_ARMV8_64
7 select ARCH_VERSTAGE_ARMV8_64
8 select BOOTBLOCK_CONSOLE
9 select DRIVERS_UART_PL011
10 select GENERIC_UDELAY
11 select HAVE_MONOTONIC_TIMER
12 select UART_OVERRIDE_REFCLK
13 select SOC_CAVIUM_COMMON
Patrick Rudolphde8e6892018-07-12 11:47:37 +020014 select CAVIUM_BDK_DDR_TUNE_HW_OFFSETS
Patrick Rudolphd0c67972018-04-17 13:47:55 +020015 select MMCONF_SUPPORT
16 select PCI
David Hendricks8cbd5692017-12-01 20:49:48 -080017
18if SOC_CAVIUM_CN81XX
19
20config ARCH_ARMV8_EXTENSION
21 int
22 default 1
23
24config HEAP_SIZE
25 default 0x10000
26
27config STACK_SIZE
28 default 0x2000
29
Patrick Rudolphd0c67972018-04-17 13:47:55 +020030config MMCONF_BASE_ADDRESS
31 default 0x848000000000
32
David Hendricks8cbd5692017-12-01 20:49:48 -080033endif