soc/cavium: Add PCI support
* Add support for secure/unsecure split
* Use MMCONF to access devices in domain0
* Program MSIX vectors to fix a crash in GNU/Linux
Tested on Cavium CN81XX_EVB.
All PCI devices are visible.
Change-Id: I881f38a26a165e6bd965fcd73547473b5e32d4b0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25750
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
index 9cc7b48..3191ef3 100644
--- a/src/soc/cavium/cn81xx/Kconfig
+++ b/src/soc/cavium/cn81xx/Kconfig
@@ -12,6 +12,8 @@
select UART_OVERRIDE_REFCLK
select SOC_CAVIUM_COMMON
select CAVIUM_BDK_DDR_TUNE_HW_OFFSETS
+ select MMCONF_SUPPORT
+ select PCI
if SOC_CAVIUM_CN81XX
@@ -25,4 +27,7 @@
config STACK_SIZE
default 0x2000
+config MMCONF_BASE_ADDRESS
+ default 0x848000000000
+
endif