Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <console/console.h> |
Iru Cai | 3364203 | 2019-06-11 14:24:43 +0800 | [diff] [blame] | 16 | #include <console/usb.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 17 | #include <string.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 18 | #include <cbmem.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 19 | #include <cbfs.h> |
Elyes HAOUAS | 82d4642 | 2019-04-28 18:01:48 +0200 | [diff] [blame] | 20 | #include <cf9_reset.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 21 | #include <ip_checksum.h> |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 22 | #include <memory_info.h> |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 23 | #include <mrc_cache.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 24 | #include <device/pci_def.h> |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 25 | #include <device/dram/ddr3.h> |
| 26 | #include <smbios.h> |
| 27 | #include <spd.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 28 | #include <security/vboot/vboot_common.h> |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 29 | #include <commonlib/region.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 30 | #include "raminit.h" |
| 31 | #include "pei_data.h" |
| 32 | #include "haswell.h" |
| 33 | |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 34 | #define MRC_CACHE_VERSION 1 |
| 35 | |
Aaron Durbin | 2ad1dba | 2013-02-07 00:51:18 -0600 | [diff] [blame] | 36 | void save_mrc_data(struct pei_data *pei_data) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 37 | { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 38 | /* Save the MRC S3 restore data to cbmem */ |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 39 | mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, pei_data->mrc_output, |
| 40 | pei_data->mrc_output_len); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 41 | } |
| 42 | |
| 43 | static void prepare_mrc_cache(struct pei_data *pei_data) |
| 44 | { |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 45 | struct region_device rdev; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 46 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 47 | /* Preset just in case there is an error */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 48 | pei_data->mrc_input = NULL; |
| 49 | pei_data->mrc_input_len = 0; |
| 50 | |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 51 | if (mrc_cache_get_current(MRC_TRAINING_DATA, MRC_CACHE_VERSION, &rdev)) |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 52 | /* Error message printed in find_current_mrc_cache */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 53 | return; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 54 | |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 55 | pei_data->mrc_input = rdev_mmap_full(&rdev); |
| 56 | pei_data->mrc_input_len = region_device_sz(&rdev); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 57 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 58 | printk(BIOS_DEBUG, "%s: at %p, size %x\n", __func__, pei_data->mrc_input, |
| 59 | pei_data->mrc_input_len); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 60 | } |
| 61 | |
Elyes HAOUAS | 448d9fb | 2018-05-22 12:51:27 +0200 | [diff] [blame] | 62 | static const char *ecc_decoder[] = { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 63 | "inactive", |
| 64 | "active on IO", |
| 65 | "disabled on IO", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 66 | "active", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 67 | }; |
| 68 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 69 | /* Print out the memory controller configuration, as per the values in its registers. */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 70 | static void report_memory_config(void) |
| 71 | { |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 72 | u32 addr_decoder_common, addr_decode_chan[2]; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 73 | int i; |
| 74 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 75 | addr_decoder_common = MCHBAR32(MAD_CHNL); |
| 76 | addr_decode_chan[0] = MCHBAR32(MAD_DIMM_CH0); |
| 77 | addr_decode_chan[1] = MCHBAR32(MAD_DIMM_CH1); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 78 | |
| 79 | printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 80 | (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); |
| 81 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 82 | printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 83 | (addr_decoder_common >> 0) & 3, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 84 | (addr_decoder_common >> 2) & 3, |
| 85 | (addr_decoder_common >> 4) & 3); |
| 86 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 87 | for (i = 0; i < ARRAY_SIZE(addr_decode_chan); i++) { |
| 88 | u32 ch_conf = addr_decode_chan[i]; |
| 89 | |
| 90 | printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf); |
| 91 | printk(BIOS_DEBUG, " ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 92 | printk(BIOS_DEBUG, " enhanced interleave mode %s\n", |
| 93 | ((ch_conf >> 22) & 1) ? "on" : "off"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 94 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 95 | printk(BIOS_DEBUG, " rank interleave %s\n", |
| 96 | ((ch_conf >> 21) & 1) ? "on" : "off"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 97 | |
Duncan Laurie | 8d77402 | 2013-10-22 16:32:49 -0700 | [diff] [blame] | 98 | printk(BIOS_DEBUG, " DIMMA %d MB width %s %s rank%s\n", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 99 | ((ch_conf >> 0) & 0xff) * 256, |
Duncan Laurie | 8d77402 | 2013-10-22 16:32:49 -0700 | [diff] [blame] | 100 | ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 101 | ((ch_conf >> 17) & 1) ? "dual" : "single", |
| 102 | ((ch_conf >> 16) & 1) ? "" : ", selected"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 103 | |
Duncan Laurie | 8d77402 | 2013-10-22 16:32:49 -0700 | [diff] [blame] | 104 | printk(BIOS_DEBUG, " DIMMB %d MB width %s %s rank%s\n", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 105 | ((ch_conf >> 8) & 0xff) * 256, |
Ryan Salsamendi | dab81a4 | 2017-06-30 17:36:41 -0700 | [diff] [blame] | 106 | ((ch_conf >> 20) & 1) ? "x16" : "x8 or x32", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 107 | ((ch_conf >> 18) & 1) ? "dual" : "single", |
| 108 | ((ch_conf >> 16) & 1) ? ", selected" : ""); |
| 109 | } |
| 110 | } |
| 111 | |
| 112 | /** |
| 113 | * Find PEI executable in coreboot filesystem and execute it. |
| 114 | * |
| 115 | * @param pei_data: configuration data for UEFI PEI reference code |
| 116 | */ |
| 117 | void sdram_initialize(struct pei_data *pei_data) |
| 118 | { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 119 | unsigned long entry; |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 120 | uint32_t type = CBFS_TYPE_MRC; |
| 121 | struct cbfsf f; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 122 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 123 | printk(BIOS_DEBUG, "Starting UEFI PEI System Agent\n"); |
| 124 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 125 | /* Do not pass MRC data in for recovery mode boot, always pass it in for S3 resume */ |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 126 | if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 127 | prepare_mrc_cache(pei_data); |
| 128 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 129 | /* If MRC data is not found, we cannot continue S3 resume */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 130 | if (pei_data->boot_mode == 2 && !pei_data->mrc_input) { |
Duncan Laurie | 727b545 | 2013-08-08 16:28:41 -0700 | [diff] [blame] | 131 | post_code(POST_RESUME_FAILURE); |
Elyes HAOUAS | 3cd4327 | 2020-03-05 22:01:17 +0100 | [diff] [blame] | 132 | printk(BIOS_DEBUG, "Giving up in %s: No MRC data\n", __func__); |
Elyes HAOUAS | 82d4642 | 2019-04-28 18:01:48 +0200 | [diff] [blame] | 133 | system_reset(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | /* Pass console handler in pei_data */ |
Kyösti Mälkki | 657e0be | 2014-02-04 19:03:57 +0200 | [diff] [blame] | 137 | pei_data->tx_byte = do_putchar; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 138 | |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 139 | /* |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 140 | * Locate and call UEFI System Agent binary. The binary needs to be at a fixed offset |
| 141 | * in the flash and can therefore only reside in the COREBOOT fmap region. |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 142 | */ |
| 143 | if (cbfs_locate_file_in_region(&f, "COREBOOT", "mrc.bin", &type) < 0) |
| 144 | die("mrc.bin not found!"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 145 | |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 146 | /* We don't care about leaking the mapping */ |
| 147 | entry = (unsigned long)rdev_mmap_full(&f.data); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 148 | if (entry) { |
| 149 | int rv; |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 150 | asm volatile ("call *%%ecx\n\t" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 151 | :"=a" (rv) : "c" (entry), "a" (pei_data)); |
Iru Cai | 3364203 | 2019-06-11 14:24:43 +0800 | [diff] [blame] | 152 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 153 | /* The mrc.bin reconfigures USB, so usbdebug needs to be reinitialized */ |
Iru Cai | 3364203 | 2019-06-11 14:24:43 +0800 | [diff] [blame] | 154 | if (CONFIG(USBDEBUG_IN_PRE_RAM)) |
| 155 | usbdebug_hw_init(true); |
| 156 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 157 | if (rv) { |
| 158 | switch (rv) { |
| 159 | case -1: |
| 160 | printk(BIOS_ERR, "PEI version mismatch.\n"); |
| 161 | break; |
| 162 | case -2: |
| 163 | printk(BIOS_ERR, "Invalid memory frequency.\n"); |
| 164 | break; |
| 165 | default: |
| 166 | printk(BIOS_ERR, "MRC returned %x.\n", rv); |
| 167 | } |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 168 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 169 | "Nonzero MRC return value.\n"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 170 | } |
| 171 | } else { |
| 172 | die("UEFI PEI System Agent not found.\n"); |
| 173 | } |
| 174 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 175 | /* For reference, print the System Agent version after executing the UEFI PEI stage */ |
| 176 | u32 version = MCHBAR32(MRC_REVISION); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 177 | printk(BIOS_DEBUG, "System Agent Version %d.%d.%d Build %d\n", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 178 | (version >> 24) & 0xff, (version >> 16) & 0xff, |
| 179 | (version >> 8) & 0xff, (version >> 0) & 0xff); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 180 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 181 | report_memory_config(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 182 | } |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 183 | |
| 184 | void setup_sdram_meminfo(struct pei_data *pei_data) |
| 185 | { |
Elyes HAOUAS | ce83f31 | 2019-05-20 18:31:38 +0200 | [diff] [blame] | 186 | u32 addr_decode_ch[2]; |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 187 | struct memory_info *mem_info; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 188 | struct dimm_info *dimm; |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 189 | int ddr_frequency, dimm_size, ch, d_num; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 190 | int dimm_cnt = 0; |
| 191 | |
| 192 | mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info)); |
Nico Huber | acac02d | 2017-06-20 14:49:04 +0200 | [diff] [blame] | 193 | if (!mem_info) |
| 194 | die("Failed to add memory info to CBMEM.\n"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 195 | |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 196 | memset(mem_info, 0, sizeof(struct memory_info)); |
| 197 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 198 | /* FIXME: Do we need to read MCHBAR32(MAD_CHNL) ? (Answer: Nope) */ |
| 199 | MCHBAR32(MAD_CHNL); |
| 200 | addr_decode_ch[0] = MCHBAR32(MAD_DIMM_CH0); |
| 201 | addr_decode_ch[1] = MCHBAR32(MAD_DIMM_CH1); |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 202 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 203 | ddr_frequency = (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 204 | |
| 205 | for (ch = 0; ch < ARRAY_SIZE(addr_decode_ch); ch++) { |
| 206 | u32 ch_conf = addr_decode_ch[ch]; |
| 207 | /* DIMMs A/B */ |
| 208 | for (d_num = 0; d_num < 2; d_num++) { |
| 209 | dimm_size = ((ch_conf >> (d_num * 8)) & 0xff) * 256; |
| 210 | if (dimm_size) { |
| 211 | dimm = &mem_info->dimm[dimm_cnt]; |
| 212 | dimm->dimm_size = dimm_size; |
| 213 | dimm->ddr_type = MEMORY_TYPE_DDR3; |
| 214 | dimm->ddr_frequency = ddr_frequency; |
| 215 | dimm->rank_per_dimm = 1 + ((ch_conf >> (17 + d_num)) & 1); |
| 216 | dimm->channel_num = ch; |
| 217 | dimm->dimm_num = d_num; |
| 218 | dimm->bank_locator = ch * 2; |
| 219 | memcpy(dimm->serial, |
| 220 | &pei_data->spd_data[dimm_cnt][SPD_DIMM_SERIAL_NUM], |
| 221 | SPD_DIMM_SERIAL_LEN); |
| 222 | memcpy(dimm->module_part_number, |
| 223 | &pei_data->spd_data[dimm_cnt][SPD_DIMM_PART_NUM], |
| 224 | SPD_DIMM_PART_LEN); |
| 225 | dimm->mod_id = |
| 226 | (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID2] << 8) | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 227 | (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID1] & 0xff); |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 228 | dimm->mod_type = SPD_SODIMM; |
| 229 | dimm->bus_width = 0x3; /* 64-bit */ |
| 230 | dimm_cnt++; |
| 231 | } |
| 232 | } |
| 233 | } |
| 234 | mem_info->dimm_cnt = dimm_cnt; |
| 235 | } |