Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 2 | # IGD Displays |
Nico Huber | b0b25c8 | 2020-03-21 20:35:12 +0100 | [diff] [blame] | 3 | register "gfx" = "GMA_STATIC_DISPLAYS(1)" |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 4 | |
| 5 | # Enable DisplayPort Hotplug with 6ms pulse |
| 6 | register "gpu_dp_d_hotplug" = "0x06" |
| 7 | |
| 8 | # Enable Panel as LVDS and configure power delays |
Angel Pons | dc0c081 | 2020-09-02 19:17:30 +0200 | [diff] [blame] | 9 | register "gpu_panel_port_select" = "PANEL_PORT_LVDS" |
Nicolas Reinecke | de72d43 | 2014-10-17 13:01:02 +0200 | [diff] [blame] | 10 | register "gpu_panel_power_cycle_delay" = "5" |
| 11 | register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms |
| 12 | register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms |
| 13 | register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms |
| 14 | register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms |
Nicolas Reinecke | de72d43 | 2014-10-17 13:01:02 +0200 | [diff] [blame] | 15 | register "gpu_cpu_backlight" = "0x1155" |
| 16 | register "gpu_pch_backlight" = "0x06100610" |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 17 | |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 18 | device domain 0 on |
Peter Lemenkov | a0c9759 | 2019-11-27 15:15:27 +0100 | [diff] [blame] | 19 | subsystemid 0x17aa 0x21cf inherit |
| 20 | |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 21 | device pci 00.0 on end # host bridge |
Nicolas Reinecke | 6ccc346 | 2014-08-23 01:06:33 +0200 | [diff] [blame] | 22 | device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M] |
Peter Lemenkov | a0c9759 | 2019-11-27 15:15:27 +0100 | [diff] [blame] | 23 | device pci 02.0 on |
| 24 | subsystemid 0x17aa 0x21d1 |
| 25 | end # vga controller |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 26 | |
| 27 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 28 | # GPI routing |
| 29 | # 0 No effect (default) |
| 30 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 31 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 32 | register "alt_gp_smi_en" = "0x0000" |
| 33 | register "gpi1_routing" = "2" |
Nicolas Reinecke | b0922f0 | 2015-02-01 02:53:35 +0100 | [diff] [blame] | 34 | register "gpi13_routing" = "2" |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 35 | |
Nicolas Reinecke | 6ccc346 | 2014-08-23 01:06:33 +0200 | [diff] [blame] | 36 | # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock) |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 37 | register "sata_port_map" = "0x1f" |
| 38 | # Set max SATA speed to 6.0 Gb/s |
| 39 | register "sata_interface_speed_support" = "0x3" |
| 40 | |
| 41 | register "gen1_dec" = "0x7c1601" |
| 42 | register "gen2_dec" = "0x0c15e1" |
| 43 | register "gen4_dec" = "0x0c06a1" |
| 44 | |
| 45 | # Enable zero-based linear PCIe root port functions |
Angel Pons | af4bd56 | 2021-12-28 13:05:56 +0100 | [diff] [blame] | 46 | register "pcie_port_coalesce" = "true" |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 47 | |
Vladimir Serbinenko | 36fa5b8 | 2014-10-28 23:43:20 +0100 | [diff] [blame] | 48 | register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }" |
| 49 | |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 50 | register "spi_uvscc" = "0x2005" |
| 51 | register "spi_lvscc" = "0x2005" |
| 52 | |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 53 | device pci 16.0 on end # Management Engine Interface 1 |
| 54 | device pci 16.1 off end |
| 55 | device pci 16.2 off end |
| 56 | device pci 16.3 off end |
Peter Lemenkov | a0c9759 | 2019-11-27 15:15:27 +0100 | [diff] [blame] | 57 | device pci 19.0 on # Intel Gigabit Ethernet |
| 58 | subsystemid 0x17aa 0x21ce |
| 59 | end |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 60 | device pci 1a.0 on end # USB2 EHCI #2 |
| 61 | device pci 1b.0 on end # High Definition Audio |
Nicolas Reinecke | 6ccc346 | 2014-08-23 01:06:33 +0200 | [diff] [blame] | 62 | device pci 1c.0 off end # PCIe Port #1 |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 63 | device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN |
Nicolas Reinecke | 6ccc346 | 2014-08-23 01:06:33 +0200 | [diff] [blame] | 64 | device pci 1c.2 off end # PCIe Port #3 |
Patrick Rudolph | 0521632 | 2019-04-12 16:14:27 +0200 | [diff] [blame] | 65 | device pci 1c.3 on |
| 66 | smbios_slot_desc "7" "3" "ExpressCard Slot" "8" |
| 67 | end # PCIe Port #4 Express Card |
Nicolas Reinecke | 6ccc346 | 2014-08-23 01:06:33 +0200 | [diff] [blame] | 68 | device pci 1c.4 on end # PCIe Port #5 MMC/SDXC + IEEE1394 |
| 69 | device pci 1c.5 off end # PCIe Port #6 Intel Ethernet PHY |
Peter Lemenkov | 02b29b9 | 2019-11-27 15:33:21 +0100 | [diff] [blame] | 70 | device pci 1c.6 off end # PCIe Port #7 |
Nicolas Reinecke | 6ccc346 | 2014-08-23 01:06:33 +0200 | [diff] [blame] | 71 | device pci 1c.7 off end # PCIe Port #8 |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 72 | device pci 1d.0 on end # USB2 EHCI #1 |
Angel Pons | 9ed576f | 2023-01-12 15:51:17 +0100 | [diff] [blame^] | 73 | device pci 1e.0 off end # PCI-2-PCI bridge |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 74 | device pci 1f.0 on #LPC bridge |
| 75 | chip ec/lenovo/pmh7 |
Peter Lemenkov | a0c9759 | 2019-11-27 15:15:27 +0100 | [diff] [blame] | 76 | device pnp ff.1 on end # dummy |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 77 | register "backlight_enable" = "0x01" |
| 78 | register "dock_event_enable" = "0x01" |
| 79 | end |
| 80 | |
Philipp Deppenwiese | 3d02b9c | 2015-06-03 23:09:36 +0200 | [diff] [blame] | 81 | chip drivers/pc80/tpm |
| 82 | device pnp 0c31.0 on end |
| 83 | end |
| 84 | |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 85 | chip ec/lenovo/h8 |
| 86 | device pnp ff.2 on # dummy |
| 87 | io 0x60 = 0x62 |
| 88 | io 0x62 = 0x66 |
| 89 | io 0x64 = 0x1600 |
| 90 | io 0x66 = 0x1604 |
| 91 | end |
| 92 | |
| 93 | register "config0" = "0xa7" |
| 94 | register "config1" = "0x09" |
| 95 | register "config2" = "0xa0" |
| 96 | register "config3" = "0xc2" |
| 97 | |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 98 | register "beepmask0" = "0x00" |
| 99 | register "beepmask1" = "0x86" |
| 100 | register "has_power_management_beeps" = "0" |
| 101 | register "event2_enable" = "0xff" |
| 102 | register "event3_enable" = "0xff" |
| 103 | register "event4_enable" = "0xd0" |
| 104 | register "event5_enable" = "0xfc" |
| 105 | register "event6_enable" = "0x00" |
| 106 | register "event7_enable" = "0x01" |
| 107 | register "event8_enable" = "0x7b" |
| 108 | register "event9_enable" = "0xff" |
| 109 | register "eventa_enable" = "0x01" |
| 110 | register "eventb_enable" = "0x00" |
| 111 | register "eventc_enable" = "0xff" |
| 112 | register "eventd_enable" = "0xff" |
| 113 | register "evente_enable" = "0x0d" |
Patrick Rudolph | b77eec8 | 2017-05-21 09:20:39 +0200 | [diff] [blame] | 114 | |
| 115 | register "has_bdc_detection" = "1" |
| 116 | register "bdc_gpio_num" = "54" |
| 117 | register "bdc_gpio_lvl" = "0" |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 118 | end |
Patrick Rudolph | db27e338 | 2017-07-27 18:00:59 +0200 | [diff] [blame] | 119 | chip drivers/lenovo/hybrid_graphics |
| 120 | device pnp ff.f on end # dummy |
| 121 | |
| 122 | register "detect_gpio" = "21" |
| 123 | |
| 124 | register "has_panel_hybrid_gpio" = "1" |
| 125 | register "panel_hybrid_gpio" = "52" |
| 126 | register "panel_integrated_lvl" = "1" |
| 127 | |
| 128 | register "has_backlight_gpio" = "0" |
| 129 | register "has_dgpu_power_gpio" = "0" |
| 130 | |
| 131 | register "has_thinker1" = "1" |
| 132 | end |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 133 | end # LPC bridge |
| 134 | device pci 1f.2 on end # SATA Controller 1 |
| 135 | device pci 1f.3 on # SMBUS controller |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 136 | # eeprom, 8 virtual devices, same chip |
Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 137 | chip drivers/i2c/at24rf08c |
| 138 | device i2c 54 on end |
| 139 | device i2c 55 on end |
| 140 | device i2c 56 on end |
| 141 | device i2c 57 on end |
| 142 | device i2c 5c on end |
| 143 | device i2c 5d on end |
| 144 | device i2c 5e on end |
| 145 | device i2c 5f on end |
| 146 | end |
| 147 | end # SMBus |
| 148 | end |
| 149 | end |
| 150 | end |