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Zaolina823f9b2014-05-06 21:31:45 +02001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Zaolina823f9b2014-05-06 21:31:45 +02005
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable Panel as LVDS and configure power delays
10 register "gpu_panel_port_select" = "0" # LVDS
Nicolas Reineckede72d432014-10-17 13:01:02 +020011 register "gpu_panel_power_cycle_delay" = "5"
12 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
13 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
14 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
15 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
16 register "gfx.use_spread_spectrum_clock" = "1"
17 register "gfx.lvds_dual_channel" = "1"
18 register "gfx.link_frequency_270_mhz" = "1"
19 register "gfx.lvds_num_lanes" = "4"
20 register "gpu_cpu_backlight" = "0x1155"
21 register "gpu_pch_backlight" = "0x06100610"
Zaolina823f9b2014-05-06 21:31:45 +020022
23 device cpu_cluster 0 on
24 chip cpu/intel/socket_rPGA988B
25 device lapic 0 on end
26 end
27 chip cpu/intel/model_206ax
28 # Magic APIC ID to locate this chip
29 device lapic 0xACAC off end
30
Zaolina823f9b2014-05-06 21:31:45 +020031 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
32 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
33 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
34
35 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
36 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
37 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
38 end
39 end
40
41 device domain 0 on
42 device pci 00.0 on end # host bridge
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020043 device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
Zaolina823f9b2014-05-06 21:31:45 +020044 device pci 02.0 on end # vga controller
45
46 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Zaolina823f9b2014-05-06 21:31:45 +020047 # GPI routing
48 # 0 No effect (default)
49 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
50 # 2 SCI (if corresponding GPIO_EN bit is also set)
51 register "alt_gp_smi_en" = "0x0000"
52 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010053 register "gpi13_routing" = "2"
Zaolina823f9b2014-05-06 21:31:45 +020054
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020055 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
Zaolina823f9b2014-05-06 21:31:45 +020056 register "sata_port_map" = "0x1f"
57 # Set max SATA speed to 6.0 Gb/s
58 register "sata_interface_speed_support" = "0x3"
59
60 register "gen1_dec" = "0x7c1601"
61 register "gen2_dec" = "0x0c15e1"
62 register "gen4_dec" = "0x0c06a1"
63
64 # Enable zero-based linear PCIe root port functions
65 register "pcie_port_coalesce" = "1"
66
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020067 register "c2_latency" = "101" # c2 not supported
68 register "p_cnt_throttling_supported" = "1"
69
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010070 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
71
Zaolina823f9b2014-05-06 21:31:45 +020072 device pci 16.0 on end # Management Engine Interface 1
73 device pci 16.1 off end
74 device pci 16.2 off end
75 device pci 16.3 off end
76 device pci 19.0 on end # Intel Gigabit Ethernet
77 device pci 1a.0 on end # USB2 EHCI #2
78 device pci 1b.0 on end # High Definition Audio
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020079 device pci 1c.0 off end # PCIe Port #1
Zaolina823f9b2014-05-06 21:31:45 +020080 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020081 device pci 1c.2 off end # PCIe Port #3
82 device pci 1c.3 on end # PCIe Port #4 Express Card
83 device pci 1c.4 on end # PCIe Port #5 MMC/SDXC + IEEE1394
84 device pci 1c.5 off end # PCIe Port #6 Intel Ethernet PHY
85 device pci 1c.6 off end # PCIe Port #7 USB 3.0 only W520
86 device pci 1c.7 off end # PCIe Port #8
Zaolina823f9b2014-05-06 21:31:45 +020087 device pci 1d.0 on end # USB2 EHCI #1
88 device pci 1f.0 on #LPC bridge
89 chip ec/lenovo/pmh7
90 device pnp ff.1 on # dummy
91 end
92 register "backlight_enable" = "0x01"
93 register "dock_event_enable" = "0x01"
94 end
95
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +020096 chip drivers/pc80/tpm
97 device pnp 0c31.0 on end
98 end
99
Zaolina823f9b2014-05-06 21:31:45 +0200100 chip ec/lenovo/h8
101 device pnp ff.2 on # dummy
102 io 0x60 = 0x62
103 io 0x62 = 0x66
104 io 0x64 = 0x1600
105 io 0x66 = 0x1604
106 end
107
108 register "config0" = "0xa7"
109 register "config1" = "0x09"
110 register "config2" = "0xa0"
111 register "config3" = "0xc2"
112
Zaolina823f9b2014-05-06 21:31:45 +0200113 register "beepmask0" = "0x00"
114 register "beepmask1" = "0x86"
115 register "has_power_management_beeps" = "0"
116 register "event2_enable" = "0xff"
117 register "event3_enable" = "0xff"
118 register "event4_enable" = "0xd0"
119 register "event5_enable" = "0xfc"
120 register "event6_enable" = "0x00"
121 register "event7_enable" = "0x01"
122 register "event8_enable" = "0x7b"
123 register "event9_enable" = "0xff"
124 register "eventa_enable" = "0x01"
125 register "eventb_enable" = "0x00"
126 register "eventc_enable" = "0xff"
127 register "eventd_enable" = "0xff"
128 register "evente_enable" = "0x0d"
129 end
130 end # LPC bridge
131 device pci 1f.2 on end # SATA Controller 1
132 device pci 1f.3 on # SMBUS controller
133 # eeprom, 8 virtual devices, same chip
134 chip drivers/i2c/at24rf08c
135 device i2c 54 on end
136 device i2c 55 on end
137 device i2c 56 on end
138 device i2c 57 on end
139 device i2c 5c on end
140 device i2c 5d on end
141 device i2c 5e on end
142 device i2c 5f on end
143 end
144 end # SMBus
145 end
146 end
147end