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Zaolina823f9b2014-05-06 21:31:45 +02001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Zaolina823f9b2014-05-06 21:31:45 +02005
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable Panel as LVDS and configure power delays
10 register "gpu_panel_port_select" = "0" # LVDS
Nicolas Reineckede72d432014-10-17 13:01:02 +020011 register "gpu_panel_power_cycle_delay" = "5"
12 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
13 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
14 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
15 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
16 register "gfx.use_spread_spectrum_clock" = "1"
Nicolas Reineckede72d432014-10-17 13:01:02 +020017 register "gfx.link_frequency_270_mhz" = "1"
Nicolas Reineckede72d432014-10-17 13:01:02 +020018 register "gpu_cpu_backlight" = "0x1155"
19 register "gpu_pch_backlight" = "0x06100610"
Zaolina823f9b2014-05-06 21:31:45 +020020
21 device cpu_cluster 0 on
Zaolina823f9b2014-05-06 21:31:45 +020022 chip cpu/intel/model_206ax
23 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010024 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010025 device lapic 0xacac off end
Zaolina823f9b2014-05-06 21:31:45 +020026
Zaolina823f9b2014-05-06 21:31:45 +020027 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
28 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
29 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
30
31 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
32 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
33 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
34 end
35 end
36
Patrick Rudolph266a1f72016-06-09 18:13:34 +020037 register "pci_mmio_size" = "2048"
38
Zaolina823f9b2014-05-06 21:31:45 +020039 device domain 0 on
Peter Lemenkova0c97592019-11-27 15:15:27 +010040 subsystemid 0x17aa 0x21cf inherit
41
Zaolina823f9b2014-05-06 21:31:45 +020042 device pci 00.0 on end # host bridge
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020043 device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
Peter Lemenkova0c97592019-11-27 15:15:27 +010044 device pci 02.0 on
45 subsystemid 0x17aa 0x21d1
46 end # vga controller
Zaolina823f9b2014-05-06 21:31:45 +020047
48 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Zaolina823f9b2014-05-06 21:31:45 +020049 # GPI routing
50 # 0 No effect (default)
51 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
52 # 2 SCI (if corresponding GPIO_EN bit is also set)
53 register "alt_gp_smi_en" = "0x0000"
54 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010055 register "gpi13_routing" = "2"
Zaolina823f9b2014-05-06 21:31:45 +020056
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020057 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
Zaolina823f9b2014-05-06 21:31:45 +020058 register "sata_port_map" = "0x1f"
59 # Set max SATA speed to 6.0 Gb/s
60 register "sata_interface_speed_support" = "0x3"
61
62 register "gen1_dec" = "0x7c1601"
63 register "gen2_dec" = "0x0c15e1"
64 register "gen4_dec" = "0x0c06a1"
65
66 # Enable zero-based linear PCIe root port functions
67 register "pcie_port_coalesce" = "1"
68
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020069 register "c2_latency" = "101" # c2 not supported
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020070
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010071 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
72
Patrick Rudolphc670a412017-04-28 17:28:32 +020073 register "spi_uvscc" = "0x2005"
74 register "spi_lvscc" = "0x2005"
75
Zaolina823f9b2014-05-06 21:31:45 +020076 device pci 16.0 on end # Management Engine Interface 1
77 device pci 16.1 off end
78 device pci 16.2 off end
79 device pci 16.3 off end
Peter Lemenkova0c97592019-11-27 15:15:27 +010080 device pci 19.0 on # Intel Gigabit Ethernet
81 subsystemid 0x17aa 0x21ce
82 end
Zaolina823f9b2014-05-06 21:31:45 +020083 device pci 1a.0 on end # USB2 EHCI #2
84 device pci 1b.0 on end # High Definition Audio
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020085 device pci 1c.0 off end # PCIe Port #1
Zaolina823f9b2014-05-06 21:31:45 +020086 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020087 device pci 1c.2 off end # PCIe Port #3
Patrick Rudolph05216322019-04-12 16:14:27 +020088 device pci 1c.3 on
89 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
90 end # PCIe Port #4 Express Card
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020091 device pci 1c.4 on end # PCIe Port #5 MMC/SDXC + IEEE1394
92 device pci 1c.5 off end # PCIe Port #6 Intel Ethernet PHY
Peter Lemenkov02b29b92019-11-27 15:33:21 +010093 device pci 1c.6 off end # PCIe Port #7
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020094 device pci 1c.7 off end # PCIe Port #8
Zaolina823f9b2014-05-06 21:31:45 +020095 device pci 1d.0 on end # USB2 EHCI #1
Peter Lemenkova0c97592019-11-27 15:15:27 +010096
Zaolina823f9b2014-05-06 21:31:45 +020097 device pci 1f.0 on #LPC bridge
98 chip ec/lenovo/pmh7
Peter Lemenkova0c97592019-11-27 15:15:27 +010099 device pnp ff.1 on end # dummy
Zaolina823f9b2014-05-06 21:31:45 +0200100 register "backlight_enable" = "0x01"
101 register "dock_event_enable" = "0x01"
102 end
103
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +0200104 chip drivers/pc80/tpm
105 device pnp 0c31.0 on end
106 end
107
Zaolina823f9b2014-05-06 21:31:45 +0200108 chip ec/lenovo/h8
109 device pnp ff.2 on # dummy
110 io 0x60 = 0x62
111 io 0x62 = 0x66
112 io 0x64 = 0x1600
113 io 0x66 = 0x1604
114 end
115
116 register "config0" = "0xa7"
117 register "config1" = "0x09"
118 register "config2" = "0xa0"
119 register "config3" = "0xc2"
120
Zaolina823f9b2014-05-06 21:31:45 +0200121 register "beepmask0" = "0x00"
122 register "beepmask1" = "0x86"
123 register "has_power_management_beeps" = "0"
124 register "event2_enable" = "0xff"
125 register "event3_enable" = "0xff"
126 register "event4_enable" = "0xd0"
127 register "event5_enable" = "0xfc"
128 register "event6_enable" = "0x00"
129 register "event7_enable" = "0x01"
130 register "event8_enable" = "0x7b"
131 register "event9_enable" = "0xff"
132 register "eventa_enable" = "0x01"
133 register "eventb_enable" = "0x00"
134 register "eventc_enable" = "0xff"
135 register "eventd_enable" = "0xff"
136 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200137
138 register "has_bdc_detection" = "1"
139 register "bdc_gpio_num" = "54"
140 register "bdc_gpio_lvl" = "0"
Zaolina823f9b2014-05-06 21:31:45 +0200141 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200142 chip drivers/lenovo/hybrid_graphics
143 device pnp ff.f on end # dummy
144
145 register "detect_gpio" = "21"
146
147 register "has_panel_hybrid_gpio" = "1"
148 register "panel_hybrid_gpio" = "52"
149 register "panel_integrated_lvl" = "1"
150
151 register "has_backlight_gpio" = "0"
152 register "has_dgpu_power_gpio" = "0"
153
154 register "has_thinker1" = "1"
155 end
Zaolina823f9b2014-05-06 21:31:45 +0200156 end # LPC bridge
157 device pci 1f.2 on end # SATA Controller 1
158 device pci 1f.3 on # SMBUS controller
Elyes HAOUASb0f19882018-06-09 11:59:00 +0200159 # eeprom, 8 virtual devices, same chip
Zaolina823f9b2014-05-06 21:31:45 +0200160 chip drivers/i2c/at24rf08c
161 device i2c 54 on end
162 device i2c 55 on end
163 device i2c 56 on end
164 device i2c 57 on end
165 device i2c 5c on end
166 device i2c 5d on end
167 device i2c 5e on end
168 device i2c 5f on end
169 end
170 end # SMBus
171 end
172 end
173end