Elyes HAOUAS | 674ad92 | 2020-05-09 13:21:47 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 2 | |
| 3 | chip northbridge/intel/x4x # Northbridge |
Arthur Heymans | 1eecb8c | 2022-11-07 10:04:56 +0100 | [diff] [blame] | 4 | device cpu_cluster 0 on |
| 5 | ops x4x_cpu_bus_ops # APIC cluster |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 6 | chip cpu/intel/socket_LGA775 |
| 7 | device lapic 0 on end |
| 8 | end |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 9 | end |
Arthur Heymans | 1eecb8c | 2022-11-07 10:04:56 +0100 | [diff] [blame] | 10 | device domain 0 on |
| 11 | ops x4x_pci_domain_ops # PCI domain |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 12 | device pci 0.0 on end # Host Bridge |
| 13 | device pci 1.0 on end # PEG |
| 14 | device pci 2.0 on end # Integrated graphics controller |
Angel Pons | 7a61c6c | 2020-01-01 19:13:53 +0100 | [diff] [blame] | 15 | chip southbridge/intel/i82801gx # Southbridge |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 16 | register "pirqa_routing" = "0x0b" |
| 17 | register "pirqb_routing" = "0x0b" |
| 18 | register "pirqc_routing" = "0x0b" |
| 19 | register "pirqd_routing" = "0x0b" |
| 20 | register "pirqe_routing" = "0x80" |
| 21 | register "pirqf_routing" = "0x80" |
| 22 | register "pirqg_routing" = "0x80" |
| 23 | register "pirqh_routing" = "0x0b" |
| 24 | # GPI routing |
| 25 | # 0 No effect (default) |
| 26 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 27 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 28 | |
Elyes Haouas | dc3beea | 2022-11-29 17:36:51 +0100 | [diff] [blame] | 29 | register "ide_enable_primary" = "true" |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 30 | register "gpe0_en" = "0x04000440" |
| 31 | |
Arthur Heymans | fecf777 | 2019-11-09 14:19:04 +0100 | [diff] [blame] | 32 | register "gen1_dec" = "0x00000295" # HWM |
| 33 | |
Angel Pons | c69c8dd | 2018-06-13 14:13:15 +0200 | [diff] [blame] | 34 | device pci 1b.0 on end # Audio |
| 35 | device pci 1c.0 on end # PCIe 1: PCIe x1 slot |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 36 | device pci 1c.1 on # PCIe 2: NIC |
Angel Pons | 7a61c6c | 2020-01-01 19:13:53 +0100 | [diff] [blame] | 37 | device pci 00.0 on end |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 38 | end |
| 39 | device pci 1c.2 off end # PCIe 3 |
| 40 | device pci 1c.3 off end # PCIe 4 |
Angel Pons | c69c8dd | 2018-06-13 14:13:15 +0200 | [diff] [blame] | 41 | device pci 1d.0 on end # USB |
| 42 | device pci 1d.1 on end # USB |
| 43 | device pci 1d.2 on end # USB |
| 44 | device pci 1d.3 on end # USB |
| 45 | device pci 1d.7 on end # USB |
| 46 | device pci 1e.0 on end # PCI bridge |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 47 | device pci 1e.2 off end # AC'97 Audio Controller |
| 48 | device pci 1e.3 off end # AC'97 Modem Controller |
Angel Pons | c69c8dd | 2018-06-13 14:13:15 +0200 | [diff] [blame] | 49 | device pci 1f.0 on end # ISA bridge |
| 50 | device pci 1f.1 on end # PATA/IDE |
| 51 | device pci 1f.2 on end # SATA |
| 52 | device pci 1f.3 on end # SMbus |
Arthur Heymans | 3534c1e | 2018-12-16 17:17:13 +0100 | [diff] [blame] | 53 | end |
| 54 | end |
| 55 | end |