Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * ACPI - create the Fixed ACPI Description Tables (FADT) |
| 5 | */ |
| 6 | |
| 7 | #include <string.h> |
| 8 | #include <console/console.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 9 | #include <acpi/acpi.h> |
| 10 | #include <acpi/acpigen.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 11 | #include <device/pci_ops.h> |
Marc Jones | 5ebc865 | 2017-06-19 23:34:04 -0600 | [diff] [blame] | 12 | #include <arch/ioapic.h> |
Felix Held | 69a957f | 2021-06-17 15:48:25 +0200 | [diff] [blame] | 13 | #include <arch/smp/mpspec.h> |
Marshall Dawson | e9b862e | 2017-09-22 15:14:46 -0600 | [diff] [blame] | 14 | #include <cpu/x86/smm.h> |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 15 | #include <device/device.h> |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 16 | #include <device/pci.h> |
Marshall Dawson | 69486ca | 2019-05-02 12:03:45 -0600 | [diff] [blame] | 17 | #include <amdblocks/acpimmio.h> |
Marshall Dawson | 4ee83b2 | 2019-05-03 11:44:22 -0600 | [diff] [blame] | 18 | #include <amdblocks/acpi.h> |
Felix Held | 604ffa6 | 2021-02-12 00:43:20 +0100 | [diff] [blame] | 19 | #include <amdblocks/ioapic.h> |
Marc Jones | 257db58 | 2017-06-18 17:33:30 -0600 | [diff] [blame] | 20 | #include <soc/acpi.h> |
Chris Ching | 6a35fab | 2017-10-19 11:45:30 -0600 | [diff] [blame] | 21 | #include <soc/pci_devs.h> |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 22 | #include <soc/southbridge.h> |
Patrick Georgi | 4fbefc5 | 2018-10-23 14:35:37 +0200 | [diff] [blame] | 23 | #include <soc/northbridge.h> |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 24 | #include <soc/gpio.h> |
Elyes HAOUAS | 26071aa | 2019-02-15 08:21:33 +0100 | [diff] [blame] | 25 | #include <version.h> |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 26 | |
Marc Jones | 5ebc865 | 2017-06-19 23:34:04 -0600 | [diff] [blame] | 27 | unsigned long acpi_fill_madt(unsigned long current) |
| 28 | { |
| 29 | /* create all subtables for processors */ |
| 30 | current = acpi_create_madt_lapics(current); |
| 31 | |
| 32 | /* Write Kern IOAPIC, only one */ |
| 33 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, |
Felix Held | 604ffa6 | 2021-02-12 00:43:20 +0100 | [diff] [blame] | 34 | FCH_IOAPIC_ID, IO_APIC_ADDR, 0); |
Marc Jones | 5ebc865 | 2017-06-19 23:34:04 -0600 | [diff] [blame] | 35 | |
| 36 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, |
Felix Held | 604ffa6 | 2021-02-12 00:43:20 +0100 | [diff] [blame] | 37 | GNB_IOAPIC_ID, IO_APIC2_ADDR, 24); |
Marc Jones | 5ebc865 | 2017-06-19 23:34:04 -0600 | [diff] [blame] | 38 | |
Felix Held | 69a957f | 2021-06-17 15:48:25 +0200 | [diff] [blame] | 39 | /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ |
| 40 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, |
| 41 | MP_BUS_ISA, 0, 2, |
| 42 | MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); |
| 43 | /* SCI IRQ type override */ |
| 44 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, |
| 45 | MP_BUS_ISA, 9, 9, |
| 46 | MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); |
Marc Jones | 5ebc865 | 2017-06-19 23:34:04 -0600 | [diff] [blame] | 47 | |
| 48 | /* create all subtables for processors */ |
| 49 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, |
Felix Held | 69a957f | 2021-06-17 15:48:25 +0200 | [diff] [blame] | 50 | ACPI_MADT_LAPIC_NMI_ALL_PROCESSORS, |
| 51 | MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, |
| 52 | 1 /* 1: LINT1 connect to NMI */); |
Marc Jones | 5ebc865 | 2017-06-19 23:34:04 -0600 | [diff] [blame] | 53 | |
| 54 | return current; |
| 55 | } |
| 56 | |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 57 | /* |
| 58 | * Reference section 5.2.9 Fixed ACPI Description Table (FADT) |
| 59 | * in the ACPI 3.0b specification. |
| 60 | */ |
Kyösti Mälkki | 61ef71b | 2020-05-30 18:54:39 +0300 | [diff] [blame] | 61 | void acpi_fill_fadt(acpi_fadt_t *fadt) |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 62 | { |
Felix Held | 2f8228d | 2021-02-05 01:03:45 +0100 | [diff] [blame] | 63 | printk(BIOS_DEBUG, "pm_base: 0x%04x\n", ACPI_IO_BASE); |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 64 | |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 65 | fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 66 | |
Kyösti Mälkki | 0a9e72e | 2019-08-11 01:22:28 +0300 | [diff] [blame] | 67 | if (permanent_smi_handler()) { |
Marshall Dawson | e9b862e | 2017-09-22 15:14:46 -0600 | [diff] [blame] | 68 | fadt->smi_cmd = APM_CNT; |
| 69 | fadt->acpi_enable = APM_CNT_ACPI_ENABLE; |
| 70 | fadt->acpi_disable = APM_CNT_ACPI_DISABLE; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 74 | fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 75 | fadt->pm_tmr_blk = ACPI_PM_TMR_BLK; |
| 76 | fadt->gpe0_blk = ACPI_GPE0_BLK; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 77 | |
| 78 | fadt->pm1_evt_len = 4; /* 32 bits */ |
| 79 | fadt->pm1_cnt_len = 2; /* 16 bits */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 80 | fadt->pm_tmr_len = 4; /* 32 bits */ |
| 81 | fadt->gpe0_blk_len = 8; /* 64 bits */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 82 | |
| 83 | fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; |
| 84 | fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 85 | fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ |
| 86 | fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ |
Felix Held | 72b92c9 | 2021-11-18 20:41:40 +0100 | [diff] [blame^] | 87 | fadt->day_alrm = RTC_DATE_ALARM; |
Anand K Mistry | dd8e819 | 2021-05-27 14:32:29 +1000 | [diff] [blame] | 88 | fadt->mon_alrm = 0; /* Not supported */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 89 | fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ |
| 90 | fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ |
Angel Pons | a208c6c | 2020-07-13 00:02:34 +0200 | [diff] [blame] | 91 | fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 92 | ACPI_FADT_C1_SUPPORTED | |
| 93 | ACPI_FADT_SLEEP_BUTTON | |
| 94 | ACPI_FADT_S4_RTC_WAKE | |
| 95 | ACPI_FADT_32BIT_TIMER | |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 96 | ACPI_FADT_PCI_EXPRESS_WAKE | |
| 97 | ACPI_FADT_PLATFORM_CLOCK | |
| 98 | ACPI_FADT_S4_RTC_VALID | |
| 99 | ACPI_FADT_REMOTE_POWER_ON; |
| 100 | |
Elyes HAOUAS | f5b974e | 2018-11-10 20:29:08 +0100 | [diff] [blame] | 101 | fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */ |
| 102 | fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */ |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 103 | |
| 104 | fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */ |
| 105 | fadt->x_firmware_ctl_h = 0; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 106 | |
| 107 | fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 108 | fadt->x_pm1a_evt_blk.bit_width = 32; |
| 109 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
| 110 | fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
| 111 | fadt->x_pm1a_evt_blk.addrl = ACPI_PM_EVT_BLK; |
| 112 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 113 | |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 114 | fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 115 | fadt->x_pm1a_cnt_blk.bit_width = 16; |
| 116 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
Patrick Rudolph | c02bda0 | 2020-02-28 10:19:41 +0100 | [diff] [blame] | 117 | fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 118 | fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK; |
| 119 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 120 | |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 121 | fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 122 | fadt->x_pm_tmr_blk.bit_width = 32; |
| 123 | fadt->x_pm_tmr_blk.bit_offset = 0; |
| 124 | fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
| 125 | fadt->x_pm_tmr_blk.addrl = ACPI_PM_TMR_BLK; |
| 126 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 127 | |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 128 | fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 129 | fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ |
| 130 | fadt->x_gpe0_blk.bit_offset = 0; |
Angel Pons | a23aff3 | 2020-06-21 20:47:54 +0200 | [diff] [blame] | 131 | fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 132 | fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; |
| 133 | fadt->x_gpe0_blk.addrh = 0x0; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 134 | } |
Marc Jones | 257db58 | 2017-06-18 17:33:30 -0600 | [diff] [blame] | 135 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 136 | void generate_cpu_entries(const struct device *device) |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 137 | { |
Richard Spiegel | 3f16a0f | 2018-08-06 11:06:08 -0700 | [diff] [blame] | 138 | int cores, cpu; |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 139 | |
| 140 | /* Stoney Ridge is single node, just report # of cores */ |
Patrick Georgi | 4fbefc5 | 2018-10-23 14:35:37 +0200 | [diff] [blame] | 141 | cores = pci_read_config32(SOC_NB_DEV, NB_CAPABILITIES2) & CMP_CAP_MASK; |
| 142 | cores++; /* number of cores is CmpCap+1 */ |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 143 | |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 144 | printk(BIOS_DEBUG, "ACPI \\_SB report %d core(s)\n", cores); |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 145 | |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 146 | /* Generate BSP \_SB.P000 */ |
Richard Spiegel | 3f16a0f | 2018-08-06 11:06:08 -0700 | [diff] [blame] | 147 | acpigen_write_processor(0, ACPI_GPE0_BLK, 6); |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 148 | acpigen_pop_len(); |
| 149 | |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 150 | /* Generate AP \_SB.Pxxx */ |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 151 | for (cpu = 1; cpu < cores; cpu++) { |
Richard Spiegel | 3f16a0f | 2018-08-06 11:06:08 -0700 | [diff] [blame] | 152 | acpigen_write_processor(cpu, 0, 0); |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 153 | acpigen_pop_len(); |
| 154 | } |
Kyösti Mälkki | da321d8 | 2021-01-27 20:22:33 +0200 | [diff] [blame] | 155 | |
| 156 | acpigen_write_scope("\\"); |
| 157 | acpigen_write_name_integer("PCNT", cores); |
| 158 | acpigen_pop_len(); |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 159 | } |
| 160 | |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 161 | static void acpigen_soc_get_gpio_in_local5(uintptr_t addr) |
| 162 | { |
| 163 | /* |
| 164 | * Store (\_SB.GPR2 (addr), Local5) |
| 165 | * \_SB.GPR2 is used to read control byte 2 from control register. |
| 166 | * / It is defined in gpio_lib.asl. |
| 167 | */ |
| 168 | acpigen_write_store(); |
| 169 | acpigen_emit_namestring("\\_SB.GPR2"); |
| 170 | acpigen_write_integer(addr); |
| 171 | acpigen_emit_byte(LOCAL5_OP); |
| 172 | } |
| 173 | |
| 174 | static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask) |
| 175 | { |
Marshall Dawson | 251d305 | 2019-05-02 17:27:57 -0600 | [diff] [blame] | 176 | if (gpio_num >= SOC_GPIO_TOTAL_PINS) { |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 177 | printk(BIOS_WARNING, "Warning: Pin %d should be smaller than" |
Marshall Dawson | 251d305 | 2019-05-02 17:27:57 -0600 | [diff] [blame] | 178 | " %d\n", gpio_num, SOC_GPIO_TOTAL_PINS); |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 179 | return -1; |
| 180 | } |
Kyösti Mälkki | 39bd46f | 2020-06-18 19:18:21 +0300 | [diff] [blame] | 181 | uintptr_t addr = gpio_get_address(gpio_num); |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 182 | |
| 183 | acpigen_soc_get_gpio_in_local5(addr); |
| 184 | |
| 185 | /* If (And (Local5, mask)) */ |
| 186 | acpigen_write_if_and(LOCAL5_OP, mask); |
| 187 | |
| 188 | /* Store (One, Local0) */ |
| 189 | acpigen_write_store_ops(ONE_OP, LOCAL0_OP); |
| 190 | |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 191 | /* Else */ |
| 192 | acpigen_write_else(); |
| 193 | |
| 194 | /* Store (Zero, Local0) */ |
| 195 | acpigen_write_store_ops(ZERO_OP, LOCAL0_OP); |
| 196 | |
| 197 | acpigen_pop_len(); /* Else */ |
| 198 | |
| 199 | return 0; |
| 200 | } |
| 201 | |
| 202 | static int acpigen_soc_set_gpio_val(unsigned int gpio_num, uint32_t val) |
| 203 | { |
Marshall Dawson | 251d305 | 2019-05-02 17:27:57 -0600 | [diff] [blame] | 204 | if (gpio_num >= SOC_GPIO_TOTAL_PINS) { |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 205 | printk(BIOS_WARNING, "Warning: Pin %d should be smaller than" |
Marshall Dawson | 251d305 | 2019-05-02 17:27:57 -0600 | [diff] [blame] | 206 | " %d\n", gpio_num, SOC_GPIO_TOTAL_PINS); |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 207 | return -1; |
| 208 | } |
Kyösti Mälkki | 39bd46f | 2020-06-18 19:18:21 +0300 | [diff] [blame] | 209 | uintptr_t addr = gpio_get_address(gpio_num); |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 210 | |
Kevin Chiu | d837e66 | 2018-07-03 19:13:34 +0800 | [diff] [blame] | 211 | /* Store (0x40, Local0) */ |
| 212 | acpigen_write_store(); |
| 213 | acpigen_write_integer(GPIO_PIN_OUT); |
| 214 | acpigen_emit_byte(LOCAL0_OP); |
| 215 | |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 216 | acpigen_soc_get_gpio_in_local5(addr); |
| 217 | |
| 218 | if (val) { |
| 219 | /* Or (Local5, GPIO_PIN_OUT, Local5) */ |
Kevin Chiu | d837e66 | 2018-07-03 19:13:34 +0800 | [diff] [blame] | 220 | acpigen_write_or(LOCAL5_OP, LOCAL0_OP, LOCAL5_OP); |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 221 | } else { |
| 222 | /* Not (GPIO_PIN_OUT, Local6) */ |
Kevin Chiu | d837e66 | 2018-07-03 19:13:34 +0800 | [diff] [blame] | 223 | acpigen_write_not(LOCAL0_OP, LOCAL6_OP); |
Richard Spiegel | 93459d6 | 2018-05-16 14:08:33 -0700 | [diff] [blame] | 224 | |
| 225 | /* And (Local5, Local6, Local5) */ |
| 226 | acpigen_write_and(LOCAL5_OP, LOCAL6_OP, LOCAL5_OP); |
| 227 | } |
| 228 | |
| 229 | /* |
| 230 | * SB.GPW2 (addr, Local5) |
| 231 | * \_SB.GPW2 is used to write control byte in control register |
| 232 | * / byte 2. It is defined in gpio_lib.asl. |
| 233 | */ |
| 234 | acpigen_emit_namestring("\\_SB.GPW2"); |
| 235 | acpigen_write_integer(addr); |
| 236 | acpigen_emit_byte(LOCAL5_OP); |
| 237 | |
| 238 | return 0; |
| 239 | } |
| 240 | |
| 241 | int acpigen_soc_read_rx_gpio(unsigned int gpio_num) |
| 242 | { |
| 243 | return acpigen_soc_get_gpio_val(gpio_num, GPIO_PIN_IN); |
| 244 | } |
| 245 | |
| 246 | int acpigen_soc_get_tx_gpio(unsigned int gpio_num) |
| 247 | { |
| 248 | return acpigen_soc_get_gpio_val(gpio_num, GPIO_PIN_OUT); |
| 249 | } |
| 250 | |
| 251 | int acpigen_soc_set_tx_gpio(unsigned int gpio_num) |
| 252 | { |
| 253 | return acpigen_soc_set_gpio_val(gpio_num, 1); |
| 254 | } |
| 255 | |
| 256 | int acpigen_soc_clear_tx_gpio(unsigned int gpio_num) |
| 257 | { |
| 258 | return acpigen_soc_set_gpio_val(gpio_num, 0); |
| 259 | } |