Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 47bd2d9 | 2016-07-24 18:12:16 -0700 | [diff] [blame] | 4 | * Copyright (C) 2015-2016 Intel Corp. |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 5 | * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | */ |
| 12 | |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 13 | #include <cbfs.h> |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 14 | #include <cbmem.h> |
| 15 | #include <commonlib/fsp.h> |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 16 | #include <commonlib/stdlib.h> |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 17 | #include <console/console.h> |
| 18 | #include <fsp/api.h> |
| 19 | #include <fsp/util.h> |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 20 | #include <program_loading.h> |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 21 | #include <soc/intel/common/vbt.h> |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 22 | #include <stage_cache.h> |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 23 | #include <string.h> |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 24 | #include <timestamp.h> |
Elyes HAOUAS | bd1683d | 2019-05-15 21:05:37 +0200 | [diff] [blame] | 25 | #include <types.h> |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 26 | |
| 27 | struct fsp_header fsps_hdr; |
| 28 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 29 | static void do_silicon_init(struct fsp_header *hdr) |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 30 | { |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 31 | FSPS_UPD *upd, *supd; |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 32 | fsp_silicon_init_fn silicon_init; |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 33 | uint32_t status; |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 34 | uint8_t postcode; |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 35 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 36 | supd = (FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 37 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 38 | if (supd->FspUpdHeader.Signature != FSPS_UPD_SIGNATURE) |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 39 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 40 | "Invalid FSPS signature\n"); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 41 | |
Marshall Dawson | 71dbcf1 | 2019-09-11 14:02:34 -0600 | [diff] [blame^] | 42 | /* Disallow invalid config regions. Default settings are likely bad |
| 43 | * choices for coreboot, and different sized UPD from what the region |
| 44 | * allows is potentially a build problem. |
| 45 | */ |
| 46 | if (!hdr->cfg_region_size || hdr->cfg_region_size != sizeof(FSPS_UPD)) |
| 47 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 48 | "Invalid FSPS UPD region\n"); |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 49 | |
Marshall Dawson | 71dbcf1 | 2019-09-11 14:02:34 -0600 | [diff] [blame^] | 50 | upd = xmalloc(hdr->cfg_region_size); |
| 51 | |
| 52 | memcpy(upd, supd, hdr->cfg_region_size); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 53 | |
| 54 | /* Give SoC/mainboard a chance to populate entries */ |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 55 | platform_fsp_silicon_init_params_cb(upd); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 56 | |
Lee Leahy | 672df16 | 2016-07-24 18:21:13 -0700 | [diff] [blame] | 57 | /* Call SiliconInit */ |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 58 | silicon_init = (void *) (hdr->image_base + |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 59 | hdr->silicon_init_entry_offset); |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 60 | fsp_debug_before_silicon_init(silicon_init, supd, upd); |
Lee Leahy | 672df16 | 2016-07-24 18:21:13 -0700 | [diff] [blame] | 61 | |
| 62 | timestamp_add_now(TS_FSP_SILICON_INIT_START); |
| 63 | post_code(POST_FSP_SILICON_INIT); |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 64 | status = silicon_init(upd); |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 65 | timestamp_add_now(TS_FSP_SILICON_INIT_END); |
Subrata Banik | 0755ab9 | 2017-07-12 15:31:06 +0530 | [diff] [blame] | 66 | post_code(POST_FSP_SILICON_EXIT); |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 67 | |
Lee Leahy | 672df16 | 2016-07-24 18:21:13 -0700 | [diff] [blame] | 68 | fsp_debug_after_silicon_init(status); |
Aaron Durbin | 35d42c7 | 2016-07-18 12:41:09 -0500 | [diff] [blame] | 69 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 70 | /* Handle any errors returned by FspSiliconInit */ |
Aaron Durbin | 35d42c7 | 2016-07-18 12:41:09 -0500 | [diff] [blame] | 71 | fsp_handle_reset(status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 72 | if (status != FSP_SUCCESS) { |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 73 | if (vbt_get()) { |
| 74 | /* Attempted to initialize graphics. Assume failure |
| 75 | * is related to a video failure. |
| 76 | */ |
| 77 | postcode = POST_VIDEO_FAILURE; |
| 78 | } else { |
| 79 | /* Other silicon initialization failed */ |
| 80 | postcode = POST_HW_INIT_FAILURE; |
| 81 | } |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 82 | printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status); |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 83 | die_with_post_code(postcode, |
Subrata Banik | ab032b8 | 2019-05-29 13:59:14 +0530 | [diff] [blame] | 84 | "FspSiliconInit returned an error!\n"); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 85 | } |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 86 | } |
| 87 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 88 | void fsps_load(bool s3wake) |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 89 | { |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 90 | struct fsp_header *hdr = &fsps_hdr; |
| 91 | struct cbfsf file_desc; |
| 92 | struct region_device rdev; |
| 93 | const char *name = CONFIG_FSP_S_CBFS; |
| 94 | void *dest; |
| 95 | size_t size; |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 96 | struct prog fsps = PROG_INIT(PROG_REFCODE, name); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 97 | static int load_done; |
| 98 | |
| 99 | if (load_done) |
| 100 | return; |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 101 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 102 | if (s3wake && !CONFIG(NO_STAGE_CACHE)) { |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 103 | printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n"); |
| 104 | stage_cache_load_stage(STAGE_REFCODE, &fsps); |
| 105 | if (fsp_validate_component(hdr, prog_rdev(&fsps)) != CB_SUCCESS) |
| 106 | die("On resume fsps header is invalid\n"); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 107 | load_done = 1; |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 108 | return; |
| 109 | } |
| 110 | |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 111 | if (cbfs_boot_locate(&file_desc, name, NULL)) { |
| 112 | printk(BIOS_ERR, "Could not locate %s in CBFS\n", name); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 113 | die("FSPS not available!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 114 | } |
| 115 | |
| 116 | cbfs_file_data(&rdev, &file_desc); |
| 117 | |
| 118 | /* Load and relocate into CBMEM. */ |
| 119 | size = region_device_sz(&rdev); |
| 120 | dest = cbmem_add(CBMEM_ID_REFCODE, size); |
| 121 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 122 | if (dest == NULL) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 123 | die("Could not add FSPS to CBMEM!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 124 | |
| 125 | if (rdev_readat(&rdev, dest, 0, size) < 0) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 126 | die("Failed to read FSPS!\n"); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 127 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 128 | if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 129 | die("Unable to relocate FSPS!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 130 | |
| 131 | /* Create new region device in memory after relocation. */ |
| 132 | rdev_chain(&rdev, &addrspace_32bit.rdev, (uintptr_t)dest, size); |
| 133 | |
| 134 | if (fsp_validate_component(hdr, &rdev) != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 135 | die("Invalid FSPS header!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 136 | |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 137 | prog_set_area(&fsps, dest, size); |
| 138 | |
| 139 | stage_cache_add(STAGE_REFCODE, &fsps); |
| 140 | |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 141 | /* Signal that FSP component has been loaded. */ |
| 142 | prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 143 | load_done = 1; |
| 144 | } |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 145 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 146 | void fsp_silicon_init(bool s3wake) |
| 147 | { |
| 148 | fsps_load(s3wake); |
| 149 | do_silicon_init(&fsps_hdr); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 150 | } |