Angel Pons | f94ac9a | 2020-04-05 15:46:48 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 2 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 3 | #include <assert.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 4 | #include <cbfs.h> |
| 5 | #include <cbmem.h> |
Patrick Rudolph | 45022ae | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 6 | #include <cf9_reset.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 7 | #include <console/console.h> |
| 8 | #include <device/pci_def.h> |
Matt DeVillier | 9aaf59a | 2018-05-27 21:51:49 -0500 | [diff] [blame] | 9 | #include <memory_info.h> |
Aaron Durbin | decd062 | 2017-12-15 12:26:40 -0700 | [diff] [blame] | 10 | #include <mrc_cache.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 11 | #include <string.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 12 | #include <soc/iomap.h> |
| 13 | #include <soc/pei_data.h> |
| 14 | #include <soc/pei_wrapper.h> |
| 15 | #include <soc/pm.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 16 | #include <soc/romstage.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 17 | #include <soc/systemagent.h> |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 18 | #include <timestamp.h> |
Angel Pons | 6f75dd0 | 2021-04-24 10:53:19 +0200 | [diff] [blame^] | 19 | #include <types.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 20 | |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 21 | static void save_mrc_data(struct pei_data *pei_data) |
Angel Pons | d0d528a | 2021-01-20 23:09:16 +0100 | [diff] [blame] | 22 | { |
| 23 | printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", pei_data->data_to_save, |
| 24 | pei_data->data_to_save_size); |
| 25 | |
| 26 | if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0) |
| 27 | mrc_cache_stash_data(MRC_TRAINING_DATA, 0, |
| 28 | pei_data->data_to_save, |
| 29 | pei_data->data_to_save_size); |
| 30 | } |
| 31 | |
Angel Pons | 29a52c8 | 2020-10-13 23:32:55 +0200 | [diff] [blame] | 32 | static const char *const ecc_decoder[] = { |
| 33 | "inactive", |
| 34 | "active on IO", |
| 35 | "disabled on IO", |
| 36 | "active", |
| 37 | }; |
| 38 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 39 | /* |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 40 | * Dump in the log memory controller configuration as read from the memory |
| 41 | * controller registers. |
| 42 | */ |
| 43 | static void report_memory_config(void) |
| 44 | { |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 45 | int i; |
| 46 | |
Angel Pons | a8753e9 | 2021-04-17 14:34:37 +0200 | [diff] [blame] | 47 | const u32 addr_decoder_common = mchbar_read32(MAD_CHNL); |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 48 | |
| 49 | printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", |
Angel Pons | 6f75dd0 | 2021-04-24 10:53:19 +0200 | [diff] [blame^] | 50 | DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100)); |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 51 | |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 52 | printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 53 | (addr_decoder_common >> 0) & 3, |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 54 | (addr_decoder_common >> 2) & 3, |
| 55 | (addr_decoder_common >> 4) & 3); |
| 56 | |
Angel Pons | 162a737 | 2020-10-13 23:37:07 +0200 | [diff] [blame] | 57 | for (i = 0; i < NUM_CHANNELS; i++) { |
Angel Pons | a8753e9 | 2021-04-17 14:34:37 +0200 | [diff] [blame] | 58 | const u32 ch_conf = mchbar_read32(MAD_DIMM(i)); |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 59 | |
| 60 | printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf); |
Angel Pons | 29a52c8 | 2020-10-13 23:32:55 +0200 | [diff] [blame] | 61 | printk(BIOS_DEBUG, " ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]); |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 62 | printk(BIOS_DEBUG, " enhanced interleave mode %s\n", |
| 63 | ((ch_conf >> 22) & 1) ? "on" : "off"); |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 64 | |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 65 | printk(BIOS_DEBUG, " rank interleave %s\n", |
| 66 | ((ch_conf >> 21) & 1) ? "on" : "off"); |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 67 | |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 68 | printk(BIOS_DEBUG, " DIMMA %d MB width %s %s rank%s\n", |
| 69 | ((ch_conf >> 0) & 0xff) * 256, |
| 70 | ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32", |
| 71 | ((ch_conf >> 17) & 1) ? "dual" : "single", |
| 72 | ((ch_conf >> 16) & 1) ? "" : ", selected"); |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 73 | |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 74 | printk(BIOS_DEBUG, " DIMMB %d MB width %s %s rank%s\n", |
| 75 | ((ch_conf >> 8) & 0xff) * 256, |
Angel Pons | 973c9d4 | 2020-10-13 23:28:23 +0200 | [diff] [blame] | 76 | ((ch_conf >> 20) & 1) ? "x16" : "x8 or x32", |
Angel Pons | 239c966 | 2020-10-13 21:34:53 +0200 | [diff] [blame] | 77 | ((ch_conf >> 18) & 1) ? "dual" : "single", |
| 78 | ((ch_conf >> 16) & 1) ? ", selected" : ""); |
| 79 | } |
| 80 | } |
| 81 | |
| 82 | /* |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 83 | * Find PEI executable in coreboot filesystem and execute it. |
| 84 | */ |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 85 | static void sdram_initialize(struct pei_data *pei_data) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 86 | { |
Shelley Chen | ad9cd68 | 2020-07-23 16:10:52 -0700 | [diff] [blame] | 87 | size_t mrc_size; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 88 | pei_wrapper_entry_t entry; |
| 89 | int ret; |
| 90 | |
| 91 | broadwell_fill_pei_data(pei_data); |
| 92 | |
Shelley Chen | 6615c6e | 2020-10-27 15:58:31 -0700 | [diff] [blame] | 93 | /* Assume boot device is memory mapped. */ |
| 94 | assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED)); |
Shelley Chen | ad9cd68 | 2020-07-23 16:10:52 -0700 | [diff] [blame] | 95 | |
Shelley Chen | 6615c6e | 2020-10-27 15:58:31 -0700 | [diff] [blame] | 96 | pei_data->saved_data = |
| 97 | mrc_cache_current_mmap_leak(MRC_TRAINING_DATA, 0, |
| 98 | &mrc_size); |
| 99 | if (pei_data->saved_data) { |
| 100 | /* MRC cache found */ |
| 101 | pei_data->saved_data_size = mrc_size; |
| 102 | } else if (pei_data->boot_mode == ACPI_S3) { |
| 103 | /* Waking from S3 and no cache. */ |
| 104 | printk(BIOS_DEBUG, |
| 105 | "No MRC cache found in S3 resume path.\n"); |
lilacious | 40cb3fe | 2023-06-21 23:24:14 +0200 | [diff] [blame] | 106 | post_code(POSTCODE_RESUME_FAILURE); |
Shelley Chen | 6615c6e | 2020-10-27 15:58:31 -0700 | [diff] [blame] | 107 | system_reset(); |
| 108 | } else { |
| 109 | printk(BIOS_DEBUG, "No MRC cache found.\n"); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 110 | } |
| 111 | |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 112 | /* |
| 113 | * Do not use saved pei data. Can be set by mainboard romstage |
| 114 | * to force a full train of memory on every boot. |
| 115 | */ |
| 116 | if (pei_data->disable_saved_data) { |
| 117 | printk(BIOS_DEBUG, "Disabling PEI saved data by request\n"); |
| 118 | pei_data->saved_data = NULL; |
| 119 | pei_data->saved_data_size = 0; |
| 120 | } |
| 121 | |
Arthur Heymans | 4d56a06 | 2018-12-22 16:11:52 +0100 | [diff] [blame] | 122 | /* We don't care about leaking the mapping */ |
Julius Werner | 9d0cc2a | 2020-01-22 18:00:18 -0800 | [diff] [blame] | 123 | entry = cbfs_ro_map("mrc.bin", NULL); |
| 124 | if (entry == NULL) |
| 125 | die("mrc.bin not found!"); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 126 | |
| 127 | printk(BIOS_DEBUG, "Starting Memory Reference Code\n"); |
| 128 | |
| 129 | ret = entry(pei_data); |
| 130 | if (ret < 0) |
| 131 | die("pei_data version mismatch\n"); |
| 132 | |
| 133 | /* Print the MRC version after executing the UEFI PEI stage. */ |
Angel Pons | a8753e9 | 2021-04-17 14:34:37 +0200 | [diff] [blame] | 134 | u32 version = mchbar_read32(MRC_REVISION); |
Angel Pons | c1328a6 | 2021-06-14 12:43:11 +0200 | [diff] [blame] | 135 | printk(BIOS_DEBUG, "MRC Version %u.%u.%u Build %u\n", |
Angel Pons | 430f1c5 | 2020-10-13 23:01:48 +0200 | [diff] [blame] | 136 | (version >> 24) & 0xff, (version >> 16) & 0xff, |
| 137 | (version >> 8) & 0xff, (version >> 0) & 0xff); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 138 | |
| 139 | report_memory_config(); |
Angel Pons | d0d528a | 2021-01-20 23:09:16 +0100 | [diff] [blame] | 140 | } |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 141 | |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 142 | static void setup_sdram_meminfo(struct pei_data *pei_data) |
Angel Pons | d0d528a | 2021-01-20 23:09:16 +0100 | [diff] [blame] | 143 | { |
| 144 | struct memory_info *mem_info; |
Kane Chen | ebbb0d4 | 2014-07-28 10:54:40 -0700 | [diff] [blame] | 145 | |
| 146 | printk(BIOS_DEBUG, "create cbmem for dimm information\n"); |
| 147 | mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info)); |
John Zhao | 317cbd6 | 2019-05-31 10:44:46 -0700 | [diff] [blame] | 148 | |
| 149 | if (!mem_info) { |
| 150 | printk(BIOS_ERR, "Error! Failed to add mem_info to cbmem\n"); |
| 151 | return; |
| 152 | } |
| 153 | |
Matt DeVillier | 9aaf59a | 2018-05-27 21:51:49 -0500 | [diff] [blame] | 154 | memset(mem_info, 0, sizeof(*mem_info)); |
| 155 | /* Translate pei_memory_info struct data into memory_info struct */ |
| 156 | mem_info->dimm_cnt = pei_data->meminfo.dimm_cnt; |
| 157 | for (int i = 0; i < MIN(DIMM_INFO_TOTAL, PEI_DIMM_INFO_TOTAL); i++) { |
| 158 | struct dimm_info *dimm = &mem_info->dimm[i]; |
| 159 | const struct pei_dimm_info *pei_dimm = |
| 160 | &pei_data->meminfo.dimm[i]; |
| 161 | dimm->dimm_size = pei_dimm->dimm_size; |
| 162 | dimm->ddr_type = pei_dimm->ddr_type; |
| 163 | dimm->ddr_frequency = pei_dimm->ddr_frequency; |
| 164 | dimm->rank_per_dimm = pei_dimm->rank_per_dimm; |
| 165 | dimm->channel_num = pei_dimm->channel_num; |
| 166 | dimm->dimm_num = pei_dimm->dimm_num; |
| 167 | dimm->bank_locator = pei_dimm->bank_locator; |
| 168 | memcpy(&dimm->serial, &pei_dimm->serial, |
| 169 | MIN(sizeof(dimm->serial), sizeof(pei_dimm->serial))); |
| 170 | memcpy(&dimm->module_part_number, |
| 171 | &pei_dimm->module_part_number, |
| 172 | MIN(sizeof(dimm->module_part_number), |
| 173 | sizeof(pei_dimm->module_part_number))); |
| 174 | dimm->module_part_number[DIMM_INFO_PART_NUMBER_SIZE - 1] = '\0'; |
| 175 | dimm->mod_id = pei_dimm->mod_id; |
| 176 | dimm->mod_type = pei_dimm->mod_type; |
| 177 | dimm->bus_width = pei_dimm->bus_width; |
| 178 | } |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 179 | } |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 180 | |
Angel Pons | 333751b | 2021-06-23 14:39:32 +0200 | [diff] [blame] | 181 | /* |
| 182 | * 0 = leave channel enabled |
| 183 | * 1 = disable dimm 0 on channel |
| 184 | * 2 = disable dimm 1 on channel |
| 185 | * 3 = disable dimm 0+1 on channel |
| 186 | */ |
Angel Pons | 4a8cb30 | 2021-06-23 16:14:56 +0200 | [diff] [blame] | 187 | static int make_channel_disabled_mask(const struct spd_info *spdi, int ch) |
Angel Pons | 333751b | 2021-06-23 14:39:32 +0200 | [diff] [blame] | 188 | { |
Angel Pons | 4a8cb30 | 2021-06-23 16:14:56 +0200 | [diff] [blame] | 189 | return (!spdi->addresses[ch + ch] << 0) | (!spdi->addresses[ch + ch + 1] << 1); |
Angel Pons | 333751b | 2021-06-23 14:39:32 +0200 | [diff] [blame] | 190 | } |
| 191 | |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 192 | void perform_raminit(const struct chipset_power_state *const power_state) |
| 193 | { |
| 194 | const int s3resume = power_state->prev_sleep_state == ACPI_S3; |
| 195 | |
| 196 | struct pei_data pei_data = { 0 }; |
| 197 | |
| 198 | mainboard_fill_pei_data(&pei_data); |
Angel Pons | 4a8cb30 | 2021-06-23 16:14:56 +0200 | [diff] [blame] | 199 | |
Angel Pons | 865c97c | 2021-06-23 16:51:16 +0200 | [diff] [blame] | 200 | if (CONFIG(BROADWELL_LPDDR3)) { |
| 201 | const struct lpddr3_dq_dqs_map *lpddr3_map = mb_get_lpddr3_dq_dqs_map(); |
| 202 | assert(lpddr3_map); |
| 203 | memcpy(pei_data.dq_map, lpddr3_map->dq, sizeof(pei_data.dq_map)); |
| 204 | memcpy(pei_data.dqs_map, lpddr3_map->dqs, sizeof(pei_data.dqs_map)); |
| 205 | } |
| 206 | |
Angel Pons | 4a8cb30 | 2021-06-23 16:14:56 +0200 | [diff] [blame] | 207 | /* Obtain the SPD addresses from mainboard code */ |
| 208 | struct spd_info spdi = { 0 }; |
| 209 | mb_get_spd_map(&spdi); |
| 210 | |
| 211 | if (CONFIG(HAVE_SPD_IN_CBFS)) |
| 212 | copy_spd(&pei_data, &spdi); |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 213 | |
Angel Pons | 333751b | 2021-06-23 14:39:32 +0200 | [diff] [blame] | 214 | /* Calculate unimplemented DIMM slots for each channel */ |
Angel Pons | 4a8cb30 | 2021-06-23 16:14:56 +0200 | [diff] [blame] | 215 | pei_data.dimm_channel0_disabled = make_channel_disabled_mask(&spdi, 0); |
| 216 | pei_data.dimm_channel1_disabled = make_channel_disabled_mask(&spdi, 1); |
Angel Pons | 333751b | 2021-06-23 14:39:32 +0200 | [diff] [blame] | 217 | |
Angel Pons | 4a8cb30 | 2021-06-23 16:14:56 +0200 | [diff] [blame] | 218 | /* MRC expects left-aligned SMBus addresses, and 0 for memory-down */ |
| 219 | for (size_t i = 0; i < ARRAY_SIZE(spdi.addresses); i++) { |
| 220 | const uint8_t addr = spdi.addresses[i]; |
| 221 | pei_data.spd_addresses[i] = addr == SPD_MEMORY_DOWN ? 0 : addr << 1; |
Angel Pons | 333751b | 2021-06-23 14:39:32 +0200 | [diff] [blame] | 222 | } |
| 223 | |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 224 | post_code(0x32); |
| 225 | |
Jakub Czapiga | ad6157e | 2022-02-15 11:50:31 +0100 | [diff] [blame] | 226 | timestamp_add_now(TS_INITRAM_START); |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 227 | |
| 228 | pei_data.boot_mode = power_state->prev_sleep_state; |
| 229 | |
| 230 | /* Initialize RAM */ |
| 231 | sdram_initialize(&pei_data); |
| 232 | |
Jakub Czapiga | ad6157e | 2022-02-15 11:50:31 +0100 | [diff] [blame] | 233 | timestamp_add_now(TS_INITRAM_END); |
Angel Pons | dc60073 | 2021-06-23 13:11:30 +0200 | [diff] [blame] | 234 | |
| 235 | int cbmem_was_initted = !cbmem_recovery(s3resume); |
| 236 | if (s3resume && !cbmem_was_initted) { |
| 237 | /* Failed S3 resume, reset to come up cleanly */ |
| 238 | printk(BIOS_CRIT, "Failed to recover CBMEM in S3 resume.\n"); |
| 239 | system_reset(); |
| 240 | } |
| 241 | |
| 242 | save_mrc_data(&pei_data); |
| 243 | |
| 244 | setup_sdram_meminfo(&pei_data); |
| 245 | } |