broadwell: add support for smbios type17 in broadwell
This change also depends on mrc due to changes in pei_data.h
Report smbios type 17 for each memory
CQ-DEPEND=CL:210005
BUG=None
BRANCH=None
TEST=Compiles successfully
See smbios type17 in OS by dmidecode
Original-Change-Id: If83c99364726cd17c719a59ed8ac993736c63b9a
Original-Signed-off-by: Kane Chen <kane.chen@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/210399
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 6da6b4ffb3a45fdd766b88220c2adb168b3c5e10)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I39ea9ef9b342239fe26846ab0a928f6a680c21e8
Reviewed-on: http://review.coreboot.org/8956
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index 7217bb9..b8b88bc 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -46,6 +46,7 @@
void raminit(struct pei_data *pei_data)
{
const struct mrc_saved_data *cache;
+ struct memory_info* mem_info;
pei_wrapper_entry_t entry;
int ret;
@@ -124,4 +125,9 @@
if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0)
mrc_cache_stash_data(pei_data->data_to_save,
pei_data->data_to_save_size);
+
+ printk(BIOS_DEBUG, "create cbmem for dimm information\n");
+ mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info));
+ memcpy(mem_info, &pei_data->meminfo, sizeof(struct memory_info));
+
}