Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * This is a ramstage driver for the Intel Management Engine found in the |
| 5 | * 6-series chipset. It handles the required boot-time messages over the |
| 6 | * MMIO-based Management Engine Interface to tell the ME that the BIOS is |
| 7 | * finished with POST. Additional messages are defined for debug but are |
| 8 | * not used unless the console loglevel is high enough. |
| 9 | */ |
| 10 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 11 | #include <acpi/acpi.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 12 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 13 | #include <device/pci_ops.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 14 | #include <console/console.h> |
Stefan Reinauer | 24d1d4b | 2013-03-21 11:51:41 -0700 | [diff] [blame] | 15 | #include <device/device.h> |
| 16 | #include <device/pci.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 17 | #include <device/pci_ids.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 18 | #include <string.h> |
| 19 | #include <delay.h> |
| 20 | #include <elog.h> |
Elyes HAOUAS | 400f9ca | 2019-06-23 07:01:22 +0200 | [diff] [blame] | 21 | #include <stdlib.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 22 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 23 | #include "chip.h" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 24 | #include "me.h" |
| 25 | #include "pch.h" |
| 26 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 27 | #include <vendorcode/google/chromeos/chromeos.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 28 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 29 | /* Path that the BIOS should take based on ME state */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 30 | static const char *const me_bios_path_values[] = { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 31 | [ME_NORMAL_BIOS_PATH] = "Normal", |
| 32 | [ME_S3WAKE_BIOS_PATH] = "S3 Wake", |
| 33 | [ME_ERROR_BIOS_PATH] = "Error", |
| 34 | [ME_RECOVERY_BIOS_PATH] = "Recovery", |
| 35 | [ME_DISABLE_BIOS_PATH] = "Disable", |
| 36 | [ME_FIRMWARE_UPDATE_BIOS_PATH] = "Firmware Update", |
| 37 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 38 | |
| 39 | /* MMIO base address for MEI interface */ |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 40 | static u8 *mei_base_address; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 41 | |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 42 | static void mei_dump(u32 dword, int offset, const char *type) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 43 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 44 | union mei_csr csr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 45 | |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 46 | if (!CONFIG(DEBUG_INTEL_ME)) |
| 47 | return; |
| 48 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 49 | printk(BIOS_SPEW, "%-9s[%02x] : ", type, offset); |
| 50 | |
| 51 | switch (offset) { |
| 52 | case MEI_H_CSR: |
| 53 | case MEI_ME_CSR_HA: |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 54 | csr.raw = dword; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 55 | printk(BIOS_SPEW, "cbd=%u cbrp=%02u cbwp=%02u ready=%u " |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 56 | "reset=%u ig=%u is=%u ie=%u\n", csr.buffer_depth, |
| 57 | csr.buffer_read_ptr, csr.buffer_write_ptr, |
| 58 | csr.ready, csr.reset, csr.interrupt_generate, |
| 59 | csr.interrupt_status, csr.interrupt_enable); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 60 | break; |
| 61 | case MEI_ME_CB_RW: |
| 62 | case MEI_H_CB_WW: |
| 63 | printk(BIOS_SPEW, "CB: 0x%08x\n", dword); |
| 64 | break; |
| 65 | default: |
| 66 | printk(BIOS_SPEW, "0x%08x\n", offset); |
| 67 | break; |
| 68 | } |
| 69 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 70 | |
| 71 | /* |
| 72 | * ME/MEI access helpers using memcpy to avoid aliasing. |
| 73 | */ |
| 74 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 75 | static inline union mei_csr read_host_csr(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 76 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 77 | union mei_csr csr = { .raw = read32(mei_base_address + MEI_H_CSR) }; |
| 78 | mei_dump(csr.raw, MEI_H_CSR, "READ"); |
| 79 | return csr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 80 | } |
| 81 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 82 | static inline void write_host_csr(union mei_csr csr) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 83 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 84 | write32(mei_base_address + MEI_H_CSR, csr.raw); |
| 85 | mei_dump(csr.raw, MEI_H_CSR, "WRITE"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 86 | } |
| 87 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 88 | static inline union mei_csr read_me_csr(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 89 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 90 | union mei_csr csr = { .raw = read32(mei_base_address + MEI_ME_CSR_HA) }; |
| 91 | mei_dump(csr.raw, MEI_ME_CSR_HA, "READ"); |
| 92 | return csr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 93 | } |
| 94 | |
| 95 | static inline void write_cb(u32 dword) |
| 96 | { |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 97 | write32(mei_base_address + MEI_H_CB_WW, dword); |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 98 | mei_dump(dword, MEI_H_CB_WW, "WRITE"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | static inline u32 read_cb(void) |
| 102 | { |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 103 | u32 dword = read32(mei_base_address + MEI_ME_CB_RW); |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 104 | mei_dump(dword, MEI_ME_CB_RW, "READ"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 105 | return dword; |
| 106 | } |
| 107 | |
| 108 | /* Wait for ME ready bit to be asserted */ |
| 109 | static int mei_wait_for_me_ready(void) |
| 110 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 111 | union mei_csr me; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 112 | unsigned int try = ME_RETRY; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 113 | |
| 114 | while (try--) { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 115 | me = read_me_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 116 | if (me.ready) |
| 117 | return 0; |
| 118 | udelay(ME_DELAY); |
| 119 | } |
| 120 | |
| 121 | printk(BIOS_ERR, "ME: failed to become ready\n"); |
| 122 | return -1; |
| 123 | } |
| 124 | |
| 125 | static void mei_reset(void) |
| 126 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 127 | union mei_csr host; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 128 | |
| 129 | if (mei_wait_for_me_ready() < 0) |
| 130 | return; |
| 131 | |
| 132 | /* Reset host and ME circular buffers for next message */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 133 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 134 | host.reset = 1; |
| 135 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 136 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 137 | |
| 138 | if (mei_wait_for_me_ready() < 0) |
| 139 | return; |
| 140 | |
| 141 | /* Re-init and indicate host is ready */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 142 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 143 | host.interrupt_generate = 1; |
| 144 | host.ready = 1; |
| 145 | host.reset = 0; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 146 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 147 | } |
| 148 | |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 149 | static int mei_send_packet(union mei_header *mei, void *req_data) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 150 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 151 | union mei_csr host; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 152 | unsigned int ndata, n; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 153 | u32 *data; |
| 154 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 155 | /* Number of dwords to write */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 156 | ndata = mei->length >> 2; |
| 157 | |
| 158 | /* Pad non-dword aligned request message length */ |
| 159 | if (mei->length & 3) |
| 160 | ndata++; |
| 161 | if (!ndata) { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 162 | printk(BIOS_DEBUG, "ME: request has no data\n"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 163 | return -1; |
| 164 | } |
| 165 | ndata++; /* Add MEI header */ |
| 166 | |
| 167 | /* |
| 168 | * Make sure there is still room left in the circular buffer. |
| 169 | * Reset the buffer pointers if the requested message will not fit. |
| 170 | */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 171 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 172 | if ((host.buffer_depth - host.buffer_write_ptr) < ndata) { |
| 173 | printk(BIOS_ERR, "ME: circular buffer full, resetting...\n"); |
| 174 | mei_reset(); |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 175 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 176 | } |
| 177 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 178 | /* Ensure the requested length will fit in the circular buffer. */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 179 | if ((host.buffer_depth - host.buffer_write_ptr) < ndata) { |
| 180 | printk(BIOS_ERR, "ME: message (%u) too large for buffer (%u)\n", |
| 181 | ndata + 2, host.buffer_depth); |
| 182 | return -1; |
| 183 | } |
| 184 | |
| 185 | /* Write MEI header */ |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 186 | write_cb(mei->raw); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 187 | ndata--; |
| 188 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 189 | /* Write message data */ |
| 190 | data = req_data; |
| 191 | for (n = 0; n < ndata; ++n) |
| 192 | write_cb(*data++); |
| 193 | |
| 194 | /* Generate interrupt to the ME */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 195 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 196 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 197 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 198 | |
| 199 | /* Make sure ME is ready after sending request data */ |
| 200 | return mei_wait_for_me_ready(); |
| 201 | } |
| 202 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 203 | static int mei_send_data(u8 me_address, u8 host_address, |
| 204 | void *req_data, int req_bytes) |
| 205 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 206 | union mei_header header = { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 207 | .client_address = me_address, |
| 208 | .host_address = host_address, |
| 209 | }; |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 210 | union mei_csr host; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 211 | int current = 0; |
| 212 | u8 *req_ptr = req_data; |
| 213 | |
| 214 | while (!header.is_complete) { |
| 215 | int remain = req_bytes - current; |
| 216 | int buf_len; |
| 217 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 218 | host = read_host_csr(); |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 219 | buf_len = host.buffer_depth - host.buffer_write_ptr; |
| 220 | |
| 221 | if (buf_len > remain) { |
| 222 | /* Send all remaining data as final message */ |
| 223 | header.length = req_bytes - current; |
| 224 | header.is_complete = 1; |
| 225 | } else { |
| 226 | /* Send as much data as the buffer can hold */ |
| 227 | header.length = buf_len; |
| 228 | } |
| 229 | |
| 230 | mei_send_packet(&header, req_ptr); |
| 231 | |
| 232 | req_ptr += header.length; |
| 233 | current += header.length; |
| 234 | } |
| 235 | |
| 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | static int mei_send_header(u8 me_address, u8 host_address, |
| 240 | void *header, int header_len, int complete) |
| 241 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 242 | union mei_header mei = { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 243 | .client_address = me_address, |
| 244 | .host_address = host_address, |
| 245 | .length = header_len, |
| 246 | .is_complete = complete, |
| 247 | }; |
| 248 | return mei_send_packet(&mei, header); |
| 249 | } |
| 250 | |
| 251 | static int mei_recv_msg(void *header, int header_bytes, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 252 | void *rsp_data, int rsp_bytes) |
| 253 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 254 | union mei_header mei_rsp; |
| 255 | union mei_csr me, host; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 256 | unsigned int ndata, n; |
| 257 | unsigned int expected; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 258 | u32 *data; |
| 259 | |
| 260 | /* Total number of dwords to read from circular buffer */ |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 261 | expected = (rsp_bytes + sizeof(mei_rsp) + header_bytes) >> 2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 262 | if (rsp_bytes & 3) |
| 263 | expected++; |
| 264 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 265 | if (mei_wait_for_me_ready() < 0) |
| 266 | return -1; |
| 267 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 268 | /* |
| 269 | * The interrupt status bit does not appear to indicate that the |
| 270 | * message has actually been received. Instead we wait until the |
| 271 | * expected number of dwords are present in the circular buffer. |
| 272 | */ |
| 273 | for (n = ME_RETRY; n; --n) { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 274 | me = read_me_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 275 | if ((me.buffer_write_ptr - me.buffer_read_ptr) >= expected) |
| 276 | break; |
| 277 | udelay(ME_DELAY); |
| 278 | } |
| 279 | if (!n) { |
| 280 | printk(BIOS_ERR, "ME: timeout waiting for data: expected " |
| 281 | "%u, available %u\n", expected, |
| 282 | me.buffer_write_ptr - me.buffer_read_ptr); |
| 283 | return -1; |
| 284 | } |
| 285 | |
| 286 | /* Read and verify MEI response header from the ME */ |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 287 | mei_rsp.raw = read_cb(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 288 | if (!mei_rsp.is_complete) { |
| 289 | printk(BIOS_ERR, "ME: response is not complete\n"); |
| 290 | return -1; |
| 291 | } |
| 292 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 293 | /* Handle non-dword responses and expect at least the header */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 294 | ndata = mei_rsp.length >> 2; |
| 295 | if (mei_rsp.length & 3) |
| 296 | ndata++; |
| 297 | if (ndata != (expected - 1)) { |
| 298 | printk(BIOS_ERR, "ME: response is missing data %d != %d\n", |
| 299 | ndata, (expected - 1)); |
| 300 | return -1; |
| 301 | } |
| 302 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 303 | /* Read response header from the ME */ |
| 304 | data = header; |
| 305 | for (n = 0; n < (header_bytes >> 2); ++n) |
| 306 | *data++ = read_cb(); |
| 307 | ndata -= header_bytes >> 2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 308 | |
| 309 | /* Make sure caller passed a buffer with enough space */ |
| 310 | if (ndata != (rsp_bytes >> 2)) { |
| 311 | printk(BIOS_ERR, "ME: not enough room in response buffer: " |
| 312 | "%u != %u\n", ndata, rsp_bytes >> 2); |
| 313 | return -1; |
| 314 | } |
| 315 | |
| 316 | /* Read response data from the circular buffer */ |
| 317 | data = rsp_data; |
| 318 | for (n = 0; n < ndata; ++n) |
| 319 | *data++ = read_cb(); |
| 320 | |
| 321 | /* Tell the ME that we have consumed the response */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 322 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 323 | host.interrupt_status = 1; |
| 324 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 325 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 326 | |
| 327 | return mei_wait_for_me_ready(); |
| 328 | } |
| 329 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 330 | static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, |
| 331 | void *req_data, int req_bytes, |
| 332 | void *rsp_data, int rsp_bytes) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 333 | { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 334 | struct mkhi_header mkhi_rsp; |
| 335 | |
| 336 | /* Send header */ |
| 337 | if (mei_send_header(MEI_ADDRESS_MKHI, MEI_HOST_ADDRESS, |
| 338 | mkhi, sizeof(*mkhi), req_bytes ? 0 : 1) < 0) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 339 | return -1; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 340 | |
| 341 | /* Send data if available */ |
| 342 | if (req_bytes && mei_send_data(MEI_ADDRESS_MKHI, MEI_HOST_ADDRESS, |
| 343 | req_data, req_bytes) < 0) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 344 | return -1; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 345 | |
| 346 | /* Return now if no response expected */ |
| 347 | if (!rsp_bytes) |
| 348 | return 0; |
| 349 | |
| 350 | /* Read header and data */ |
| 351 | if (mei_recv_msg(&mkhi_rsp, sizeof(mkhi_rsp), |
| 352 | rsp_data, rsp_bytes) < 0) |
| 353 | return -1; |
| 354 | |
| 355 | if (!mkhi_rsp.is_response || |
| 356 | mkhi->group_id != mkhi_rsp.group_id || |
| 357 | mkhi->command != mkhi_rsp.command) { |
| 358 | printk(BIOS_ERR, "ME: invalid response, group %u ?= %u," |
| 359 | "command %u ?= %u, is_response %u\n", mkhi->group_id, |
| 360 | mkhi_rsp.group_id, mkhi->command, mkhi_rsp.command, |
| 361 | mkhi_rsp.is_response); |
| 362 | return -1; |
| 363 | } |
| 364 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 365 | return 0; |
| 366 | } |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 367 | |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 368 | static inline int mei_sendrecv_icc(struct icc_header *icc, |
| 369 | void *req_data, int req_bytes, |
| 370 | void *rsp_data, int rsp_bytes) |
| 371 | { |
| 372 | struct icc_header icc_rsp; |
| 373 | |
| 374 | /* Send header */ |
| 375 | if (mei_send_header(MEI_ADDRESS_ICC, MEI_HOST_ADDRESS, |
| 376 | icc, sizeof(*icc), req_bytes ? 0 : 1) < 0) |
| 377 | return -1; |
| 378 | |
| 379 | /* Send data if available */ |
| 380 | if (req_bytes && mei_send_data(MEI_ADDRESS_ICC, MEI_HOST_ADDRESS, |
| 381 | req_data, req_bytes) < 0) |
| 382 | return -1; |
| 383 | |
| 384 | /* Read header and data, if needed */ |
| 385 | if (rsp_bytes && mei_recv_msg(&icc_rsp, sizeof(icc_rsp), |
| 386 | rsp_data, rsp_bytes) < 0) |
| 387 | return -1; |
| 388 | |
| 389 | return 0; |
| 390 | } |
| 391 | |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 392 | /* |
| 393 | * mbp give up routine. This path is taken if hfs.mpb_rdy is 0 or the read |
| 394 | * state machine on the BIOS end doesn't match the ME's state machine. |
| 395 | */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 396 | static void intel_me_mbp_give_up(struct device *dev) |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 397 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 398 | union mei_csr csr; |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 399 | |
| 400 | pci_write_config32(dev, PCI_ME_H_GS2, PCI_ME_MBP_GIVE_UP); |
| 401 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 402 | csr = read_host_csr(); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 403 | csr.reset = 1; |
| 404 | csr.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 405 | write_host_csr(csr); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 406 | } |
| 407 | |
| 408 | /* |
| 409 | * mbp clear routine. This will wait for the ME to indicate that |
| 410 | * the MBP has been read and cleared. |
| 411 | */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 412 | static void intel_me_mbp_clear(struct device *dev) |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 413 | { |
| 414 | int count; |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 415 | union me_hfs2 hfs2; |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 416 | |
| 417 | /* Wait for the mbp_cleared indicator */ |
| 418 | for (count = ME_RETRY; count > 0; --count) { |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 419 | hfs2.raw = pci_read_config32(dev, PCI_ME_HFS2); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 420 | if (hfs2.mbp_cleared) |
| 421 | break; |
| 422 | udelay(ME_DELAY); |
| 423 | } |
| 424 | |
| 425 | if (count == 0) { |
| 426 | printk(BIOS_WARNING, "ME: Timeout waiting for mbp_cleared\n"); |
| 427 | intel_me_mbp_give_up(dev); |
| 428 | } else { |
| 429 | printk(BIOS_INFO, "ME: MBP cleared\n"); |
| 430 | } |
| 431 | } |
| 432 | |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 433 | static void me_print_fw_version(struct mbp_fw_version_name *vers_name) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 434 | { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 435 | if (!vers_name) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 436 | printk(BIOS_ERR, "ME: mbp missing version report\n"); |
| 437 | return; |
| 438 | } |
| 439 | |
| 440 | printk(BIOS_DEBUG, "ME: found version %d.%d.%d.%d\n", |
| 441 | vers_name->major_version, vers_name->minor_version, |
| 442 | vers_name->hotfix_version, vers_name->build_version); |
| 443 | } |
| 444 | |
Edward O'Callaghan | 7bf4f48 | 2014-06-17 15:12:09 +1000 | [diff] [blame] | 445 | static inline void print_cap(const char *name, int state) |
| 446 | { |
| 447 | printk(BIOS_DEBUG, "ME Capability: %-41s : %sabled\n", |
| 448 | name, state ? " en" : "dis"); |
| 449 | } |
| 450 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 451 | /* Get ME Firmware Capabilities */ |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 452 | static int mkhi_get_fwcaps(struct mbp_mefwcaps *cap) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 453 | { |
| 454 | u32 rule_id = 0; |
| 455 | struct me_fwcaps cap_msg; |
| 456 | struct mkhi_header mkhi = { |
| 457 | .group_id = MKHI_GROUP_ID_FWCAPS, |
| 458 | .command = MKHI_FWCAPS_GET_RULE, |
| 459 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 460 | |
| 461 | /* Send request and wait for response */ |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 462 | if (mei_sendrecv_mkhi(&mkhi, &rule_id, sizeof(u32), |
| 463 | &cap_msg, sizeof(cap_msg)) < 0) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 464 | printk(BIOS_ERR, "ME: GET FWCAPS message failed\n"); |
| 465 | return -1; |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 466 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 467 | *cap = cap_msg.caps_sku; |
| 468 | return 0; |
| 469 | } |
| 470 | |
| 471 | /* Get ME Firmware Capabilities */ |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 472 | static void me_print_fwcaps(struct mbp_mefwcaps *cap) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 473 | { |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 474 | struct mbp_mefwcaps local_caps; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 475 | if (!cap) { |
| 476 | cap = &local_caps; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 477 | printk(BIOS_ERR, "ME: mbp missing fwcaps report\n"); |
| 478 | if (mkhi_get_fwcaps(cap)) |
| 479 | return; |
| 480 | } |
| 481 | |
| 482 | print_cap("Full Network manageability", cap->full_net); |
| 483 | print_cap("Regular Network manageability", cap->std_net); |
| 484 | print_cap("Manageability", cap->manageability); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 485 | print_cap("IntelR Anti-Theft (AT)", cap->intel_at); |
| 486 | print_cap("IntelR Capability Licensing Service (CLS)", cap->intel_cls); |
| 487 | print_cap("IntelR Power Sharing Technology (MPC)", cap->intel_mpc); |
| 488 | print_cap("ICC Over Clocking", cap->icc_over_clocking); |
Edward O'Callaghan | 7bf4f48 | 2014-06-17 15:12:09 +1000 | [diff] [blame] | 489 | print_cap("Protected Audio Video Path (PAVP)", cap->pavp); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 490 | print_cap("IPV6", cap->ipv6); |
| 491 | print_cap("KVM Remote Control (KVM)", cap->kvm); |
| 492 | print_cap("Outbreak Containment Heuristic (OCH)", cap->och); |
| 493 | print_cap("Virtual LAN (VLAN)", cap->vlan); |
| 494 | print_cap("TLS", cap->tls); |
| 495 | print_cap("Wireless LAN (WLAN)", cap->wlan); |
| 496 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 497 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 498 | /* Send END OF POST message to the ME */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 499 | static int mkhi_end_of_post(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 500 | { |
| 501 | struct mkhi_header mkhi = { |
| 502 | .group_id = MKHI_GROUP_ID_GEN, |
| 503 | .command = MKHI_END_OF_POST, |
| 504 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 505 | u32 eop_ack; |
| 506 | |
| 507 | /* Send request and wait for response */ |
Angel Pons | 08e8cab | 2020-06-18 15:20:37 +0200 | [diff] [blame] | 508 | printk(BIOS_NOTICE, "ME: %s\n", __func__); |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 509 | if (mei_sendrecv_mkhi(&mkhi, NULL, 0, &eop_ack, sizeof(eop_ack)) < 0) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 510 | printk(BIOS_ERR, "ME: END OF POST message failed\n"); |
| 511 | return -1; |
| 512 | } |
| 513 | |
| 514 | printk(BIOS_INFO, "ME: END OF POST message successful (%d)\n", eop_ack); |
| 515 | return 0; |
| 516 | } |
| 517 | |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 518 | void intel_me_finalize(struct device *dev) |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 519 | { |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 520 | union me_hfs hfs; |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 521 | u32 reg32; |
| 522 | |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 523 | reg32 = pci_read_config32(dev, PCI_BASE_ADDRESS_0); |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 524 | mei_base_address = (u8 *)(uintptr_t)(reg32 & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 525 | |
| 526 | /* S3 path will have hidden this device already */ |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 527 | if (!mei_base_address || mei_base_address == (u8 *)0xfffffff0) |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 528 | return; |
| 529 | |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 530 | /* Wait for ME MBP Cleared indicator */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 531 | intel_me_mbp_clear(dev); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 532 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 533 | /* Make sure ME is in a mode that expects EOP */ |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 534 | hfs.raw = pci_read_config32(dev, PCI_ME_HFS); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 535 | |
| 536 | /* Abort and leave device alone if not normal mode */ |
| 537 | if (hfs.fpt_bad || |
| 538 | hfs.working_state != ME_HFS_CWS_NORMAL || |
| 539 | hfs.operation_mode != ME_HFS_MODE_NORMAL) |
| 540 | return; |
| 541 | |
| 542 | /* Try to send EOP command so ME stops accepting other commands */ |
| 543 | mkhi_end_of_post(); |
| 544 | |
Matt DeVillier | 52c553e | 2022-12-21 14:47:37 -0600 | [diff] [blame] | 545 | if (!CONFIG(DISABLE_ME_PCI)) |
| 546 | return; |
| 547 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 548 | /* Make sure IO is disabled */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 549 | pci_and_config16(dev, PCI_COMMAND, |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 550 | ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 551 | |
| 552 | /* Hide the PCI device */ |
| 553 | RCBA32_OR(FD2, PCH_DISABLE_MEI1); |
| 554 | } |
| 555 | |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 556 | static int me_icc_set_clock_enables(u32 mask) |
| 557 | { |
| 558 | struct icc_clock_enables_msg clk = { |
| 559 | .clock_enables = 0, /* Turn off specified clocks */ |
| 560 | .clock_mask = mask, |
| 561 | .no_response = 1, /* Do not expect response */ |
| 562 | }; |
| 563 | struct icc_header icc = { |
| 564 | .api_version = ICC_API_VERSION_LYNXPOINT, |
| 565 | .icc_command = ICC_SET_CLOCK_ENABLES, |
| 566 | .length = sizeof(clk), |
| 567 | }; |
| 568 | |
| 569 | /* Send request and wait for response */ |
| 570 | if (mei_sendrecv_icc(&icc, &clk, sizeof(clk), NULL, 0) < 0) { |
| 571 | printk(BIOS_ERR, "ME: ICC SET CLOCK ENABLES message failed\n"); |
| 572 | return -1; |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 573 | } |
Elyes HAOUAS | 54f9424 | 2018-10-25 10:57:39 +0200 | [diff] [blame] | 574 | printk(BIOS_INFO, "ME: ICC SET CLOCK ENABLES 0x%08x\n", mask); |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 575 | return 0; |
| 576 | } |
| 577 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 578 | /* Determine the path that we should take based on ME status */ |
Angel Pons | 9f04374 | 2021-11-24 12:46:12 +0100 | [diff] [blame] | 579 | static enum me_bios_path intel_me_path(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 580 | { |
Angel Pons | 9f04374 | 2021-11-24 12:46:12 +0100 | [diff] [blame] | 581 | enum me_bios_path path = ME_DISABLE_BIOS_PATH; |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 582 | union me_hfs hfs = { .raw = pci_read_config32(dev, PCI_ME_HFS) }; |
| 583 | union me_hfs2 hfs2 = { .raw = pci_read_config32(dev, PCI_ME_HFS2) }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 584 | |
| 585 | /* Check and dump status */ |
Angel Pons | 55405a3 | 2021-11-24 15:04:05 +0100 | [diff] [blame] | 586 | intel_me_status(hfs, hfs2); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 587 | |
| 588 | /* Check Current Working State */ |
| 589 | switch (hfs.working_state) { |
| 590 | case ME_HFS_CWS_NORMAL: |
| 591 | path = ME_NORMAL_BIOS_PATH; |
| 592 | break; |
| 593 | case ME_HFS_CWS_REC: |
| 594 | path = ME_RECOVERY_BIOS_PATH; |
| 595 | break; |
| 596 | default: |
| 597 | path = ME_DISABLE_BIOS_PATH; |
| 598 | break; |
| 599 | } |
| 600 | |
| 601 | /* Check Current Operation Mode */ |
| 602 | switch (hfs.operation_mode) { |
| 603 | case ME_HFS_MODE_NORMAL: |
| 604 | break; |
| 605 | case ME_HFS_MODE_DEBUG: |
| 606 | case ME_HFS_MODE_DIS: |
| 607 | case ME_HFS_MODE_OVER_JMPR: |
| 608 | case ME_HFS_MODE_OVER_MEI: |
| 609 | default: |
| 610 | path = ME_DISABLE_BIOS_PATH; |
| 611 | break; |
| 612 | } |
| 613 | |
| 614 | /* Check for any error code and valid firmware and MBP */ |
| 615 | if (hfs.error_code || hfs.fpt_bad) |
| 616 | path = ME_ERROR_BIOS_PATH; |
| 617 | |
| 618 | /* Check if the MBP is ready */ |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 619 | if (!hfs2.mbp_rdy) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 620 | printk(BIOS_CRIT, "%s: mbp is not ready!\n", |
Angel Pons | 08e8cab | 2020-06-18 15:20:37 +0200 | [diff] [blame] | 621 | __func__); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 622 | path = ME_ERROR_BIOS_PATH; |
| 623 | } |
| 624 | |
Kyösti Mälkki | be5317f | 2019-11-06 12:07:21 +0200 | [diff] [blame] | 625 | if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 626 | struct elog_event_data_me_extended data = { |
| 627 | .current_working_state = hfs.working_state, |
| 628 | .operation_state = hfs.operation_state, |
| 629 | .operation_mode = hfs.operation_mode, |
| 630 | .error_code = hfs.error_code, |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 631 | .progress_code = hfs2.progress_code, |
| 632 | .current_pmevent = hfs2.current_pmevent, |
| 633 | .current_state = hfs2.current_state, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 634 | }; |
| 635 | elog_add_event_byte(ELOG_TYPE_MANAGEMENT_ENGINE, path); |
| 636 | elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, |
| 637 | &data, sizeof(data)); |
| 638 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 639 | |
| 640 | return path; |
| 641 | } |
| 642 | |
| 643 | /* Prepare ME for MEI messages */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 644 | static int intel_mei_setup(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 645 | { |
| 646 | struct resource *res; |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 647 | union mei_csr host; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 648 | |
| 649 | /* Find the MMIO base for the ME interface */ |
Angel Pons | f32ae10 | 2021-11-03 13:07:14 +0100 | [diff] [blame] | 650 | res = probe_resource(dev, PCI_BASE_ADDRESS_0); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 651 | if (!res || res->base == 0 || res->size == 0) { |
| 652 | printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); |
| 653 | return -1; |
| 654 | } |
Angel Pons | d32b514 | 2021-02-23 14:23:49 +0100 | [diff] [blame] | 655 | mei_base_address = res2mmio(res, 0, 0); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 656 | |
| 657 | /* Ensure Memory and Bus Master bits are set */ |
Angel Pons | d5d4fbc | 2020-05-31 01:03:59 +0200 | [diff] [blame] | 658 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 659 | |
| 660 | /* Clean up status for next message */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 661 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 662 | host.interrupt_generate = 1; |
| 663 | host.ready = 1; |
| 664 | host.reset = 0; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 665 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 666 | |
| 667 | return 0; |
| 668 | } |
| 669 | |
| 670 | /* Read the Extend register hash of ME firmware */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 671 | static int intel_me_extend_valid(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 672 | { |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 673 | union me_heres status = { .raw = pci_read_config32(dev, PCI_ME_HERES) }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 674 | u32 extend[8] = {0}; |
| 675 | int i, count = 0; |
| 676 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 677 | if (!status.extend_feature_present) { |
| 678 | printk(BIOS_ERR, "ME: Extend Feature not present\n"); |
| 679 | return -1; |
| 680 | } |
| 681 | |
| 682 | if (!status.extend_reg_valid) { |
| 683 | printk(BIOS_ERR, "ME: Extend Register not valid\n"); |
| 684 | return -1; |
| 685 | } |
| 686 | |
| 687 | switch (status.extend_reg_algorithm) { |
| 688 | case PCI_ME_EXT_SHA1: |
| 689 | count = 5; |
| 690 | printk(BIOS_DEBUG, "ME: Extend SHA-1: "); |
| 691 | break; |
| 692 | case PCI_ME_EXT_SHA256: |
| 693 | count = 8; |
| 694 | printk(BIOS_DEBUG, "ME: Extend SHA-256: "); |
| 695 | break; |
| 696 | default: |
| 697 | printk(BIOS_ERR, "ME: Extend Algorithm %d unknown\n", |
| 698 | status.extend_reg_algorithm); |
| 699 | return -1; |
| 700 | } |
| 701 | |
| 702 | for (i = 0; i < count; ++i) { |
| 703 | extend[i] = pci_read_config32(dev, PCI_ME_HER(i)); |
| 704 | printk(BIOS_DEBUG, "%08x", extend[i]); |
| 705 | } |
| 706 | printk(BIOS_DEBUG, "\n"); |
| 707 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 708 | /* Save hash in NVS for the OS to verify */ |
Kyösti Mälkki | 84d10cc | 2021-02-10 17:53:34 +0200 | [diff] [blame] | 709 | if (CONFIG(CHROMEOS_NVS)) |
Kyösti Mälkki | 26e0f4c | 2020-12-19 19:10:45 +0200 | [diff] [blame] | 710 | chromeos_set_me_hash(extend, count); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 711 | |
| 712 | return 0; |
| 713 | } |
| 714 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 715 | static u32 me_to_host_words_pending(void) |
| 716 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 717 | union mei_csr me = read_me_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 718 | if (!me.ready) |
| 719 | return 0; |
| 720 | return (me.buffer_write_ptr - me.buffer_read_ptr) & |
| 721 | (me.buffer_depth - 1); |
| 722 | } |
| 723 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 724 | struct mbp_payload { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 725 | union mbp_header header; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 726 | u32 data[0]; |
| 727 | }; |
| 728 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 729 | /* |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 730 | * Read and print ME MBP data |
| 731 | * |
| 732 | * Return -1 to indicate a problem (give up) |
| 733 | * Return 0 to indicate success (send LOCK+EOP) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 734 | */ |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 735 | static int intel_me_read_mbp(struct me_bios_payload *mbp_data, struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 736 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 737 | union mbp_header mbp_hdr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 738 | u32 me2host_pending; |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 739 | union mei_csr host; |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 740 | union me_hfs2 hfs2 = { .raw = pci_read_config32(dev, PCI_ME_HFS2) }; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 741 | struct mbp_payload *mbp; |
| 742 | int i; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 743 | |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 744 | if (!hfs2.mbp_rdy) { |
| 745 | printk(BIOS_ERR, "ME: MBP not ready\n"); |
| 746 | goto mbp_failure; |
| 747 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 748 | |
| 749 | me2host_pending = me_to_host_words_pending(); |
| 750 | if (!me2host_pending) { |
| 751 | printk(BIOS_ERR, "ME: no mbp data!\n"); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 752 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 753 | } |
| 754 | |
| 755 | /* we know for sure that at least the header is there */ |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 756 | mbp_hdr.raw = read_cb(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 757 | |
| 758 | if ((mbp_hdr.num_entries > (mbp_hdr.mbp_size / 2)) || |
| 759 | (me2host_pending < mbp_hdr.mbp_size)) { |
| 760 | printk(BIOS_ERR, "ME: mbp of %d entries, total size %d words" |
| 761 | " buffer contains %d words\n", |
| 762 | mbp_hdr.num_entries, mbp_hdr.mbp_size, |
| 763 | me2host_pending); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 764 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 765 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 766 | mbp = malloc(mbp_hdr.mbp_size * sizeof(u32)); |
| 767 | if (!mbp) |
| 768 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 769 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 770 | mbp->header = mbp_hdr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 771 | me2host_pending--; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 772 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 773 | i = 0; |
| 774 | while (i != me2host_pending) { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 775 | mbp->data[i] = read_cb(); |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 776 | i++; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 777 | } |
| 778 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 779 | /* Signal to the ME that the host has finished reading the MBP. */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 780 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 781 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 782 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 783 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 784 | /* Dump out the MBP contents. */ |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 785 | if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) { |
| 786 | printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n", |
| 787 | mbp->header.num_entries, mbp->header.mbp_size); |
| 788 | if (CONFIG(DEBUG_INTEL_ME)) { |
| 789 | for (i = 0; i < mbp->header.mbp_size - 1; i++) { |
| 790 | printk(BIOS_INFO, "ME MBP: %04x: 0x%08x\n", i, mbp->data[i]); |
| 791 | } |
| 792 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 793 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 794 | |
| 795 | #define ASSIGN_FIELD_PTR(field_,val_) \ |
| 796 | { \ |
| 797 | mbp_data->field_ = (typeof(mbp_data->field_))(void *)val_; \ |
| 798 | break; \ |
| 799 | } |
| 800 | /* Setup the pointers in the me_bios_payload structure. */ |
| 801 | for (i = 0; i < mbp->header.mbp_size - 1;) { |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 802 | struct mbp_item_header *item = (void *)&mbp->data[i]; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 803 | |
Elyes HAOUAS | f9de5a4 | 2018-05-03 17:21:02 +0200 | [diff] [blame] | 804 | switch (MBP_MAKE_IDENT(item->app_id, item->item_id)) { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 805 | case MBP_IDENT(KERNEL, FW_VER): |
| 806 | ASSIGN_FIELD_PTR(fw_version_name, &mbp->data[i+1]); |
| 807 | |
| 808 | case MBP_IDENT(ICC, PROFILE): |
| 809 | ASSIGN_FIELD_PTR(icc_profile, &mbp->data[i+1]); |
| 810 | |
| 811 | case MBP_IDENT(INTEL_AT, STATE): |
| 812 | ASSIGN_FIELD_PTR(at_state, &mbp->data[i+1]); |
| 813 | |
| 814 | case MBP_IDENT(KERNEL, FW_CAP): |
| 815 | ASSIGN_FIELD_PTR(fw_capabilities, &mbp->data[i+1]); |
| 816 | |
| 817 | case MBP_IDENT(KERNEL, ROM_BIST): |
| 818 | ASSIGN_FIELD_PTR(rom_bist_data, &mbp->data[i+1]); |
| 819 | |
| 820 | case MBP_IDENT(KERNEL, PLAT_KEY): |
| 821 | ASSIGN_FIELD_PTR(platform_key, &mbp->data[i+1]); |
| 822 | |
| 823 | case MBP_IDENT(KERNEL, FW_TYPE): |
| 824 | ASSIGN_FIELD_PTR(fw_plat_type, &mbp->data[i+1]); |
| 825 | |
| 826 | case MBP_IDENT(KERNEL, MFS_FAILURE): |
| 827 | ASSIGN_FIELD_PTR(mfsintegrity, &mbp->data[i+1]); |
| 828 | |
Duncan Laurie | 144f7b2 | 2013-05-01 11:27:58 -0700 | [diff] [blame] | 829 | case MBP_IDENT(KERNEL, PLAT_TIME): |
| 830 | ASSIGN_FIELD_PTR(plat_time, &mbp->data[i+1]); |
| 831 | |
| 832 | case MBP_IDENT(NFC, SUPPORT_DATA): |
| 833 | ASSIGN_FIELD_PTR(nfc_data, &mbp->data[i+1]); |
| 834 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 835 | default: |
Duncan Laurie | 0b3cd36 | 2013-08-08 15:40:01 -0700 | [diff] [blame] | 836 | printk(BIOS_ERR, "ME MBP: unknown item 0x%x @ " |
| 837 | "dw offset 0x%x\n", mbp->data[i], i); |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 838 | break; |
| 839 | } |
| 840 | i += item->length; |
| 841 | } |
| 842 | #undef ASSIGN_FIELD_PTR |
| 843 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 844 | return 0; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 845 | |
| 846 | mbp_failure: |
| 847 | intel_me_mbp_give_up(dev); |
| 848 | return -1; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 849 | } |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 850 | |
| 851 | /* Check whether ME is present and do basic init */ |
| 852 | static void intel_me_init(struct device *dev) |
| 853 | { |
| 854 | struct southbridge_intel_lynxpoint_config *config = dev->chip_info; |
Angel Pons | 9f04374 | 2021-11-24 12:46:12 +0100 | [diff] [blame] | 855 | enum me_bios_path path = intel_me_path(dev); |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 856 | struct me_bios_payload mbp_data; |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 857 | |
| 858 | /* Do initial setup and determine the BIOS path */ |
| 859 | printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_bios_path_values[path]); |
| 860 | |
| 861 | if (path == ME_NORMAL_BIOS_PATH) { |
| 862 | /* Validate the extend register */ |
| 863 | intel_me_extend_valid(dev); |
| 864 | } |
| 865 | |
| 866 | memset(&mbp_data, 0, sizeof(mbp_data)); |
| 867 | |
| 868 | /* |
| 869 | * According to the ME9 BWG, BIOS is required to fetch MBP data in |
| 870 | * all boot flows except S3 Resume. |
| 871 | */ |
| 872 | |
| 873 | /* Prepare MEI MMIO interface */ |
| 874 | if (intel_mei_setup(dev) < 0) |
| 875 | return; |
| 876 | |
| 877 | if (intel_me_read_mbp(&mbp_data, dev)) |
| 878 | return; |
| 879 | |
| 880 | if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) { |
| 881 | me_print_fw_version(mbp_data.fw_version_name); |
| 882 | |
| 883 | if (CONFIG(DEBUG_INTEL_ME)) |
| 884 | me_print_fwcaps(mbp_data.fw_capabilities); |
| 885 | |
| 886 | if (mbp_data.plat_time) { |
| 887 | printk(BIOS_DEBUG, "ME: Wake Event to ME Reset: %u ms\n", |
| 888 | mbp_data.plat_time->wake_event_mrst_time_ms); |
| 889 | printk(BIOS_DEBUG, "ME: ME Reset to Platform Reset: %u ms\n", |
| 890 | mbp_data.plat_time->mrst_pltrst_time_ms); |
| 891 | printk(BIOS_DEBUG, "ME: Platform Reset to CPU Reset: %u ms\n", |
| 892 | mbp_data.plat_time->pltrst_cpurst_time_ms); |
| 893 | } |
| 894 | } |
| 895 | |
| 896 | /* Set clock enables according to devicetree */ |
| 897 | if (config && config->icc_clock_disable) |
| 898 | me_icc_set_clock_enables(config->icc_clock_disable); |
| 899 | |
| 900 | /* |
| 901 | * Leave the ME unlocked. It will be locked later. |
| 902 | */ |
| 903 | } |
| 904 | |
| 905 | static void intel_me_enable(struct device *dev) |
| 906 | { |
| 907 | /* Avoid talking to the device in S3 path */ |
Matt DeVillier | 52c553e | 2022-12-21 14:47:37 -0600 | [diff] [blame] | 908 | if (acpi_is_wakeup_s3() && CONFIG(DISABLE_ME_PCI)) { |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 909 | dev->enabled = 0; |
| 910 | pch_disable_devfn(dev); |
| 911 | } |
| 912 | } |
| 913 | |
| 914 | static struct device_operations device_ops = { |
| 915 | .read_resources = pci_dev_read_resources, |
| 916 | .set_resources = pci_dev_set_resources, |
| 917 | .enable_resources = pci_dev_enable_resources, |
| 918 | .enable = intel_me_enable, |
| 919 | .init = intel_me_init, |
| 920 | .final = intel_me_finalize, |
| 921 | .ops_pci = &pci_dev_ops_pci, |
| 922 | }; |
| 923 | |
| 924 | static const unsigned short pci_device_ids[] = { |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 925 | PCI_DID_INTEL_LPT_H_MEI, |
Angel Pons | 434d7d4 | 2022-10-07 00:36:00 +0200 | [diff] [blame] | 926 | PCI_DID_INTEL_LPT_H_MEI_9, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 927 | PCI_DID_INTEL_LPT_LP_MEI, |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 928 | 0 |
| 929 | }; |
| 930 | |
| 931 | static const struct pci_driver intel_me __pci_driver = { |
| 932 | .ops = &device_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 933 | .vendor = PCI_VID_INTEL, |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 934 | .devices = pci_device_ids, |
| 935 | }; |