Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * This is a ramstage driver for the Intel Management Engine found in the |
| 5 | * 6-series chipset. It handles the required boot-time messages over the |
| 6 | * MMIO-based Management Engine Interface to tell the ME that the BIOS is |
| 7 | * finished with POST. Additional messages are defined for debug but are |
| 8 | * not used unless the console loglevel is high enough. |
| 9 | */ |
| 10 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 11 | #include <acpi/acpi.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 12 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 13 | #include <device/pci_ops.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 14 | #include <console/console.h> |
Stefan Reinauer | 24d1d4b | 2013-03-21 11:51:41 -0700 | [diff] [blame] | 15 | #include <device/device.h> |
| 16 | #include <device/pci.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 17 | #include <device/pci_ids.h> |
| 18 | #include <device/pci_def.h> |
| 19 | #include <string.h> |
| 20 | #include <delay.h> |
| 21 | #include <elog.h> |
Elyes HAOUAS | 400f9ca | 2019-06-23 07:01:22 +0200 | [diff] [blame] | 22 | #include <stdlib.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 23 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 24 | #include "chip.h" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 25 | #include "me.h" |
| 26 | #include "pch.h" |
| 27 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 28 | #include <vendorcode/google/chromeos/chromeos.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 29 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 30 | /* Path that the BIOS should take based on ME state */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 31 | static const char *const me_bios_path_values[] = { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 32 | [ME_NORMAL_BIOS_PATH] = "Normal", |
| 33 | [ME_S3WAKE_BIOS_PATH] = "S3 Wake", |
| 34 | [ME_ERROR_BIOS_PATH] = "Error", |
| 35 | [ME_RECOVERY_BIOS_PATH] = "Recovery", |
| 36 | [ME_DISABLE_BIOS_PATH] = "Disable", |
| 37 | [ME_FIRMWARE_UPDATE_BIOS_PATH] = "Firmware Update", |
| 38 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 39 | |
| 40 | /* MMIO base address for MEI interface */ |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 41 | static u8 *mei_base_address; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 42 | |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 43 | static void mei_dump(u32 dword, int offset, const char *type) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 44 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 45 | union mei_csr csr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 46 | |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 47 | if (!CONFIG(DEBUG_INTEL_ME)) |
| 48 | return; |
| 49 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 50 | printk(BIOS_SPEW, "%-9s[%02x] : ", type, offset); |
| 51 | |
| 52 | switch (offset) { |
| 53 | case MEI_H_CSR: |
| 54 | case MEI_ME_CSR_HA: |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 55 | csr.raw = dword; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 56 | printk(BIOS_SPEW, "cbd=%u cbrp=%02u cbwp=%02u ready=%u " |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 57 | "reset=%u ig=%u is=%u ie=%u\n", csr.buffer_depth, |
| 58 | csr.buffer_read_ptr, csr.buffer_write_ptr, |
| 59 | csr.ready, csr.reset, csr.interrupt_generate, |
| 60 | csr.interrupt_status, csr.interrupt_enable); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 61 | break; |
| 62 | case MEI_ME_CB_RW: |
| 63 | case MEI_H_CB_WW: |
| 64 | printk(BIOS_SPEW, "CB: 0x%08x\n", dword); |
| 65 | break; |
| 66 | default: |
| 67 | printk(BIOS_SPEW, "0x%08x\n", offset); |
| 68 | break; |
| 69 | } |
| 70 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 71 | |
| 72 | /* |
| 73 | * ME/MEI access helpers using memcpy to avoid aliasing. |
| 74 | */ |
| 75 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 76 | static inline union mei_csr read_host_csr(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 77 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 78 | union mei_csr csr = { .raw = read32(mei_base_address + MEI_H_CSR) }; |
| 79 | mei_dump(csr.raw, MEI_H_CSR, "READ"); |
| 80 | return csr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 81 | } |
| 82 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 83 | static inline void write_host_csr(union mei_csr csr) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 84 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 85 | write32(mei_base_address + MEI_H_CSR, csr.raw); |
| 86 | mei_dump(csr.raw, MEI_H_CSR, "WRITE"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 87 | } |
| 88 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 89 | static inline union mei_csr read_me_csr(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 90 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 91 | union mei_csr csr = { .raw = read32(mei_base_address + MEI_ME_CSR_HA) }; |
| 92 | mei_dump(csr.raw, MEI_ME_CSR_HA, "READ"); |
| 93 | return csr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 94 | } |
| 95 | |
| 96 | static inline void write_cb(u32 dword) |
| 97 | { |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 98 | write32(mei_base_address + MEI_H_CB_WW, dword); |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 99 | mei_dump(dword, MEI_H_CB_WW, "WRITE"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 100 | } |
| 101 | |
| 102 | static inline u32 read_cb(void) |
| 103 | { |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 104 | u32 dword = read32(mei_base_address + MEI_ME_CB_RW); |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 105 | mei_dump(dword, MEI_ME_CB_RW, "READ"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 106 | return dword; |
| 107 | } |
| 108 | |
| 109 | /* Wait for ME ready bit to be asserted */ |
| 110 | static int mei_wait_for_me_ready(void) |
| 111 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 112 | union mei_csr me; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 113 | unsigned int try = ME_RETRY; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 114 | |
| 115 | while (try--) { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 116 | me = read_me_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 117 | if (me.ready) |
| 118 | return 0; |
| 119 | udelay(ME_DELAY); |
| 120 | } |
| 121 | |
| 122 | printk(BIOS_ERR, "ME: failed to become ready\n"); |
| 123 | return -1; |
| 124 | } |
| 125 | |
| 126 | static void mei_reset(void) |
| 127 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 128 | union mei_csr host; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 129 | |
| 130 | if (mei_wait_for_me_ready() < 0) |
| 131 | return; |
| 132 | |
| 133 | /* Reset host and ME circular buffers for next message */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 134 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 135 | host.reset = 1; |
| 136 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 137 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 138 | |
| 139 | if (mei_wait_for_me_ready() < 0) |
| 140 | return; |
| 141 | |
| 142 | /* Re-init and indicate host is ready */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 143 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 144 | host.interrupt_generate = 1; |
| 145 | host.ready = 1; |
| 146 | host.reset = 0; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 147 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 148 | } |
| 149 | |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 150 | static int mei_send_packet(union mei_header *mei, void *req_data) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 151 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 152 | union mei_csr host; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 153 | unsigned int ndata, n; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 154 | u32 *data; |
| 155 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 156 | /* Number of dwords to write */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 157 | ndata = mei->length >> 2; |
| 158 | |
| 159 | /* Pad non-dword aligned request message length */ |
| 160 | if (mei->length & 3) |
| 161 | ndata++; |
| 162 | if (!ndata) { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 163 | printk(BIOS_DEBUG, "ME: request has no data\n"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 164 | return -1; |
| 165 | } |
| 166 | ndata++; /* Add MEI header */ |
| 167 | |
| 168 | /* |
| 169 | * Make sure there is still room left in the circular buffer. |
| 170 | * Reset the buffer pointers if the requested message will not fit. |
| 171 | */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 172 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 173 | if ((host.buffer_depth - host.buffer_write_ptr) < ndata) { |
| 174 | printk(BIOS_ERR, "ME: circular buffer full, resetting...\n"); |
| 175 | mei_reset(); |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 176 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 177 | } |
| 178 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 179 | /* Ensure the requested length will fit in the circular buffer. */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 180 | if ((host.buffer_depth - host.buffer_write_ptr) < ndata) { |
| 181 | printk(BIOS_ERR, "ME: message (%u) too large for buffer (%u)\n", |
| 182 | ndata + 2, host.buffer_depth); |
| 183 | return -1; |
| 184 | } |
| 185 | |
| 186 | /* Write MEI header */ |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 187 | write_cb(mei->raw); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 188 | ndata--; |
| 189 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 190 | /* Write message data */ |
| 191 | data = req_data; |
| 192 | for (n = 0; n < ndata; ++n) |
| 193 | write_cb(*data++); |
| 194 | |
| 195 | /* Generate interrupt to the ME */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 196 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 197 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 198 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 199 | |
| 200 | /* Make sure ME is ready after sending request data */ |
| 201 | return mei_wait_for_me_ready(); |
| 202 | } |
| 203 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 204 | static int mei_send_data(u8 me_address, u8 host_address, |
| 205 | void *req_data, int req_bytes) |
| 206 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 207 | union mei_header header = { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 208 | .client_address = me_address, |
| 209 | .host_address = host_address, |
| 210 | }; |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 211 | union mei_csr host; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 212 | int current = 0; |
| 213 | u8 *req_ptr = req_data; |
| 214 | |
| 215 | while (!header.is_complete) { |
| 216 | int remain = req_bytes - current; |
| 217 | int buf_len; |
| 218 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 219 | host = read_host_csr(); |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 220 | buf_len = host.buffer_depth - host.buffer_write_ptr; |
| 221 | |
| 222 | if (buf_len > remain) { |
| 223 | /* Send all remaining data as final message */ |
| 224 | header.length = req_bytes - current; |
| 225 | header.is_complete = 1; |
| 226 | } else { |
| 227 | /* Send as much data as the buffer can hold */ |
| 228 | header.length = buf_len; |
| 229 | } |
| 230 | |
| 231 | mei_send_packet(&header, req_ptr); |
| 232 | |
| 233 | req_ptr += header.length; |
| 234 | current += header.length; |
| 235 | } |
| 236 | |
| 237 | return 0; |
| 238 | } |
| 239 | |
| 240 | static int mei_send_header(u8 me_address, u8 host_address, |
| 241 | void *header, int header_len, int complete) |
| 242 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 243 | union mei_header mei = { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 244 | .client_address = me_address, |
| 245 | .host_address = host_address, |
| 246 | .length = header_len, |
| 247 | .is_complete = complete, |
| 248 | }; |
| 249 | return mei_send_packet(&mei, header); |
| 250 | } |
| 251 | |
| 252 | static int mei_recv_msg(void *header, int header_bytes, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 253 | void *rsp_data, int rsp_bytes) |
| 254 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 255 | union mei_header mei_rsp; |
| 256 | union mei_csr me, host; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 257 | unsigned int ndata, n; |
| 258 | unsigned int expected; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 259 | u32 *data; |
| 260 | |
| 261 | /* Total number of dwords to read from circular buffer */ |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 262 | expected = (rsp_bytes + sizeof(mei_rsp) + header_bytes) >> 2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 263 | if (rsp_bytes & 3) |
| 264 | expected++; |
| 265 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 266 | if (mei_wait_for_me_ready() < 0) |
| 267 | return -1; |
| 268 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 269 | /* |
| 270 | * The interrupt status bit does not appear to indicate that the |
| 271 | * message has actually been received. Instead we wait until the |
| 272 | * expected number of dwords are present in the circular buffer. |
| 273 | */ |
| 274 | for (n = ME_RETRY; n; --n) { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 275 | me = read_me_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 276 | if ((me.buffer_write_ptr - me.buffer_read_ptr) >= expected) |
| 277 | break; |
| 278 | udelay(ME_DELAY); |
| 279 | } |
| 280 | if (!n) { |
| 281 | printk(BIOS_ERR, "ME: timeout waiting for data: expected " |
| 282 | "%u, available %u\n", expected, |
| 283 | me.buffer_write_ptr - me.buffer_read_ptr); |
| 284 | return -1; |
| 285 | } |
| 286 | |
| 287 | /* Read and verify MEI response header from the ME */ |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 288 | mei_rsp.raw = read_cb(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 289 | if (!mei_rsp.is_complete) { |
| 290 | printk(BIOS_ERR, "ME: response is not complete\n"); |
| 291 | return -1; |
| 292 | } |
| 293 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 294 | /* Handle non-dword responses and expect at least the header */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 295 | ndata = mei_rsp.length >> 2; |
| 296 | if (mei_rsp.length & 3) |
| 297 | ndata++; |
| 298 | if (ndata != (expected - 1)) { |
| 299 | printk(BIOS_ERR, "ME: response is missing data %d != %d\n", |
| 300 | ndata, (expected - 1)); |
| 301 | return -1; |
| 302 | } |
| 303 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 304 | /* Read response header from the ME */ |
| 305 | data = header; |
| 306 | for (n = 0; n < (header_bytes >> 2); ++n) |
| 307 | *data++ = read_cb(); |
| 308 | ndata -= header_bytes >> 2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 309 | |
| 310 | /* Make sure caller passed a buffer with enough space */ |
| 311 | if (ndata != (rsp_bytes >> 2)) { |
| 312 | printk(BIOS_ERR, "ME: not enough room in response buffer: " |
| 313 | "%u != %u\n", ndata, rsp_bytes >> 2); |
| 314 | return -1; |
| 315 | } |
| 316 | |
| 317 | /* Read response data from the circular buffer */ |
| 318 | data = rsp_data; |
| 319 | for (n = 0; n < ndata; ++n) |
| 320 | *data++ = read_cb(); |
| 321 | |
| 322 | /* Tell the ME that we have consumed the response */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 323 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 324 | host.interrupt_status = 1; |
| 325 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 326 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 327 | |
| 328 | return mei_wait_for_me_ready(); |
| 329 | } |
| 330 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 331 | static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, |
| 332 | void *req_data, int req_bytes, |
| 333 | void *rsp_data, int rsp_bytes) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 334 | { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 335 | struct mkhi_header mkhi_rsp; |
| 336 | |
| 337 | /* Send header */ |
| 338 | if (mei_send_header(MEI_ADDRESS_MKHI, MEI_HOST_ADDRESS, |
| 339 | mkhi, sizeof(*mkhi), req_bytes ? 0 : 1) < 0) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 340 | return -1; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 341 | |
| 342 | /* Send data if available */ |
| 343 | if (req_bytes && mei_send_data(MEI_ADDRESS_MKHI, MEI_HOST_ADDRESS, |
| 344 | req_data, req_bytes) < 0) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 345 | return -1; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 346 | |
| 347 | /* Return now if no response expected */ |
| 348 | if (!rsp_bytes) |
| 349 | return 0; |
| 350 | |
| 351 | /* Read header and data */ |
| 352 | if (mei_recv_msg(&mkhi_rsp, sizeof(mkhi_rsp), |
| 353 | rsp_data, rsp_bytes) < 0) |
| 354 | return -1; |
| 355 | |
| 356 | if (!mkhi_rsp.is_response || |
| 357 | mkhi->group_id != mkhi_rsp.group_id || |
| 358 | mkhi->command != mkhi_rsp.command) { |
| 359 | printk(BIOS_ERR, "ME: invalid response, group %u ?= %u," |
| 360 | "command %u ?= %u, is_response %u\n", mkhi->group_id, |
| 361 | mkhi_rsp.group_id, mkhi->command, mkhi_rsp.command, |
| 362 | mkhi_rsp.is_response); |
| 363 | return -1; |
| 364 | } |
| 365 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 366 | return 0; |
| 367 | } |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 368 | |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 369 | static inline int mei_sendrecv_icc(struct icc_header *icc, |
| 370 | void *req_data, int req_bytes, |
| 371 | void *rsp_data, int rsp_bytes) |
| 372 | { |
| 373 | struct icc_header icc_rsp; |
| 374 | |
| 375 | /* Send header */ |
| 376 | if (mei_send_header(MEI_ADDRESS_ICC, MEI_HOST_ADDRESS, |
| 377 | icc, sizeof(*icc), req_bytes ? 0 : 1) < 0) |
| 378 | return -1; |
| 379 | |
| 380 | /* Send data if available */ |
| 381 | if (req_bytes && mei_send_data(MEI_ADDRESS_ICC, MEI_HOST_ADDRESS, |
| 382 | req_data, req_bytes) < 0) |
| 383 | return -1; |
| 384 | |
| 385 | /* Read header and data, if needed */ |
| 386 | if (rsp_bytes && mei_recv_msg(&icc_rsp, sizeof(icc_rsp), |
| 387 | rsp_data, rsp_bytes) < 0) |
| 388 | return -1; |
| 389 | |
| 390 | return 0; |
| 391 | } |
| 392 | |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 393 | /* |
| 394 | * mbp give up routine. This path is taken if hfs.mpb_rdy is 0 or the read |
| 395 | * state machine on the BIOS end doesn't match the ME's state machine. |
| 396 | */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 397 | static void intel_me_mbp_give_up(struct device *dev) |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 398 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 399 | union mei_csr csr; |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 400 | |
| 401 | pci_write_config32(dev, PCI_ME_H_GS2, PCI_ME_MBP_GIVE_UP); |
| 402 | |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 403 | csr = read_host_csr(); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 404 | csr.reset = 1; |
| 405 | csr.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 406 | write_host_csr(csr); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | /* |
| 410 | * mbp clear routine. This will wait for the ME to indicate that |
| 411 | * the MBP has been read and cleared. |
| 412 | */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 413 | static void intel_me_mbp_clear(struct device *dev) |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 414 | { |
| 415 | int count; |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 416 | union me_hfs2 hfs2; |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 417 | |
| 418 | /* Wait for the mbp_cleared indicator */ |
| 419 | for (count = ME_RETRY; count > 0; --count) { |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 420 | hfs2.raw = pci_read_config32(dev, PCI_ME_HFS2); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 421 | if (hfs2.mbp_cleared) |
| 422 | break; |
| 423 | udelay(ME_DELAY); |
| 424 | } |
| 425 | |
| 426 | if (count == 0) { |
| 427 | printk(BIOS_WARNING, "ME: Timeout waiting for mbp_cleared\n"); |
| 428 | intel_me_mbp_give_up(dev); |
| 429 | } else { |
| 430 | printk(BIOS_INFO, "ME: MBP cleared\n"); |
| 431 | } |
| 432 | } |
| 433 | |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 434 | static void me_print_fw_version(struct mbp_fw_version_name *vers_name) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 435 | { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 436 | if (!vers_name) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 437 | printk(BIOS_ERR, "ME: mbp missing version report\n"); |
| 438 | return; |
| 439 | } |
| 440 | |
| 441 | printk(BIOS_DEBUG, "ME: found version %d.%d.%d.%d\n", |
| 442 | vers_name->major_version, vers_name->minor_version, |
| 443 | vers_name->hotfix_version, vers_name->build_version); |
| 444 | } |
| 445 | |
Edward O'Callaghan | 7bf4f48 | 2014-06-17 15:12:09 +1000 | [diff] [blame] | 446 | static inline void print_cap(const char *name, int state) |
| 447 | { |
| 448 | printk(BIOS_DEBUG, "ME Capability: %-41s : %sabled\n", |
| 449 | name, state ? " en" : "dis"); |
| 450 | } |
| 451 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 452 | /* Get ME Firmware Capabilities */ |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 453 | static int mkhi_get_fwcaps(struct mbp_mefwcaps *cap) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 454 | { |
| 455 | u32 rule_id = 0; |
| 456 | struct me_fwcaps cap_msg; |
| 457 | struct mkhi_header mkhi = { |
| 458 | .group_id = MKHI_GROUP_ID_FWCAPS, |
| 459 | .command = MKHI_FWCAPS_GET_RULE, |
| 460 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 461 | |
| 462 | /* Send request and wait for response */ |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 463 | if (mei_sendrecv_mkhi(&mkhi, &rule_id, sizeof(u32), |
| 464 | &cap_msg, sizeof(cap_msg)) < 0) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 465 | printk(BIOS_ERR, "ME: GET FWCAPS message failed\n"); |
| 466 | return -1; |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 467 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 468 | *cap = cap_msg.caps_sku; |
| 469 | return 0; |
| 470 | } |
| 471 | |
| 472 | /* Get ME Firmware Capabilities */ |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 473 | static void me_print_fwcaps(struct mbp_mefwcaps *cap) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 474 | { |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 475 | struct mbp_mefwcaps local_caps; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 476 | if (!cap) { |
| 477 | cap = &local_caps; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 478 | printk(BIOS_ERR, "ME: mbp missing fwcaps report\n"); |
| 479 | if (mkhi_get_fwcaps(cap)) |
| 480 | return; |
| 481 | } |
| 482 | |
| 483 | print_cap("Full Network manageability", cap->full_net); |
| 484 | print_cap("Regular Network manageability", cap->std_net); |
| 485 | print_cap("Manageability", cap->manageability); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 486 | print_cap("IntelR Anti-Theft (AT)", cap->intel_at); |
| 487 | print_cap("IntelR Capability Licensing Service (CLS)", cap->intel_cls); |
| 488 | print_cap("IntelR Power Sharing Technology (MPC)", cap->intel_mpc); |
| 489 | print_cap("ICC Over Clocking", cap->icc_over_clocking); |
Edward O'Callaghan | 7bf4f48 | 2014-06-17 15:12:09 +1000 | [diff] [blame] | 490 | print_cap("Protected Audio Video Path (PAVP)", cap->pavp); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 491 | print_cap("IPV6", cap->ipv6); |
| 492 | print_cap("KVM Remote Control (KVM)", cap->kvm); |
| 493 | print_cap("Outbreak Containment Heuristic (OCH)", cap->och); |
| 494 | print_cap("Virtual LAN (VLAN)", cap->vlan); |
| 495 | print_cap("TLS", cap->tls); |
| 496 | print_cap("Wireless LAN (WLAN)", cap->wlan); |
| 497 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 498 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 499 | /* Send END OF POST message to the ME */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 500 | static int mkhi_end_of_post(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 501 | { |
| 502 | struct mkhi_header mkhi = { |
| 503 | .group_id = MKHI_GROUP_ID_GEN, |
| 504 | .command = MKHI_END_OF_POST, |
| 505 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 506 | u32 eop_ack; |
| 507 | |
| 508 | /* Send request and wait for response */ |
Angel Pons | 08e8cab | 2020-06-18 15:20:37 +0200 | [diff] [blame] | 509 | printk(BIOS_NOTICE, "ME: %s\n", __func__); |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 510 | if (mei_sendrecv_mkhi(&mkhi, NULL, 0, &eop_ack, sizeof(eop_ack)) < 0) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 511 | printk(BIOS_ERR, "ME: END OF POST message failed\n"); |
| 512 | return -1; |
| 513 | } |
| 514 | |
| 515 | printk(BIOS_INFO, "ME: END OF POST message successful (%d)\n", eop_ack); |
| 516 | return 0; |
| 517 | } |
| 518 | |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 519 | void intel_me_finalize(struct device *dev) |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 520 | { |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 521 | union me_hfs hfs; |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 522 | u32 reg32; |
| 523 | |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 524 | reg32 = pci_read_config32(dev, PCI_BASE_ADDRESS_0); |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 525 | mei_base_address = (u8 *)(uintptr_t)(reg32 & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 526 | |
| 527 | /* S3 path will have hidden this device already */ |
Angel Pons | a3492d7 | 2021-02-23 14:12:25 +0100 | [diff] [blame] | 528 | if (!mei_base_address || mei_base_address == (u8 *)0xfffffff0) |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 529 | return; |
| 530 | |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 531 | /* Wait for ME MBP Cleared indicator */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 532 | intel_me_mbp_clear(dev); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 533 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 534 | /* Make sure ME is in a mode that expects EOP */ |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 535 | hfs.raw = pci_read_config32(dev, PCI_ME_HFS); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 536 | |
| 537 | /* Abort and leave device alone if not normal mode */ |
| 538 | if (hfs.fpt_bad || |
| 539 | hfs.working_state != ME_HFS_CWS_NORMAL || |
| 540 | hfs.operation_mode != ME_HFS_MODE_NORMAL) |
| 541 | return; |
| 542 | |
| 543 | /* Try to send EOP command so ME stops accepting other commands */ |
| 544 | mkhi_end_of_post(); |
| 545 | |
Matt DeVillier | 52c553e | 2022-12-21 14:47:37 -0600 | [diff] [blame^] | 546 | if (!CONFIG(DISABLE_ME_PCI)) |
| 547 | return; |
| 548 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 549 | /* Make sure IO is disabled */ |
Angel Pons | 10274d8 | 2021-02-23 14:19:28 +0100 | [diff] [blame] | 550 | pci_and_config16(dev, PCI_COMMAND, |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 551 | ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 552 | |
| 553 | /* Hide the PCI device */ |
| 554 | RCBA32_OR(FD2, PCH_DISABLE_MEI1); |
| 555 | } |
| 556 | |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 557 | static int me_icc_set_clock_enables(u32 mask) |
| 558 | { |
| 559 | struct icc_clock_enables_msg clk = { |
| 560 | .clock_enables = 0, /* Turn off specified clocks */ |
| 561 | .clock_mask = mask, |
| 562 | .no_response = 1, /* Do not expect response */ |
| 563 | }; |
| 564 | struct icc_header icc = { |
| 565 | .api_version = ICC_API_VERSION_LYNXPOINT, |
| 566 | .icc_command = ICC_SET_CLOCK_ENABLES, |
| 567 | .length = sizeof(clk), |
| 568 | }; |
| 569 | |
| 570 | /* Send request and wait for response */ |
| 571 | if (mei_sendrecv_icc(&icc, &clk, sizeof(clk), NULL, 0) < 0) { |
| 572 | printk(BIOS_ERR, "ME: ICC SET CLOCK ENABLES message failed\n"); |
| 573 | return -1; |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 574 | } |
Elyes HAOUAS | 54f9424 | 2018-10-25 10:57:39 +0200 | [diff] [blame] | 575 | printk(BIOS_INFO, "ME: ICC SET CLOCK ENABLES 0x%08x\n", mask); |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 576 | return 0; |
| 577 | } |
| 578 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 579 | /* Determine the path that we should take based on ME status */ |
Angel Pons | 9f04374 | 2021-11-24 12:46:12 +0100 | [diff] [blame] | 580 | static enum me_bios_path intel_me_path(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 581 | { |
Angel Pons | 9f04374 | 2021-11-24 12:46:12 +0100 | [diff] [blame] | 582 | enum me_bios_path path = ME_DISABLE_BIOS_PATH; |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 583 | union me_hfs hfs = { .raw = pci_read_config32(dev, PCI_ME_HFS) }; |
| 584 | union me_hfs2 hfs2 = { .raw = pci_read_config32(dev, PCI_ME_HFS2) }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 585 | |
| 586 | /* Check and dump status */ |
Angel Pons | 55405a3 | 2021-11-24 15:04:05 +0100 | [diff] [blame] | 587 | intel_me_status(hfs, hfs2); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 588 | |
| 589 | /* Check Current Working State */ |
| 590 | switch (hfs.working_state) { |
| 591 | case ME_HFS_CWS_NORMAL: |
| 592 | path = ME_NORMAL_BIOS_PATH; |
| 593 | break; |
| 594 | case ME_HFS_CWS_REC: |
| 595 | path = ME_RECOVERY_BIOS_PATH; |
| 596 | break; |
| 597 | default: |
| 598 | path = ME_DISABLE_BIOS_PATH; |
| 599 | break; |
| 600 | } |
| 601 | |
| 602 | /* Check Current Operation Mode */ |
| 603 | switch (hfs.operation_mode) { |
| 604 | case ME_HFS_MODE_NORMAL: |
| 605 | break; |
| 606 | case ME_HFS_MODE_DEBUG: |
| 607 | case ME_HFS_MODE_DIS: |
| 608 | case ME_HFS_MODE_OVER_JMPR: |
| 609 | case ME_HFS_MODE_OVER_MEI: |
| 610 | default: |
| 611 | path = ME_DISABLE_BIOS_PATH; |
| 612 | break; |
| 613 | } |
| 614 | |
| 615 | /* Check for any error code and valid firmware and MBP */ |
| 616 | if (hfs.error_code || hfs.fpt_bad) |
| 617 | path = ME_ERROR_BIOS_PATH; |
| 618 | |
| 619 | /* Check if the MBP is ready */ |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 620 | if (!hfs2.mbp_rdy) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 621 | printk(BIOS_CRIT, "%s: mbp is not ready!\n", |
Angel Pons | 08e8cab | 2020-06-18 15:20:37 +0200 | [diff] [blame] | 622 | __func__); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 623 | path = ME_ERROR_BIOS_PATH; |
| 624 | } |
| 625 | |
Kyösti Mälkki | be5317f | 2019-11-06 12:07:21 +0200 | [diff] [blame] | 626 | if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 627 | struct elog_event_data_me_extended data = { |
| 628 | .current_working_state = hfs.working_state, |
| 629 | .operation_state = hfs.operation_state, |
| 630 | .operation_mode = hfs.operation_mode, |
| 631 | .error_code = hfs.error_code, |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 632 | .progress_code = hfs2.progress_code, |
| 633 | .current_pmevent = hfs2.current_pmevent, |
| 634 | .current_state = hfs2.current_state, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 635 | }; |
| 636 | elog_add_event_byte(ELOG_TYPE_MANAGEMENT_ENGINE, path); |
| 637 | elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, |
| 638 | &data, sizeof(data)); |
| 639 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 640 | |
| 641 | return path; |
| 642 | } |
| 643 | |
| 644 | /* Prepare ME for MEI messages */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 645 | static int intel_mei_setup(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 646 | { |
| 647 | struct resource *res; |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 648 | union mei_csr host; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 649 | |
| 650 | /* Find the MMIO base for the ME interface */ |
Angel Pons | f32ae10 | 2021-11-03 13:07:14 +0100 | [diff] [blame] | 651 | res = probe_resource(dev, PCI_BASE_ADDRESS_0); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 652 | if (!res || res->base == 0 || res->size == 0) { |
| 653 | printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); |
| 654 | return -1; |
| 655 | } |
Angel Pons | d32b514 | 2021-02-23 14:23:49 +0100 | [diff] [blame] | 656 | mei_base_address = res2mmio(res, 0, 0); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 657 | |
| 658 | /* Ensure Memory and Bus Master bits are set */ |
Angel Pons | d5d4fbc | 2020-05-31 01:03:59 +0200 | [diff] [blame] | 659 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 660 | |
| 661 | /* Clean up status for next message */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 662 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 663 | host.interrupt_generate = 1; |
| 664 | host.ready = 1; |
| 665 | host.reset = 0; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 666 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 667 | |
| 668 | return 0; |
| 669 | } |
| 670 | |
| 671 | /* Read the Extend register hash of ME firmware */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 672 | static int intel_me_extend_valid(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 673 | { |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 674 | union me_heres status = { .raw = pci_read_config32(dev, PCI_ME_HERES) }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 675 | u32 extend[8] = {0}; |
| 676 | int i, count = 0; |
| 677 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 678 | if (!status.extend_feature_present) { |
| 679 | printk(BIOS_ERR, "ME: Extend Feature not present\n"); |
| 680 | return -1; |
| 681 | } |
| 682 | |
| 683 | if (!status.extend_reg_valid) { |
| 684 | printk(BIOS_ERR, "ME: Extend Register not valid\n"); |
| 685 | return -1; |
| 686 | } |
| 687 | |
| 688 | switch (status.extend_reg_algorithm) { |
| 689 | case PCI_ME_EXT_SHA1: |
| 690 | count = 5; |
| 691 | printk(BIOS_DEBUG, "ME: Extend SHA-1: "); |
| 692 | break; |
| 693 | case PCI_ME_EXT_SHA256: |
| 694 | count = 8; |
| 695 | printk(BIOS_DEBUG, "ME: Extend SHA-256: "); |
| 696 | break; |
| 697 | default: |
| 698 | printk(BIOS_ERR, "ME: Extend Algorithm %d unknown\n", |
| 699 | status.extend_reg_algorithm); |
| 700 | return -1; |
| 701 | } |
| 702 | |
| 703 | for (i = 0; i < count; ++i) { |
| 704 | extend[i] = pci_read_config32(dev, PCI_ME_HER(i)); |
| 705 | printk(BIOS_DEBUG, "%08x", extend[i]); |
| 706 | } |
| 707 | printk(BIOS_DEBUG, "\n"); |
| 708 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 709 | /* Save hash in NVS for the OS to verify */ |
Kyösti Mälkki | 84d10cc | 2021-02-10 17:53:34 +0200 | [diff] [blame] | 710 | if (CONFIG(CHROMEOS_NVS)) |
Kyösti Mälkki | 26e0f4c | 2020-12-19 19:10:45 +0200 | [diff] [blame] | 711 | chromeos_set_me_hash(extend, count); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 712 | |
| 713 | return 0; |
| 714 | } |
| 715 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 716 | static u32 me_to_host_words_pending(void) |
| 717 | { |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 718 | union mei_csr me = read_me_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 719 | if (!me.ready) |
| 720 | return 0; |
| 721 | return (me.buffer_write_ptr - me.buffer_read_ptr) & |
| 722 | (me.buffer_depth - 1); |
| 723 | } |
| 724 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 725 | struct mbp_payload { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 726 | union mbp_header header; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 727 | u32 data[0]; |
| 728 | }; |
| 729 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 730 | /* |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 731 | * Read and print ME MBP data |
| 732 | * |
| 733 | * Return -1 to indicate a problem (give up) |
| 734 | * Return 0 to indicate success (send LOCK+EOP) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 735 | */ |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 736 | static int intel_me_read_mbp(struct me_bios_payload *mbp_data, struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 737 | { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 738 | union mbp_header mbp_hdr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 739 | u32 me2host_pending; |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 740 | union mei_csr host; |
Angel Pons | 032255c | 2021-11-24 14:12:38 +0100 | [diff] [blame] | 741 | union me_hfs2 hfs2 = { .raw = pci_read_config32(dev, PCI_ME_HFS2) }; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 742 | struct mbp_payload *mbp; |
| 743 | int i; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 744 | |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 745 | if (!hfs2.mbp_rdy) { |
| 746 | printk(BIOS_ERR, "ME: MBP not ready\n"); |
| 747 | goto mbp_failure; |
| 748 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 749 | |
| 750 | me2host_pending = me_to_host_words_pending(); |
| 751 | if (!me2host_pending) { |
| 752 | printk(BIOS_ERR, "ME: no mbp data!\n"); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 753 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 754 | } |
| 755 | |
| 756 | /* we know for sure that at least the header is there */ |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 757 | mbp_hdr.raw = read_cb(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 758 | |
| 759 | if ((mbp_hdr.num_entries > (mbp_hdr.mbp_size / 2)) || |
| 760 | (me2host_pending < mbp_hdr.mbp_size)) { |
| 761 | printk(BIOS_ERR, "ME: mbp of %d entries, total size %d words" |
| 762 | " buffer contains %d words\n", |
| 763 | mbp_hdr.num_entries, mbp_hdr.mbp_size, |
| 764 | me2host_pending); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 765 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 766 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 767 | mbp = malloc(mbp_hdr.mbp_size * sizeof(u32)); |
| 768 | if (!mbp) |
| 769 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 770 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 771 | mbp->header = mbp_hdr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 772 | me2host_pending--; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 773 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 774 | i = 0; |
| 775 | while (i != me2host_pending) { |
Angel Pons | df2049b | 2021-11-24 14:39:10 +0100 | [diff] [blame] | 776 | mbp->data[i] = read_cb(); |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 777 | i++; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 778 | } |
| 779 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 780 | /* Signal to the ME that the host has finished reading the MBP. */ |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 781 | host = read_host_csr(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 782 | host.interrupt_generate = 1; |
Angel Pons | 310d327 | 2021-11-24 14:59:42 +0100 | [diff] [blame] | 783 | write_host_csr(host); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 784 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 785 | /* Dump out the MBP contents. */ |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 786 | if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) { |
| 787 | printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n", |
| 788 | mbp->header.num_entries, mbp->header.mbp_size); |
| 789 | if (CONFIG(DEBUG_INTEL_ME)) { |
| 790 | for (i = 0; i < mbp->header.mbp_size - 1; i++) { |
| 791 | printk(BIOS_INFO, "ME MBP: %04x: 0x%08x\n", i, mbp->data[i]); |
| 792 | } |
| 793 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 794 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 795 | |
| 796 | #define ASSIGN_FIELD_PTR(field_,val_) \ |
| 797 | { \ |
| 798 | mbp_data->field_ = (typeof(mbp_data->field_))(void *)val_; \ |
| 799 | break; \ |
| 800 | } |
| 801 | /* Setup the pointers in the me_bios_payload structure. */ |
| 802 | for (i = 0; i < mbp->header.mbp_size - 1;) { |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 803 | struct mbp_item_header *item = (void *)&mbp->data[i]; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 804 | |
Elyes HAOUAS | f9de5a4 | 2018-05-03 17:21:02 +0200 | [diff] [blame] | 805 | switch (MBP_MAKE_IDENT(item->app_id, item->item_id)) { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 806 | case MBP_IDENT(KERNEL, FW_VER): |
| 807 | ASSIGN_FIELD_PTR(fw_version_name, &mbp->data[i+1]); |
| 808 | |
| 809 | case MBP_IDENT(ICC, PROFILE): |
| 810 | ASSIGN_FIELD_PTR(icc_profile, &mbp->data[i+1]); |
| 811 | |
| 812 | case MBP_IDENT(INTEL_AT, STATE): |
| 813 | ASSIGN_FIELD_PTR(at_state, &mbp->data[i+1]); |
| 814 | |
| 815 | case MBP_IDENT(KERNEL, FW_CAP): |
| 816 | ASSIGN_FIELD_PTR(fw_capabilities, &mbp->data[i+1]); |
| 817 | |
| 818 | case MBP_IDENT(KERNEL, ROM_BIST): |
| 819 | ASSIGN_FIELD_PTR(rom_bist_data, &mbp->data[i+1]); |
| 820 | |
| 821 | case MBP_IDENT(KERNEL, PLAT_KEY): |
| 822 | ASSIGN_FIELD_PTR(platform_key, &mbp->data[i+1]); |
| 823 | |
| 824 | case MBP_IDENT(KERNEL, FW_TYPE): |
| 825 | ASSIGN_FIELD_PTR(fw_plat_type, &mbp->data[i+1]); |
| 826 | |
| 827 | case MBP_IDENT(KERNEL, MFS_FAILURE): |
| 828 | ASSIGN_FIELD_PTR(mfsintegrity, &mbp->data[i+1]); |
| 829 | |
Duncan Laurie | 144f7b2 | 2013-05-01 11:27:58 -0700 | [diff] [blame] | 830 | case MBP_IDENT(KERNEL, PLAT_TIME): |
| 831 | ASSIGN_FIELD_PTR(plat_time, &mbp->data[i+1]); |
| 832 | |
| 833 | case MBP_IDENT(NFC, SUPPORT_DATA): |
| 834 | ASSIGN_FIELD_PTR(nfc_data, &mbp->data[i+1]); |
| 835 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 836 | default: |
Duncan Laurie | 0b3cd36 | 2013-08-08 15:40:01 -0700 | [diff] [blame] | 837 | printk(BIOS_ERR, "ME MBP: unknown item 0x%x @ " |
| 838 | "dw offset 0x%x\n", mbp->data[i], i); |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 839 | break; |
| 840 | } |
| 841 | i += item->length; |
| 842 | } |
| 843 | #undef ASSIGN_FIELD_PTR |
| 844 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 845 | return 0; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 846 | |
| 847 | mbp_failure: |
| 848 | intel_me_mbp_give_up(dev); |
| 849 | return -1; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 850 | } |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 851 | |
| 852 | /* Check whether ME is present and do basic init */ |
| 853 | static void intel_me_init(struct device *dev) |
| 854 | { |
| 855 | struct southbridge_intel_lynxpoint_config *config = dev->chip_info; |
Angel Pons | 9f04374 | 2021-11-24 12:46:12 +0100 | [diff] [blame] | 856 | enum me_bios_path path = intel_me_path(dev); |
Angel Pons | 01c9b98 | 2021-11-24 11:58:04 +0100 | [diff] [blame] | 857 | struct me_bios_payload mbp_data; |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 858 | |
| 859 | /* Do initial setup and determine the BIOS path */ |
| 860 | printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_bios_path_values[path]); |
| 861 | |
| 862 | if (path == ME_NORMAL_BIOS_PATH) { |
| 863 | /* Validate the extend register */ |
| 864 | intel_me_extend_valid(dev); |
| 865 | } |
| 866 | |
| 867 | memset(&mbp_data, 0, sizeof(mbp_data)); |
| 868 | |
| 869 | /* |
| 870 | * According to the ME9 BWG, BIOS is required to fetch MBP data in |
| 871 | * all boot flows except S3 Resume. |
| 872 | */ |
| 873 | |
| 874 | /* Prepare MEI MMIO interface */ |
| 875 | if (intel_mei_setup(dev) < 0) |
| 876 | return; |
| 877 | |
| 878 | if (intel_me_read_mbp(&mbp_data, dev)) |
| 879 | return; |
| 880 | |
| 881 | if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) { |
| 882 | me_print_fw_version(mbp_data.fw_version_name); |
| 883 | |
| 884 | if (CONFIG(DEBUG_INTEL_ME)) |
| 885 | me_print_fwcaps(mbp_data.fw_capabilities); |
| 886 | |
| 887 | if (mbp_data.plat_time) { |
| 888 | printk(BIOS_DEBUG, "ME: Wake Event to ME Reset: %u ms\n", |
| 889 | mbp_data.plat_time->wake_event_mrst_time_ms); |
| 890 | printk(BIOS_DEBUG, "ME: ME Reset to Platform Reset: %u ms\n", |
| 891 | mbp_data.plat_time->mrst_pltrst_time_ms); |
| 892 | printk(BIOS_DEBUG, "ME: Platform Reset to CPU Reset: %u ms\n", |
| 893 | mbp_data.plat_time->pltrst_cpurst_time_ms); |
| 894 | } |
| 895 | } |
| 896 | |
| 897 | /* Set clock enables according to devicetree */ |
| 898 | if (config && config->icc_clock_disable) |
| 899 | me_icc_set_clock_enables(config->icc_clock_disable); |
| 900 | |
| 901 | /* |
| 902 | * Leave the ME unlocked. It will be locked later. |
| 903 | */ |
| 904 | } |
| 905 | |
| 906 | static void intel_me_enable(struct device *dev) |
| 907 | { |
| 908 | /* Avoid talking to the device in S3 path */ |
Matt DeVillier | 52c553e | 2022-12-21 14:47:37 -0600 | [diff] [blame^] | 909 | if (acpi_is_wakeup_s3() && CONFIG(DISABLE_ME_PCI)) { |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 910 | dev->enabled = 0; |
| 911 | pch_disable_devfn(dev); |
| 912 | } |
| 913 | } |
| 914 | |
| 915 | static struct device_operations device_ops = { |
| 916 | .read_resources = pci_dev_read_resources, |
| 917 | .set_resources = pci_dev_set_resources, |
| 918 | .enable_resources = pci_dev_enable_resources, |
| 919 | .enable = intel_me_enable, |
| 920 | .init = intel_me_init, |
| 921 | .final = intel_me_finalize, |
| 922 | .ops_pci = &pci_dev_ops_pci, |
| 923 | }; |
| 924 | |
| 925 | static const unsigned short pci_device_ids[] = { |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 926 | PCI_DID_INTEL_LPT_H_MEI, |
| 927 | PCI_DID_INTEL_LPT_LP_MEI, |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 928 | 0 |
| 929 | }; |
| 930 | |
| 931 | static const struct pci_driver intel_me __pci_driver = { |
| 932 | .ops = &device_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 933 | .vendor = PCI_VID_INTEL, |
Angel Pons | 7f8da79 | 2021-02-23 14:27:39 +0100 | [diff] [blame] | 934 | .devices = pci_device_ids, |
| 935 | }; |