blob: 288dd093bff56b6656e632e11c071ecbc7ae0e47 [file] [log] [blame]
Stefan Reinauer00636b02012-04-04 00:08:51 +02001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
Stefan Reinauer00636b02012-04-04 00:08:51 +020015
Stefan Reinauer00636b02012-04-04 00:08:51 +020016
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -070017config NORTHBRIDGE_INTEL_SANDYBRIDGE
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020018 bool
Arthur Heymans7539b8c2017-12-24 10:42:57 +010019 select CACHE_MRC_SETTINGS
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020020 select CPU_INTEL_MODEL_206AX
21 select HAVE_DEBUG_RAM_SETUP
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010022 select INTEL_GMA_ACPI
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020023
Nico Huber772a1542019-05-10 16:48:14 +020024if NORTHBRIDGE_INTEL_SANDYBRIDGE
Vladimir Serbinenko144eea02016-02-10 02:36:04 +010025
Julius Werner1210b412017-03-27 19:26:32 -070026config VBOOT
27 select VBOOT_STARTS_IN_ROMSTAGE
28
Vladimir Serbinenko144eea02016-02-10 02:36:04 +010029config USE_NATIVE_RAMINIT
30 bool "Use native raminit"
31 default y
32 help
33 Select if you want to use coreboot implementation of raminit rather than
34 System Agent/MRC.bin. You should answer Y.
Stefan Reinauer00636b02012-04-04 00:08:51 +020035
Patrick Rudolphb794a692017-08-08 13:13:51 +020036config NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES
37 bool "Ignore vendor programmed fuses that limit max. DRAM frequency"
38 default n
39 depends on USE_NATIVE_RAMINIT
40 help
41 Ignore the mainboard's vendor programmed fuses that might limit the
42 maximum DRAM frequency. By selecting this option the fuses will be
43 ignored and the only limits on DRAM frequency are set by RAM's SPD and
44 hard fuses in southbridge's clockgen.
45 Disabled by default as it might causes system instability.
46 Handle with care!
47
Vagiz Trakhanov771be482017-10-02 10:02:35 +000048config NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS
49 bool "Ignore XMP profile max DIMMs per channel"
50 default n
51 depends on USE_NATIVE_RAMINIT
52 help
53 Ignore the max DIMMs per channel restriciton defined in XMP profiles.
54 Disabled by default as it might cause system instability.
55 Handle with care!
56
Martin Roth59ff3402016-02-09 09:06:46 -070057config CBFS_SIZE
58 hex
59 default 0x100000
60
Stefan Reinauer00636b02012-04-04 00:08:51 +020061config VGA_BIOS_ID
62 string
63 default "8086,0106"
64
Kyösti Mälkki9551bed2016-07-20 10:49:38 +030065config BOOTBLOCK_NORTHBRIDGE_INIT
66 string
67 default "northbridge/intel/sandybridge/bootblock.c"
68
Nico Huber2b5c0212017-07-29 01:10:49 +020069config MMCONF_BASE_ADDRESS
70 hex
Nico Huber2b5c0212017-07-29 01:10:49 +020071 default 0xf0000000
72 help
Arthur Heymans742a0e92018-01-29 16:34:46 +010073 The MRC blob requires it to be at 0xf0000000.
Nico Huber2b5c0212017-07-29 01:10:49 +020074
Stefan Reinauer00636b02012-04-04 00:08:51 +020075config DCACHE_RAM_BASE
76 hex
Kyösti Mälkki9551bed2016-07-20 10:49:38 +030077 default 0xfefe0000
Stefan Reinauer00636b02012-04-04 00:08:51 +020078
Arthur Heymans67d59d12019-11-16 20:06:20 +010079config DCACHE_BSP_STACK_SIZE
80 hex
81 default 0x2800
Arthur Heymans01c83a22019-06-05 13:36:55 +020082
83if USE_NATIVE_RAMINIT
84
Stefan Reinauer00636b02012-04-04 00:08:51 +020085config DCACHE_RAM_SIZE
86 hex
87 default 0x20000
88
Kyösti Mälkki9551bed2016-07-20 10:49:38 +030089config DCACHE_RAM_MRC_VAR_SIZE
90 hex
91 default 0x0
92
93endif # USE_NATIVE_RAMINIT
94
95if !USE_NATIVE_RAMINIT
96
Kyösti Mälkki9551bed2016-07-20 10:49:38 +030097config DCACHE_RAM_SIZE
98 hex
Arthur Heymans01c83a22019-06-05 13:36:55 +020099 default 0x17000
Kyösti Mälkkifbdb0852013-07-01 11:21:53 +0300100
Stefan Reinauer00636b02012-04-04 00:08:51 +0200101config DCACHE_RAM_MRC_VAR_SIZE
102 hex
Arthur Heymans01c83a22019-06-05 13:36:55 +0200103 default 0x9000
Stefan Reinauer00636b02012-04-04 00:08:51 +0200104
Stefan Reinauer00636b02012-04-04 00:08:51 +0200105config MRC_FILE
106 string "Intel System Agent path and filename"
Patrick Georgi26e24cc2015-05-05 22:27:25 +0200107 default "3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
Stefan Reinauer00636b02012-04-04 00:08:51 +0200108 help
109 The path and filename of the file to use as System Agent
110 binary.
111
Kyösti Mälkki9551bed2016-07-20 10:49:38 +0300112endif # !USE_NATIVE_RAMINIT
Kyösti Mälkki0306e6a2016-06-23 12:41:40 +0300113
Stefan Reinauer00636b02012-04-04 00:08:51 +0200114endif