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Stefan Reinauer00636b02012-04-04 00:08:51 +02001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Stefan Reinauer00636b02012-04-04 00:08:51 +020018##
19
20config NORTHBRIDGE_INTEL_SANDYBRIDGE
21 bool
22 select CACHE_MRC_BIN
Kyösti Mälkkifbdb0852013-07-01 11:21:53 +030023 select MMCONF_SUPPORT
24 select MMCONF_SUPPORT_DEFAULT
Stefan Reinauer00636b02012-04-04 00:08:51 +020025 select CPU_INTEL_MODEL_206AX
Vladimir Serbinenko35c0f432014-09-02 22:25:36 +020026 select PER_DEVICE_ACPI_TABLES
Stefan Reinauer00636b02012-04-04 00:08:51 +020027
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020028config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
29 bool
30 select CACHE_MRC_BIN
31 select MMCONF_SUPPORT
32 select MMCONF_SUPPORT_DEFAULT
33 select CPU_INTEL_MODEL_206AX
34 select HAVE_DEBUG_RAM_SETUP
Vladimir Serbinenko35c0f432014-09-02 22:25:36 +020035 select PER_DEVICE_ACPI_TABLES
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020036
Stefan Reinauer00636b02012-04-04 00:08:51 +020037config NORTHBRIDGE_INTEL_IVYBRIDGE
38 bool
39 select CACHE_MRC_BIN
Kyösti Mälkkifbdb0852013-07-01 11:21:53 +030040 select MMCONF_SUPPORT
41 select MMCONF_SUPPORT_DEFAULT
Stefan Reinauer00636b02012-04-04 00:08:51 +020042 select CPU_INTEL_MODEL_306AX
Vladimir Serbinenko35c0f432014-09-02 22:25:36 +020043 select PER_DEVICE_ACPI_TABLES
Stefan Reinauer00636b02012-04-04 00:08:51 +020044
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020045config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
46 bool
47 select CACHE_MRC_BIN
48 select MMCONF_SUPPORT
49 select MMCONF_SUPPORT_DEFAULT
50 select CPU_INTEL_MODEL_306AX
51 select HAVE_DEBUG_RAM_SETUP
Vladimir Serbinenko35c0f432014-09-02 22:25:36 +020052 select PER_DEVICE_ACPI_TABLES
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020053
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020054if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
Stefan Reinauer00636b02012-04-04 00:08:51 +020055
56config VGA_BIOS_ID
57 string
58 default "8086,0106"
59
60config CACHE_MRC_SIZE_KB
61 int
Stefan Reinauer00636b02012-04-04 00:08:51 +020062 default 512
63
Vladimir Serbinenko1783a3c2014-02-23 00:10:35 +010064config IVYBRIDGE_LVDS
65 bool
66 default n
67
Vladimir Serbinenko9ba922f2014-08-24 22:38:07 +020068config SANDYBRIDGE_LVDS
69 bool
70 default n
71
Stefan Reinauer48214892012-06-06 13:24:32 -070072config MRC_CACHE_SIZE
73 hex
Stefan Reinauer357bb2d2012-08-09 13:44:38 -070074 depends on !CHROMEOS
Stefan Reinauer48214892012-06-06 13:24:32 -070075 default 0x10000
76
Stefan Reinauer00636b02012-04-04 00:08:51 +020077config DCACHE_RAM_BASE
78 hex
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020079 default 0xff7e0000 if NORTHBRIDGE_INTEL_IVYBRIDGE
80 default 0xff7e0000 if NORTHBRIDGE_INTEL_SANDYBRIDGE
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020081 default 0xfefe0000 if NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020082 default 0xfefe0000 if NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
Stefan Reinauer00636b02012-04-04 00:08:51 +020083
84config DCACHE_RAM_SIZE
85 hex
86 default 0x20000
87
Kyösti Mälkkifbdb0852013-07-01 11:21:53 +030088config BOOTBLOCK_NORTHBRIDGE_INIT
89 string
90 default "northbridge/intel/sandybridge/bootblock.c"
91
Stefan Reinauer00636b02012-04-04 00:08:51 +020092config DCACHE_RAM_MRC_VAR_SIZE
93 hex
94 default 0x4000
95
96config HAVE_MRC
97 bool "Add a System Agent binary"
Vladimir Serbinenko309fc4c2014-08-24 22:35:29 +020098 depends on !NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE && !NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
Stefan Reinauer00636b02012-04-04 00:08:51 +020099 help
100 Select this option to add a System Agent binary to
101 the resulting coreboot image.
102
103 Note: Without this binary coreboot will not work
104
105config MRC_FILE
106 string "Intel System Agent path and filename"
107 depends on HAVE_MRC
Patrick Georgi26e24cc2015-05-05 22:27:25 +0200108 default "3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
Stefan Reinauer00636b02012-04-04 00:08:51 +0200109 help
110 The path and filename of the file to use as System Agent
111 binary.
112
Stefan Reinauera1ea8222012-08-15 16:28:48 -0700113config CBFS_SIZE
114 hex "Size of CBFS filesystem in ROM"
115 default 0x100000
116 help
117 On Sandybridge and Ivybridge systems the firmware image has to
118 store a lot more than just coreboot, including:
119 - a firmware descriptor
120 - Intel Management Engine firmware
121 - MRC cache information
122 This option allows to limit the size of the CBFS portion in the
123 firmware image.
124
Stefan Reinauer00636b02012-04-04 00:08:51 +0200125endif