Angel Pons | 6e5aabd | 2020-03-23 23:44:42 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 2 | |
| 3 | #ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__ |
Edward O'Callaghan | 089a510 | 2015-01-06 02:48:57 +1100 | [diff] [blame] | 4 | #define __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 5 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 6 | /* Device ID for SandyBridge and IvyBridge */ |
| 7 | #define BASE_REV_SNB 0x00 |
| 8 | #define BASE_REV_IVB 0x50 |
| 9 | #define BASE_REV_MASK 0x50 |
| 10 | |
Angel Pons | dfca169 | 2020-09-14 16:54:42 +0200 | [diff] [blame] | 11 | #include "memmap.h" |
Nico Huber | bb9469c | 2015-10-21 11:49:23 +0200 | [diff] [blame] | 12 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 13 | /* Everything below this line is ignored in the DSDT */ |
| 14 | #ifndef __ACPI__ |
Angel Pons | 964d91f | 2020-12-07 13:11:17 +0100 | [diff] [blame] | 15 | #include <types.h> |
Patrick Rudolph | 74203de | 2017-11-20 11:57:01 +0100 | [diff] [blame] | 16 | |
| 17 | /* Chipset types */ |
| 18 | enum platform_type { |
| 19 | PLATFORM_MOBILE = 0, |
| 20 | PLATFORM_DESKTOP_SERVER, |
| 21 | }; |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 22 | |
| 23 | /* Device 0:0.0 PCI configuration space (Host Bridge) */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 24 | #define HOST_BRIDGE PCI_DEV(0, 0, 0) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 25 | |
Angel Pons | 3447db5 | 2020-09-14 18:09:46 +0200 | [diff] [blame] | 26 | #include "registers/host_bridge.h" |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 27 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 28 | /* Devices 0:1.0, 0:1.1, 0:1.2, 0:6.0 PCI configuration space (PCI Express Graphics) */ |
| 29 | |
| 30 | #define AFE_PWRON 0xc24 /* PEG Analog Front-End Power-On */ |
| 31 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 32 | /* Device 0:2.0 PCI configuration space (Graphics Device) */ |
| 33 | |
| 34 | #define MSAC 0x62 /* Multi Size Aperture Control */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * MCHBAR |
| 38 | */ |
| 39 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 40 | #define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) |
Felix Held | b9267f0 | 2018-07-28 14:49:31 +0200 | [diff] [blame] | 41 | #define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) |
Angel Pons | 7431593 | 2020-09-14 16:50:49 +0200 | [diff] [blame] | 42 | #define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 43 | #define MCHBAR8_AND(x, and) (MCHBAR8(x) = MCHBAR8(x) & (and)) |
| 44 | #define MCHBAR16_AND(x, and) (MCHBAR16(x) = MCHBAR16(x) & (and)) |
| 45 | #define MCHBAR32_AND(x, and) (MCHBAR32(x) = MCHBAR32(x) & (and)) |
| 46 | #define MCHBAR8_OR(x, or) (MCHBAR8(x) = MCHBAR8(x) | (or)) |
| 47 | #define MCHBAR16_OR(x, or) (MCHBAR16(x) = MCHBAR16(x) | (or)) |
| 48 | #define MCHBAR32_OR(x, or) (MCHBAR32(x) = MCHBAR32(x) | (or)) |
| 49 | #define MCHBAR8_AND_OR(x, and, or) (MCHBAR8(x) = (MCHBAR8(x) & (and)) | (or)) |
| 50 | #define MCHBAR16_AND_OR(x, and, or) (MCHBAR16(x) = (MCHBAR16(x) & (and)) | (or)) |
Angel Pons | 26be0bd | 2019-12-31 14:29:48 +0100 | [diff] [blame] | 51 | #define MCHBAR32_AND_OR(x, and, or) (MCHBAR32(x) = (MCHBAR32(x) & (and)) | (or)) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 52 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 53 | /* As there are many registers, define them on a separate file */ |
Angel Pons | 3447db5 | 2020-09-14 18:09:46 +0200 | [diff] [blame] | 54 | #include "registers/mchbar.h" |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 55 | |
| 56 | /* |
| 57 | * EPBAR - Egress Port Root Complex Register Block |
| 58 | */ |
| 59 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 60 | #define EPBAR8(x) (*((volatile u8 *)(DEFAULT_EPBAR + (x)))) |
Felix Held | b9267f0 | 2018-07-28 14:49:31 +0200 | [diff] [blame] | 61 | #define EPBAR16(x) (*((volatile u16 *)(DEFAULT_EPBAR + (x)))) |
| 62 | #define EPBAR32(x) (*((volatile u32 *)(DEFAULT_EPBAR + (x)))) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 63 | |
Angel Pons | b8ebeba | 2020-09-14 18:11:40 +0200 | [diff] [blame] | 64 | #include "registers/epbar.h" |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 65 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 66 | /* |
| 67 | * DMIBAR |
| 68 | */ |
| 69 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 70 | #define DMIBAR8(x) (*((volatile u8 *)(DEFAULT_DMIBAR + (x)))) |
Felix Held | b9267f0 | 2018-07-28 14:49:31 +0200 | [diff] [blame] | 71 | #define DMIBAR16(x) (*((volatile u16 *)(DEFAULT_DMIBAR + (x)))) |
| 72 | #define DMIBAR32(x) (*((volatile u32 *)(DEFAULT_DMIBAR + (x)))) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 73 | |
Angel Pons | b8ebeba | 2020-09-14 18:11:40 +0200 | [diff] [blame] | 74 | #include "registers/dmibar.h" |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 75 | |
| 76 | #ifndef __ASSEMBLER__ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 77 | |
Angel Pons | 964d91f | 2020-12-07 13:11:17 +0100 | [diff] [blame] | 78 | bool is_sandybridge(void); |
| 79 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 80 | void intel_sandybridge_finalize_smm(void); |
Patrick Rudolph | 2cdb65d | 2019-03-24 18:08:43 +0100 | [diff] [blame] | 81 | void systemagent_early_init(void); |
Nico Huber | bb9469c | 2015-10-21 11:49:23 +0200 | [diff] [blame] | 82 | void sandybridge_init_iommu(void); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 83 | void sandybridge_late_initialization(void); |
Vladimir Serbinenko | c845b43 | 2014-09-05 03:37:44 +0200 | [diff] [blame] | 84 | void northbridge_romstage_finalize(int s3resume); |
Patrick Rudolph | 6aca7e6 | 2019-03-26 18:22:36 +0100 | [diff] [blame] | 85 | void early_init_dmi(void); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 86 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 87 | /* mainboard_early_init: Optional callback, run after console init but before raminit. */ |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 88 | void mainboard_early_init(int s3resume); |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 89 | int mainboard_should_reset_usb(int s3resume); |
| 90 | void perform_raminit(int s3resume); |
Angel Pons | 064c799 | 2020-03-17 23:09:16 +0100 | [diff] [blame] | 91 | void report_memory_config(void); |
Patrick Rudolph | 74203de | 2017-11-20 11:57:01 +0100 | [diff] [blame] | 92 | enum platform_type get_platform_type(void); |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 93 | |
Angel Pons | 8bf1976 | 2020-08-03 14:55:18 +0200 | [diff] [blame] | 94 | int decode_pcie_bar(u32 *const base, u32 *const len); |
| 95 | |
Nico Huber | 9d9ce0d | 2015-10-26 12:59:49 +0100 | [diff] [blame] | 96 | #include <device/device.h> |
| 97 | |
| 98 | struct acpi_rsdp; |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 99 | unsigned long northbridge_write_acpi_tables(const struct device *device, unsigned long start, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 100 | struct acpi_rsdp *rsdp); |
Nico Huber | 9d9ce0d | 2015-10-26 12:59:49 +0100 | [diff] [blame] | 101 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 102 | #endif |
| 103 | #endif |
Edward O'Callaghan | 089a510 | 2015-01-06 02:48:57 +1100 | [diff] [blame] | 104 | #endif /* __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__ */ |