Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Change-Id: I11e09804ed1d8a7ae8b8d4502bd18f6be933f9fa
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13656
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 0a1f20a..570e1f7 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -215,8 +215,16 @@
void dump_spd_registers(void);
void dump_mem(unsigned start, unsigned end);
void report_platform_info(void);
+
#endif /* !__SMM__ */
+void rcba_config(void);
+void pch_enable_lpc(void);
+void mainboard_early_init(int s3resume);
+void mainboard_config_superio(void);
+int mainboard_should_reset_usb(int s3resume);
+void perform_raminit(int s3resume);
+
#if ENV_RAMSTAGE
#include <device/device.h>