blob: fa0209ae782596d50af7961948accb81b18f5df1 [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Arthur Heymans7b9c1392017-04-09 20:40:39 +02002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
7#include <device/pci_ops.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02008#include <device/mmio.h>
Arthur Heymans7b9c1392017-04-09 20:40:39 +02009#include <device/azalia_device.h>
Kyösti Mälkki12b121c2019-08-18 16:33:39 +030010#include "chip.h"
Arthur Heymans349e0852017-04-09 20:48:37 +020011#include "i82801jx.h"
Arthur Heymans7b9c1392017-04-09 20:40:39 +020012
Arthur Heymans7b9c1392017-04-09 20:40:39 +020013static int codec_detect(u8 *base)
14{
15 u32 reg32;
16
Angel Pons2e0053b2020-12-05 19:06:55 +010017 if (azalia_enter_reset(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +020018 goto no_codec;
19
Angel Pons7f839f62020-12-05 19:02:14 +010020 if (azalia_exit_reset(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +020021 goto no_codec;
22
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020023 /* Read in Codec location (BAR + 0xe)[2..0] */
Elyes HAOUAS388c88b2020-08-03 15:36:20 +020024 reg32 = read32(base + HDA_STATESTS_REG);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020025 reg32 &= 0x0f;
26 if (!reg32)
27 goto no_codec;
28
29 return reg32;
30
31no_codec:
Angel Pons2e0053b2020-12-05 19:06:55 +010032 /* Codec not found, put HDA back in reset */
33 azalia_enter_reset(base);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020034 printk(BIOS_DEBUG, "Azalia: No codec!\n");
35 return 0;
36}
37
Arthur Heymans7b9c1392017-04-09 20:40:39 +020038static void azalia_init(struct device *dev)
39{
40 u8 *base;
41 struct resource *res;
42 u32 codec_mask;
Arthur Heymans7b9c1392017-04-09 20:40:39 +020043
44 // ESD
Angel Pons2048cb42020-06-08 02:09:33 +020045 pci_update_config32(dev, 0x134, ~0x00ff0000, 2 << 16);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020046
47 // Link1 description
Angel Pons2048cb42020-06-08 02:09:33 +020048 pci_update_config32(dev, 0x140, ~0x00ff0000, 2 << 16);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020049
50 // Port VC0 Resource Control Register
Angel Pons2048cb42020-06-08 02:09:33 +020051 pci_update_config32(dev, 0x114, ~0x000000ff, 1);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020052
53 // VCi traffic class
Angel Pons7a2864b2020-06-21 13:29:28 +020054 pci_or_config8(dev, 0x44, 7 << 0); // TC7
Arthur Heymans7b9c1392017-04-09 20:40:39 +020055
56 // VCi Resource Control
Angel Pons2048cb42020-06-08 02:09:33 +020057 pci_or_config32(dev, 0x120, (1 << 31) | (1 << 24) | (0x80 << 0)); /* VCi ID and map */
Arthur Heymans7b9c1392017-04-09 20:40:39 +020058
59 /* Set Bus Master */
Elyes HAOUASca4ff252020-04-28 10:29:11 +020060 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020061
Angel Pons2048cb42020-06-08 02:09:33 +020062 // Docking not supported
63 pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
Arthur Heymans7b9c1392017-04-09 20:40:39 +020064
65 /* Lock some R/WO bits by writing their current value. */
Angel Pons2048cb42020-06-08 02:09:33 +020066 pci_update_config32(dev, 0x74, ~0, 0);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020067
Angel Ponsf32ae102021-11-03 13:07:14 +010068 res = probe_resource(dev, PCI_BASE_ADDRESS_0);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020069 if (!res)
70 return;
71
Martin Roth26f97f92021-10-01 14:53:22 -060072 // NOTE this will break as soon as the Azalia gets a bar above 4G.
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020073 // Is there anything we can do about it?
Arthur Heymans7b9c1392017-04-09 20:40:39 +020074 base = res2mmio(res, 0, 0);
Angel Pons7a2864b2020-06-21 13:29:28 +020075 printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020076 codec_mask = codec_detect(base);
77
78 if (codec_mask) {
79 printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask);
Angel Ponsaae6b552021-11-10 18:10:38 +010080 azalia_codecs_init(base, codec_mask);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020081 }
82}
83
Arthur Heymans7b9c1392017-04-09 20:40:39 +020084static struct device_operations azalia_ops = {
85 .read_resources = pci_dev_read_resources,
86 .set_resources = pci_dev_set_resources,
87 .enable_resources = pci_dev_enable_resources,
88 .init = azalia_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +020089 .ops_pci = &pci_dev_ops_pci,
Arthur Heymans7b9c1392017-04-09 20:40:39 +020090};
91
Arthur Heymans349e0852017-04-09 20:48:37 +020092static const unsigned short pci_device_ids[] = {
93 0x3a3e,
94 0x3a6e,
95 0
96};
97
98static const struct pci_driver i82801jx_azalia __pci_driver = {
Arthur Heymans7b9c1392017-04-09 20:40:39 +020099 .ops = &azalia_ops,
Felix Singer43b7f412022-03-07 04:34:52 +0100100 .vendor = PCI_VID_INTEL,
Arthur Heymans349e0852017-04-09 20:48:37 +0200101 .devices = pci_device_ids,
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200102};