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Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Arthur Heymans7b9c1392017-04-09 20:40:39 +02002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
7#include <device/pci_ops.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02008#include <device/mmio.h>
Arthur Heymans7b9c1392017-04-09 20:40:39 +02009#include <delay.h>
10#include <device/azalia_device.h>
Kyösti Mälkki12b121c2019-08-18 16:33:39 +030011#include "chip.h"
Arthur Heymans349e0852017-04-09 20:48:37 +020012#include "i82801jx.h"
Arthur Heymans7b9c1392017-04-09 20:40:39 +020013
Arthur Heymans7b9c1392017-04-09 20:40:39 +020014static int codec_detect(u8 *base)
15{
16 u32 reg32;
17
Angel Pons2e0053b2020-12-05 19:06:55 +010018 if (azalia_enter_reset(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +020019 goto no_codec;
20
Angel Pons7f839f62020-12-05 19:02:14 +010021 if (azalia_exit_reset(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +020022 goto no_codec;
23
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020024 /* Read in Codec location (BAR + 0xe)[2..0] */
Elyes HAOUAS388c88b2020-08-03 15:36:20 +020025 reg32 = read32(base + HDA_STATESTS_REG);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020026 reg32 &= 0x0f;
27 if (!reg32)
28 goto no_codec;
29
30 return reg32;
31
32no_codec:
Angel Pons2e0053b2020-12-05 19:06:55 +010033 /* Codec not found, put HDA back in reset */
34 azalia_enter_reset(base);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020035 printk(BIOS_DEBUG, "Azalia: No codec!\n");
36 return 0;
37}
38
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020039/*
40 * Wait 50usec for the codec to indicate it is ready.
41 * No response would imply that the codec is non-operative.
Arthur Heymans7b9c1392017-04-09 20:40:39 +020042 */
43
44static int wait_for_ready(u8 *base)
45{
Angel Pons7a2864b2020-06-21 13:29:28 +020046 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Arthur Heymans7b9c1392017-04-09 20:40:39 +020047 int timeout = 50;
48
49 while (timeout--) {
50 u32 reg32 = read32(base + HDA_ICII_REG);
51 if (!(reg32 & HDA_ICII_BUSY))
52 return 0;
53 udelay(1);
54 }
55
56 return -1;
57}
58
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020059/*
60 * Wait 50usec for the codec to indicate that it accepted the previous command.
61 * No response would imply that the code is non-operative.
Arthur Heymans7b9c1392017-04-09 20:40:39 +020062 */
63
64static int wait_for_valid(u8 *base)
65{
66 u32 reg32;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020067 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
68 int timeout = 50;
Arthur Heymans7b9c1392017-04-09 20:40:39 +020069
70 /* Send the verb to the codec */
Elyes HAOUAS388c88b2020-08-03 15:36:20 +020071 reg32 = read32(base + HDA_ICII_REG);
72 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
73 write32(base + HDA_ICII_REG, reg32);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020074
Arthur Heymans7b9c1392017-04-09 20:40:39 +020075 while (timeout--) {
76 reg32 = read32(base + HDA_ICII_REG);
Angel Pons7a2864b2020-06-21 13:29:28 +020077 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Arthur Heymans7b9c1392017-04-09 20:40:39 +020078 return 0;
79 udelay(1);
80 }
81
82 return -1;
83}
84
85static void codec_init(struct device *dev, u8 *base, int addr)
86{
87 u32 reg32;
88 const u32 *verb;
89 u32 verb_size;
90 int i;
91
Angel Ponsaaa8ab72020-06-21 15:33:24 +020092 printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
Arthur Heymans7b9c1392017-04-09 20:40:39 +020093
94 /* 1 */
Angel Pons554713e2020-10-24 23:23:07 +020095 if (wait_for_ready(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020096 printk(BIOS_DEBUG, " codec not ready.\n");
Arthur Heymans7b9c1392017-04-09 20:40:39 +020097 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020098 }
Arthur Heymans7b9c1392017-04-09 20:40:39 +020099
100 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUAS388c88b2020-08-03 15:36:20 +0200101 write32(base + HDA_IC_REG, reg32);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200102
Angel Pons554713e2020-10-24 23:23:07 +0200103 if (wait_for_valid(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200104 printk(BIOS_DEBUG, " codec not valid.\n");
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200105 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200106 }
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200107
108 /* 2 */
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200109 reg32 = read32(base + HDA_IR_REG);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200110 printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
Angel Ponsd425ddd2020-12-05 18:22:58 +0100111 verb_size = azalia_find_verb(cim_verb_data, cim_verb_data_size, reg32, &verb);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200112
113 if (!verb_size) {
114 printk(BIOS_DEBUG, "Azalia: No verb!\n");
115 return;
116 }
117 printk(BIOS_DEBUG, "Azalia: verb_size: %d\n", verb_size);
118
119 /* 3 */
120 for (i = 0; i < verb_size; i++) {
Angel Pons554713e2020-10-24 23:23:07 +0200121 if (wait_for_ready(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200122 return;
123
Elyes HAOUAS388c88b2020-08-03 15:36:20 +0200124 write32(base + HDA_IC_REG, verb[i]);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200125
Angel Pons554713e2020-10-24 23:23:07 +0200126 if (wait_for_valid(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200127 return;
128 }
129 printk(BIOS_DEBUG, "Azalia: verb loaded.\n");
130}
131
132static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
133{
134 int i;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200135
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200136 for (i = 2; i >= 0; i--) {
137 if (codec_mask & (1 << i))
138 codec_init(dev, base, i);
139 }
140
141 for (i = 0; i < pc_beep_verbs_size; i++) {
Angel Pons554713e2020-10-24 23:23:07 +0200142 if (wait_for_ready(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200143 return;
144
Elyes HAOUAS388c88b2020-08-03 15:36:20 +0200145 write32(base + HDA_IC_REG, pc_beep_verbs[i]);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200146
Angel Pons554713e2020-10-24 23:23:07 +0200147 if (wait_for_valid(base) < 0)
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200148 return;
149 }
150}
151
152static void azalia_init(struct device *dev)
153{
154 u8 *base;
155 struct resource *res;
156 u32 codec_mask;
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200157
158 // ESD
Angel Pons2048cb42020-06-08 02:09:33 +0200159 pci_update_config32(dev, 0x134, ~0x00ff0000, 2 << 16);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200160
161 // Link1 description
Angel Pons2048cb42020-06-08 02:09:33 +0200162 pci_update_config32(dev, 0x140, ~0x00ff0000, 2 << 16);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200163
164 // Port VC0 Resource Control Register
Angel Pons2048cb42020-06-08 02:09:33 +0200165 pci_update_config32(dev, 0x114, ~0x000000ff, 1);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200166
167 // VCi traffic class
Angel Pons7a2864b2020-06-21 13:29:28 +0200168 pci_or_config8(dev, 0x44, 7 << 0); // TC7
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200169
170 // VCi Resource Control
Angel Pons2048cb42020-06-08 02:09:33 +0200171 pci_or_config32(dev, 0x120, (1 << 31) | (1 << 24) | (0x80 << 0)); /* VCi ID and map */
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200172
173 /* Set Bus Master */
Elyes HAOUASca4ff252020-04-28 10:29:11 +0200174 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200175
Angel Pons2048cb42020-06-08 02:09:33 +0200176 // Docking not supported
177 pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200178
179 /* Lock some R/WO bits by writing their current value. */
Angel Pons2048cb42020-06-08 02:09:33 +0200180 pci_update_config32(dev, 0x74, ~0, 0);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200181
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200182 res = find_resource(dev, PCI_BASE_ADDRESS_0);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200183 if (!res)
184 return;
185
Martin Roth26f97f92021-10-01 14:53:22 -0600186 // NOTE this will break as soon as the Azalia gets a bar above 4G.
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200187 // Is there anything we can do about it?
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200188 base = res2mmio(res, 0, 0);
Angel Pons7a2864b2020-06-21 13:29:28 +0200189 printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200190 codec_mask = codec_detect(base);
191
192 if (codec_mask) {
193 printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask);
194 codecs_init(dev, base, codec_mask);
195 }
196}
197
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200198static struct device_operations azalia_ops = {
199 .read_resources = pci_dev_read_resources,
200 .set_resources = pci_dev_set_resources,
201 .enable_resources = pci_dev_enable_resources,
202 .init = azalia_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200203 .ops_pci = &pci_dev_ops_pci,
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200204};
205
Arthur Heymans349e0852017-04-09 20:48:37 +0200206static const unsigned short pci_device_ids[] = {
207 0x3a3e,
208 0x3a6e,
209 0
210};
211
212static const struct pci_driver i82801jx_azalia __pci_driver = {
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200213 .ops = &azalia_ops,
214 .vendor = PCI_VENDOR_ID_INTEL,
Arthur Heymans349e0852017-04-09 20:48:37 +0200215 .devices = pci_device_ids,
Arthur Heymans7b9c1392017-04-09 20:40:39 +0200216};