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review.coreboot.org / coreboot / 33d0fb8d346512e1b6819fa70cb17212ea014336 / . / src / drivers / amd / agesa / cache_as_ram.S
blob: 4417e6459531453f0247bd4f8b81e98fe188b89b [file] [log] [blame]
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]12 */
efdesign984b508342011-07-13 17:16:13 -0700[diff] [blame]13
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]14/******************************************************************************
15 * AMD Generic Encapsulated Software Architecture
16 *
Kyösti Mälkki7076aa52017-09-02 16:20:15 +0300[diff] [blame]17 * $Workfile:: cache_as_ram.S
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]18 *
Kyösti Mälkki7076aa52017-09-02 16:20:15 +0300[diff] [blame]19 * Description: cache_as_ram.S - AGESA Module Entry Point for GCC complier
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]20 *
21 ******************************************************************************
efdesign984b508342011-07-13 17:16:13 -0700[diff] [blame]22 */
23
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]24#include "gcccar.inc"
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]25#include <cpu/x86/lapic_def.h>
Kyösti Mälkki7076aa52017-09-02 16:20:15 +0300[diff] [blame]26#include <cpu/x86/post_code.h>
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]27
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]28.code32
Kyösti Mälkki7076aa52017-09-02 16:20:15 +0300[diff] [blame]29.globl _cache_as_ram_setup, _cache_as_ram_setup_end
efdesign987c0c64e2011-06-20 19:56:06 -0700[diff] [blame]30
Kyösti Mälkki7076aa52017-09-02 16:20:15 +0300[diff] [blame]31_cache_as_ram_setup:
efdesign984b508342011-07-13 17:16:13 -0700[diff] [blame]32
Elyes HAOUASdea45c12018-12-27 09:14:07 +0100[diff] [blame]33 post_code(0xa0)
efdesign984b508342011-07-13 17:16:13 -0700[diff] [blame]34
Elyes HAOUASdea45c12018-12-27 09:14:07 +0100[diff] [blame]35 AMD_ENABLE_STACK
Kyösti Mälkkif6fe2f12016-11-21 11:26:48 +0200[diff] [blame]36
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]37 /*
38 * Set up bootblock stack on BSP.
39 * AMD_ENABLE_STACK macro sets up a stack for BSP at BSP_STACK_BASE_ADDR
40 * which is 0x30000 (_car_region_end), but for C bootblock the stack
41 * begins at _ecar_stack (see arch/x86/car.ld)
42 */
43 mov $LAPIC_BASE_MSR, %ecx
44 rdmsr
45 test $LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR, %eax
46 jz ap_entry
47
48 mov $_ecar_stack, %esp
49
Kyösti Mälkki33d0fb82019-11-29 06:38:46 +0200[diff] [blame^]50 /* Align the stack and keep aligned for call to bootblock_c_entry() */
51 and $0xfffffff0, %esp
52 sub $8, %esp
Kyösti Mälkki26929bd2016-11-23 20:40:53 +0200[diff] [blame]53
Kyösti Mälkki33d0fb82019-11-29 06:38:46 +0200[diff] [blame^]54 pushl $0 /* tsc[63:32] */
55 pushl $0 /* tsc[31:0] */
56
57 post_code(0xa2)
58
59 call bootblock_c_entry
Kyösti Mälkki63fac812017-09-02 16:41:43 +0300[diff] [blame]60
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]61 /* Never reached. */
Kyösti Mälkki63fac812017-09-02 16:41:43 +0300[diff] [blame]62
Kyösti Mälkkiba22e152016-11-23 06:47:15 +0200[diff] [blame]63stop:
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]64 post_code(POST_DEAD_CODE)
Elyes HAOUASdea45c12018-12-27 09:14:07 +0100[diff] [blame]65 hlt
66 jmp stop
Kyösti Mälkki63fac812017-09-02 16:41:43 +0300[diff] [blame]67
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]68ap_entry:
Kyösti Mälkki33d0fb82019-11-29 06:38:46 +0200[diff] [blame^]69 /* Align the stack for call to ap_bootblock_c_entry() */
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]70 and $0xfffffff0, %esp
Kyösti Mälkki33d0fb82019-11-29 06:38:46 +0200[diff] [blame^]71 call ap_bootblock_c_entry
Michał Żygowski3aa17f72019-11-24 16:32:05 +0100[diff] [blame]72
73 /* Never reached. */
74 jmp stop
75
Kyösti Mälkki7076aa52017-09-02 16:20:15 +0300[diff] [blame]76_cache_as_ram_setup_end: