src/northbridge/intel/sandybridge/Kconfig

##
## This file is part of the coreboot project.
##
## Copyright (C) 2010 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##

config NORTHBRIDGE_INTEL_SANDYBRIDGE
	bool
	select CACHE_MRC_BIN
	select MMCONF_SUPPORT
	select MMCONF_SUPPORT_DEFAULT
	select DYNAMIC_CBMEM
	select CPU_INTEL_MODEL_206AX
	select PER_DEVICE_ACPI_TABLES

config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
	bool
	select CACHE_MRC_BIN
	select MMCONF_SUPPORT
	select MMCONF_SUPPORT_DEFAULT
	select CPU_INTEL_MODEL_206AX
	select HAVE_DEBUG_RAM_SETUP
	select PER_DEVICE_ACPI_TABLES

config NORTHBRIDGE_INTEL_IVYBRIDGE
	bool
	select CACHE_MRC_BIN
	select MMCONF_SUPPORT
	select MMCONF_SUPPORT_DEFAULT
	select DYNAMIC_CBMEM
	select CPU_INTEL_MODEL_306AX
	select PER_DEVICE_ACPI_TABLES

config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
	bool
	select CACHE_MRC_BIN
	select MMCONF_SUPPORT
	select MMCONF_SUPPORT_DEFAULT
	select CPU_INTEL_MODEL_306AX
	select HAVE_DEBUG_RAM_SETUP
	select PER_DEVICE_ACPI_TABLES

if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE

config VGA_BIOS_ID
	string
	default "8086,0106"

config CACHE_MRC_SIZE_KB
	int
	default 512

config IVYBRIDGE_LVDS
	bool
	default n

config SANDYBRIDGE_LVDS
	bool
	default n

config MRC_CACHE_SIZE
	hex
	depends on !CHROMEOS
	default 0x10000

config DCACHE_RAM_BASE
	hex
	default 0xff7e0000 if NORTHBRIDGE_INTEL_IVYBRIDGE
	default 0xff7e0000 if NORTHBRIDGE_INTEL_SANDYBRIDGE
	default 0xfefe0000 if NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
	default 0xfefe0000 if NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE

config DCACHE_RAM_SIZE
	hex
	default 0x20000

config BOOTBLOCK_NORTHBRIDGE_INIT
	string
	default "northbridge/intel/sandybridge/bootblock.c"

config DCACHE_RAM_MRC_VAR_SIZE
	hex
	default 0x4000

config HAVE_MRC
	bool "Add a System Agent binary"
	depends on !NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE && !NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
	help
	  Select this option to add a System Agent binary to
	  the resulting coreboot image.

	  Note: Without this binary coreboot will not work

config HAVE_MRC_CACHE
       bool
       default HAVE_MRC

config MRC_FILE
	string "Intel System Agent path and filename"
	depends on HAVE_MRC
	default "3rdparty/northbridge/intel/sandybridge/systemagent-r6.bin"
	help
	  The path and filename of the file to use as System Agent
	  binary.

config CBFS_SIZE
	hex "Size of CBFS filesystem in ROM"
	default 0x100000
	help
	  On Sandybridge and Ivybridge systems the firmware image has to
	  store a lot more than just coreboot, including:
	   - a firmware descriptor
	   - Intel Management Engine firmware
	   - MRC cache information
	  This option allows to limit the size of the CBFS portion in the
	  firmware image.

endif