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review.coreboot.org / coreboot / 357bb2daf09090192c09ddde501a7e07337614e1 / . / src / northbridge / intel / sandybridge / Kconfig
blob: 229589998fdf89b8065b1f7b6ad64db63f18996d [file] [log] [blame]
Stefan Reinauer00636b02012-04-04 00:08:51 +0200[diff] [blame]1##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
20config NORTHBRIDGE_INTEL_SANDYBRIDGE
21 bool
22 select CACHE_MRC_BIN
23 select CPU_INTEL_MODEL_206AX
24
25config NORTHBRIDGE_INTEL_IVYBRIDGE
26 bool
27 select CACHE_MRC_BIN
28 select CPU_INTEL_MODEL_306AX
29
30if NORTHBRIDGE_INTEL_SANDYBRIDGE
31
32config VGA_BIOS_ID
33 string
34 default "8086,0106"
35
36config CACHE_MRC_SIZE_KB
37 int
38 default 256
39
Stefan Reinauer1244f4b2012-05-10 11:31:40 -0700[diff] [blame]40# FIXME: build from rom size
41config MRC_CACHE_BASE
42 hex
43 default 0xff800000
44
45config MRC_CACHE_LOCATION
46 hex
Stefan Reinauer357bb2d2012-08-09 13:44:38 -0700[diff] [blame^]47 depends on !CHROMEOS
Stefan Reinauer1244f4b2012-05-10 11:31:40 -0700[diff] [blame]48 default 0x1ec000
49
50config MRC_CACHE_SIZE
51 hex
Stefan Reinauer357bb2d2012-08-09 13:44:38 -0700[diff] [blame^]52 depends on !CHROMEOS
Stefan Reinauer1244f4b2012-05-10 11:31:40 -0700[diff] [blame]53 default 0x10000
54
Stefan Reinauer00636b02012-04-04 00:08:51 +0200[diff] [blame]55config DCACHE_RAM_BASE
56 hex
57 default 0xff7f0000
58
59config DCACHE_RAM_SIZE
60 hex
61 default 0x10000
62
63endif
64
65if NORTHBRIDGE_INTEL_IVYBRIDGE
66
67config VGA_BIOS_ID
68 string
69 default "8086,0166"
70
71config EXTERNAL_MRC_BLOB
72 bool
73 default n
74
75config CACHE_MRC_SIZE_KB
76 int
77 default 512
78
Stefan Reinauer48214892012-06-06 13:24:32 -0700[diff] [blame]79# FIXME: build from rom size
80config MRC_CACHE_BASE
81 hex
82 default 0xff800000
83
84config MRC_CACHE_LOCATION
85 hex
Stefan Reinauer357bb2d2012-08-09 13:44:38 -0700[diff] [blame^]86 depends on !CHROMEOS
Stefan Reinauer48214892012-06-06 13:24:32 -0700[diff] [blame]87 default 0x370000
88
89config MRC_CACHE_SIZE
90 hex
Stefan Reinauer357bb2d2012-08-09 13:44:38 -0700[diff] [blame^]91 depends on !CHROMEOS
Stefan Reinauer48214892012-06-06 13:24:32 -0700[diff] [blame]92 default 0x10000
93
Stefan Reinauer00636b02012-04-04 00:08:51 +0200[diff] [blame]94config DCACHE_RAM_BASE
95 hex
96 default 0xff7e0000
97
98config DCACHE_RAM_SIZE
99 hex
100 default 0x20000
101
102endif
103
104if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE
105
106config DCACHE_RAM_MRC_VAR_SIZE
107 hex
108 default 0x4000
109
110config HAVE_MRC
111 bool "Add a System Agent binary"
112 help
113 Select this option to add a System Agent binary to
114 the resulting coreboot image.
115
116 Note: Without this binary coreboot will not work
117
118config MRC_FILE
119 string "Intel System Agent path and filename"
120 depends on HAVE_MRC
121 default "mrc.bin"
122 help
123 The path and filename of the file to use as System Agent
124 binary.
125
126endif