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coreboot
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6d71a43af5e18229364523bb1f8f62b30ac7cd8c
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src
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soc
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imgtec
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pistachio
c2973d1
spi: Get rid of SPI_ATOMIC_SEQUENCING
by Furquan Shaikh
· 8 years ago
94f8699
spi: Define and use spi_ctrlr structure
by Furquan Shaikh
· 8 years ago
36b81af
spi: Pass pointer to spi_slave structure in spi_setup_slave
by Furquan Shaikh
· 8 years ago
0dba025
spi: Fix parameter types for spi functions
by Furquan Shaikh
· 8 years ago
dc34fb6
spi: Get rid of max_transfer_size parameter in spi_slave structure
by Furquan Shaikh
· 8 years ago
c28984d
spi: Clean up SPI flash driver interface
by Furquan Shaikh
· 8 years ago
6ec72c9
drivers/uart: Use uart_platform_refclk for all UART models
by Lee Leahy
· 8 years ago
479e31e
imgtec/pistachio: Fix memlayout ASSERT with new binutils
by Stefan Reinauer
· 8 years ago
0e3d7de
urara: Increase bootblock size
by Julius Werner
· 9 years ago
d189987
tegra132/pistachio: Increase romstage size in memlayout.ld
by Julius Werner
· 9 years ago
4f3d400
imgtec/pistachio: disable default RPU gate register values
by Ionela Voinescu
· 9 years ago
3218e79
imgtec/pistachio: memlayout: update GRAM size
by Ionela Voinescu
· 9 years ago
8835754
imgtec/pistachio: I2C: fix base address for I2C clock setup
by Ionela Voinescu
· 9 years ago
56e6459
imgtec/pistachio: identity map SOC registers region
by Ionela Voinescu
· 9 years ago
7100cf2
imgtec/pistachio: Add SOC_REGISTERS memory region
by Ionela Voinescu
· 9 years ago
1136447
imgtec/pistachio: Use SYS PLL in integer mode
by Ionela Voinescu
· 9 years ago
e7a336a
mips: add coherency argument to identity mapping
by Ionela Voinescu
· 9 years ago
90d1235
mainboard/google/urara: change SYS PLL to 700MHz
by Ionela Voinescu
· 9 years ago
721f299
imgtec/pistachio: DDR2, DDR3: DLL reset set
by Ionela Voinescu
· 9 years ago
6b95406
imgtec/pistachio: DDR2, DDR3: DQS gate early
by Ionela Voinescu
· 9 years ago
f6d3bd4
imgtec/pistachio: increase CBFS cache
by Ionela Voinescu
· 9 years ago
c32e80d
Drop src/cpu/ indirection for MIPS
by Stefan Reinauer
· 9 years ago
2e8d4ed
soc/imgtec/pistachio: add implementation for system reset
by Ionela Voinescu
· 9 years ago
3bdd45e
soc/imgtec/pistachio: Implement hard_reset()
by Stefan Reinauer
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
d972f78
linking: link bootblock.elf with .data and .bss sections again
by Aaron Durbin
· 9 years ago
e5bad5c
verstage: use common program.ld for linking
by Aaron Durbin
· 9 years ago
60391b6
imgtec/pistachio: remove timestamp_get() implementation
by Aaron Durbin
· 9 years ago
6123490
imgtech/pistacho: Add vboot2 memory region
by Patrick Georgi
· 9 years ago
ba71ca3
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
eb22da0e
Remove old HAVE_UART_MEMORY_MAPPED select statements
by Martin Roth
· 9 years ago
3fa1ad0
pistachio: add DDR3 initialization code
by Ionela Voinescu
· 9 years ago
1185c10
pistachio: Use passive windowing as DQS gating scheme
by Ionela Voinescu
· 9 years ago
1d4c305
pistachio: sort included header files
by Ionela Voinescu
· 9 years ago
11f33e4
pistachio: initialize cbmem area to be empty
by Ionela Voinescu
· 9 years ago
4f2f01a
pistachio: increase romstage size
by Ionela Voinescu
· 9 years ago
f4e859b
Revert "pistashio: bump up romstage size"
by Aaron Durbin
· 9 years ago
def0fb5
pistashio: bump up romstage size
by Aaron Durbin
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
e2b0aff
Remove Kconfig variable that has no effect
by Patrick Georgi
· 9 years ago
b4a6ca9
imgtec/pistachio: Add comment on the unusual memory layout
by Patrick Georgi
· 9 years ago
6e944c4
imgtech/pistachio: Give some more space to the bootblock
by Patrick Georgi
· 9 years ago
aae53ab
kbuild: automatically include SOCs
by Stefan Reinauer
· 9 years ago
5d997f9
imgtec/pistachio: DDR reads return to controller with no bubbles
by Ionela Voinescu
· 9 years ago
a2c4f9e
imgtec/pistachio: DDR row/bank/column mapping
by Ionela Voinescu
· 9 years ago
97db1fb
soc: select generic gpio lib on (almost) all non-x86 SOCs
by Stefan Reinauer
· 9 years ago
11ecdb7
imgtec/pistachio: increase RAM CBFS cache size
by Vadim Bendebury
· 9 years ago
823f607
pistachio: Remove 50% DDR bandwidth restriction
by Ionela Voinescu
· 10 years ago
51ad6ac
pistachio: Decrease DDR ODT from 75R to 50R
by Ionela Voinescu
· 10 years ago
59074ff
pistachio: clean DDR2 initialization code
by Ionela Voinescu
· 10 years ago
38063b0
pistachio: add clock setup for all I2C interfaces
by Ionela Voinescu
· 10 years ago
b8936ad
urara: Identity map DRAM/SRAM
by Andrew Bresticker
· 10 years ago
8549797
imgtec/pistachio: Add spi_crop_chunk()
by Patrick Georgi
· 9 years ago
b116a1a
pistachio: Move console UART to a Kconfig variable
by David Hendricks
· 10 years ago
d6aaca9
pistachio: add DDR2 initialization code
by Ionela Voinescu
· 10 years ago
7271e23
pistachio: report UART register width
by Vadim Bendebury
· 10 years ago
9dccf1c
uart: pass register width in the coreboot table
by Vadim Bendebury
· 10 years ago
fdce680
pistachio: implement clock setup for I2C0
by Ionela Voinescu
· 10 years ago
a702390
pistachio: Fix ROM clock base address
by Ionela Voinescu
· 10 years ago
8b1f23e
urara: add clock setup for MIPS CPU, ROM and Ethernet
by Ionela Voinescu
· 10 years ago
41d1ca8
pistachio: fix clocks setup code
by Ionela Voinescu
· 10 years ago
b9d59bb
pistachio: Use 1.8433179 MHz for UART refclk
by David Hendricks
· 10 years ago
30fc667
pistachio: increase size of bootblock to 18 KB
by Ionela Voinescu
· 10 years ago
55b8dc0
pistachio: change memory layout as to allow bigger CBFS cache
by Ionela Voinescu
· 10 years ago
1c0d0c0
pistachio: spi: use same clock edge for RX and TX
by Ionela Voinescu
· 10 years ago
b3f666b
urara: Configure clocks and MFIOs
by Ionela Voinescu
· 10 years ago
efcee76
CBFS: Automate ROM image layout and remove hardcoded offsets
by Julius Werner
· 10 years ago
f9ff353
spi: support controllers with limited transfer size capabilities
by Vadim Bendebury
· 10 years ago
b9d9615
urara: add support for DMA coherent memory area
by Ionela Voinescu
· 10 years ago
fb3ea74
pistachio: increase the size of romstage to 36K
by Ionela Voinescu
· 10 years ago
420b0f6
pistachio: add timer frequency for SOC; correct platform ID
by Ionela Voinescu
· 10 years ago
f3bc026
pistachio: add SOC descriptor
by Vadim Bendebury
· 10 years ago
fe51cc4
pistachio: modify memory layout
by Vadim Bendebury
· 10 years ago
40ff8a5
pistachio: set correct CBMEM top address
by Vadim Bendebury
· 10 years ago
cbc44f7
pistachio: allow more room for bootblock
by Vadim Bendebury
· 10 years ago
52a8879
pistachio: implement timer support
by Vadim Bendebury
· 10 years ago
0812568
pistachio: Change all SoC headers to <soc/headername.h> system
by Julius Werner
· 10 years ago
ec5e5e0
New mechanism to define SRAM/memory map with automatic bounds checking
by Julius Werner
· 10 years ago
1d84ef5
pistachio: add gpio type definition
by Vadim Bendebury
· 10 years ago
5c9f534
urara: Fix CBFS header definitions
by Vadim Bendebury
· 10 years ago
146d05d
imgtec/pistachio: Bring uart driver to modern standards
by Patrick Georgi
· 9 years ago
8880df1
pistachio: don't open code ramstage loading
by Aaron Durbin
· 9 years ago
49aad6b
soc/imgtec/pistachio: Add IMGTEC SPI controller driver
by Ionela Voinescu
· 10 years ago
2d510d0
urara: use proper SOC name
by Vadim Bendebury
· 10 years ago