blob: 49c0712a6f5103fd41f7ec88578b0455a7e8ce98 [file] [log] [blame]
Stefan Reinauer00636b02012-04-04 00:08:51 +02001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2010 Google Inc.
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; version 2 of the License.
9#
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY; without even the implied warranty of
12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13# GNU General Public License for more details.
14#
15# You should have received a copy of the GNU General Public License
16# along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +010017# Foundation, Inc.
Stefan Reinauer00636b02012-04-04 00:08:51 +020018#
19
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -070020ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MRC),y)
Stefan Reinauere1133b72015-04-27 14:04:38 -070021
Kyösti Mälkkicb08e162013-10-15 17:19:41 +030022ramstage-y += ram_calc.c
Patrick Georgi23f38cd2012-11-16 14:50:32 +010023ramstage-y += northbridge.c
24ramstage-y += gma.c
Vladimir Serbinenko1783a3c2014-02-23 00:10:35 +010025ramstage-$(CONFIG_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c
Vladimir Serbinenko9ba922f2014-08-24 22:38:07 +020026ramstage-$(CONFIG_SANDYBRIDGE_LVDS) += gma_sandybridge_lvds.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020027
Vladimir Serbinenko822bc652014-01-03 15:55:40 +010028ramstage-y += acpi.c
Stefan Reinauer1244f4b2012-05-10 11:31:40 -070029ramstage-y += mrccache.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020030
Kyösti Mälkkicb08e162013-10-15 17:19:41 +030031romstage-y += ram_calc.c
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -070032romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MRC) += raminit_mrc.c
33romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC) += raminit_mrc.c
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020034romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += raminit.c
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -070035romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += romstage.c
36romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ../../../device/dram/ddr3.c
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020037romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += raminit.c
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -070038romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += romstage.c
39romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ../../../device/dram/ddr3.c
Stefan Reinauer1244f4b2012-05-10 11:31:40 -070040romstage-y += mrccache.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020041romstage-y += early_init.c
Vadim Bendebury7a3f36a2012-04-18 15:47:32 -070042romstage-y += report_platform.c
Stefan Reinauer6cb3a592015-07-13 09:39:15 +020043romstage-y += ../../../arch/x86/walkcbfs.S
Stefan Reinauer00636b02012-04-04 00:08:51 +020044
Patrick Georgi5a2bd0b2015-07-06 18:18:22 +020045smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020046smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
47
48# We don't ship that, but booting without it is bound to fail
49cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin
Stefan Reinauercafedcf2012-05-01 16:37:18 -070050mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
Stefan Reinauer00636b02012-04-04 00:08:51 +020051mrc.bin-position := 0xfffa0000
Martin Roth72a8e5e2015-03-24 16:02:27 -060052mrc.bin-type := mrc
Stefan Reinauere5a0a5d2012-09-19 10:51:48 -070053
Kyösti Mälkki591031f2014-02-13 00:33:40 +020054ifneq ($(CONFIG_CHROMEOS),y)
55$(obj)/mrc.cache: $(obj)/config.h
Patrick Georgi483ff822013-06-18 11:34:01 +020056 dd if=/dev/zero count=1 \
57 bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \
58 tr '\000' '\377' > $@
59
Vladimir Serbinenko7d6b0af2014-10-19 03:07:26 +020060cbfs-files-y += mrc.cache
Patrick Georgi483ff822013-06-18 11:34:01 +020061mrc.cache-file := $(obj)/mrc.cache
Alexandru Gagniuc2c482a92015-09-07 01:54:23 -070062mrc.cache-align := 0x10000
Martin Roth72a8e5e2015-03-24 16:02:27 -060063mrc.cache-type := mrc_cache
Kyösti Mälkki591031f2014-02-13 00:33:40 +020064endif
Patrick Georgi483ff822013-06-18 11:34:01 +020065
Stefan Reinauere1133b72015-04-27 14:04:38 -070066endif